Výsledky vyhledávání - acm: c.: computer systems organisation/c.1: processor architectures

1

Concurrency in Transactional Memory

Autoři: Gramoli, Vincent The University of Sydney Data61 Canberra (CSIRO) a další

Přispěvatelé: Gramoli, Vincent The University of Sydney Data61 Canberra (CSIRO) a další

Zdroj: https://hal.archives-ouvertes.fr/tel-01522826 ; Distributed, Parallel, and Cluster Computing [cs.DC]. UPMC - Sorbonne University, 2015.

Témata: Software transactional memory, multicore, manycore, transaction polymorphism, elastic transactions, Mémoire transactionnelle, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.3: Language Constructs and Features, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, ACM: D.: Software/D.1: PROGRAMMING TECHNIQUES/D.1.3: Concurrent Programming, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC]

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2

IPC Control for Multiple Real-Time Threads on an In-Order SMT Processor

Autoři: Mische, Jörg Uhrig, Sascha Kluge, Florian a další

Přispěvatelé: Mische, Jörg Uhrig, Sascha Kluge, Florian a další

Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00445865 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_11⟩

Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Geografické téma: Paphos, Cyprus

Relation: inria-00445865; https://hal.inria.fr/inria-00445865

Dostupnost: https://hal.inria.fr/inria-00445865
https://doi.org/10.1007/978-3-540-92990-1_11

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3

Parallel LDPC Decoding on the Cell/B.E. Processor

Autoři: Falcão, Gabriel Sousa, Leonel Silva, Vitor a další

Přispěvatelé: Falcão, Gabriel Sousa, Leonel Silva, Vitor a další

Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00446368 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_28⟩

Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Geografické téma: Paphos, Cyprus

Relation: inria-00446368; https://hal.inria.fr/inria-00446368

Dostupnost: https://hal.inria.fr/inria-00446368
https://doi.org/10.1007/978-3-540-92990-1_28

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4

A Framework for Task Scheduling and Memory Partitioning for Multi-Processor System-on-Chip

Autoři: Salamy, Hassan Ramanujam, J. Department of Electrical and Computer Engineering - Louisiana State University (ECE) a další

Přispěvatelé: Salamy, Hassan Ramanujam, J. Department of Electrical and Computer Engineering - Louisiana State University (ECE) a další

Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00446288 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_20⟩

Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Geografické téma: Paphos, Cyprus

Relation: inria-00446288; https://hal.inria.fr/inria-00446288

Dostupnost: https://hal.inria.fr/inria-00446288
https://doi.org/10.1007/978-3-540-92990-1_20

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5

MLP-Aware Runahead Threads in a Simultaneous Multithreading Processor

Autoři: Van Craeynest, Kenzo Eyerman, Stijn Eeckhout, Lieven a další

Přispěvatelé: Van Craeynest, Kenzo Eyerman, Stijn Eeckhout, Lieven a další

Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00445500 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_10⟩

Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Geografické téma: Paphos, Cyprus

Relation: inria-00445500; https://hal.inria.fr/inria-00445500

Dostupnost: https://hal.inria.fr/inria-00445500
https://doi.org/10.1007/978-3-540-92990-1_10

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6

HARS: A Hardware-Assisted Runtime Software for embedded many-core architectures

Autoři: Lhuillier, Y. Ojail, M. Guerre, A. a další

Přispěvatelé: Lhuillier, Y. Ojail, M. Guerre, A. a další

Zdroj: ISSN: 1539-9087.

Témata: B.5.0 [Register-Transfer-Level Implementation]: General, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.7: Organization and Design/D.4.7.4: Real-time systems and embedded systems, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.1: Process Management, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION, [INFO]Computer Science [cs]

Dostupnost: https://cea.hal.science/cea-01818892
https://doi.org/10.1145/2517311

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7

EEA-Aware For Large-Scale Scientific Applications On Heterogeneous Architectures

Autoři: Garcia Henao, John Anderson, John Anderson Garcia Henao Hernandez, Esteban Navaux, Philippe, O.A. a další

Přispěvatelé: Garcia Henao, John Anderson, John Anderson Garcia Henao Hernandez, Esteban Navaux, Philippe, O.A. a další

Zdroj: ACM Student Research Competition at Supercomputing. The International Conference for High Performance Computing, Networking, Storage and Analysis ; https://hal.science/hal-01739585 ; ACM Student Research Competition at Supercomputing. The International Conference for High Performance Computing, Networking, Storage and Analysis, Nov 2016, Salt Lake City, Utah, United States

Témata: Exascale Computing, Energy Aware, Power Capping, Energy Efficiency, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.8: Performance/D.4.8.2: Monitors, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.8: Performance/D.4.8.1: Modeling and prediction, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC]

Geografické téma: Salt Lake City, Utah, United States

Dostupnost: https://hal.science/hal-01739585
https://hal.science/hal-01739585v1/document
https://hal.science/hal-01739585v1/file/01_EEAaware-SC16-JAGH-poster.pdf

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8

Predictive Runtime Code Scheduling for Heterogeneous Architectures

Autoři: Jiménez, Victor J. Vilanova, Llu'Is Gelado, Isaac a další

Přispěvatelé: Jiménez, Victor J. Vilanova, Llu'Is Gelado, Isaac a další

Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://inria.hal.science/inria-00445304 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_4⟩

Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Geografické téma: Paphos, Cyprus

Dostupnost: https://inria.hal.science/inria-00445304
https://doi.org/10.1007/978-3-540-92990-1_4

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9

ACM: An Efficient Approach for Managing Shared Caches in Chip Multiprocessors

Autoři: Hammoud, Mohammad Cho, Sangyeun Melhem, Rami a další

Přispěvatelé: Hammoud, Mohammad Cho, Sangyeun Melhem, Rami a další

Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00446343 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_26⟩

Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, manag, lang

Geografické téma: Paphos, Cyprus

Relation: https://hal.inria.fr/inria-00446343

Dostupnost: https://hal.inria.fr/inria-00446343

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10

Integrated Modulo Scheduling for Clustered VLIW Architectures

Autoři: Eriksson, Mattias V. Kessler, Christoph W. Department of Computer and Information Science - Linköping University a další

Přispěvatelé: Eriksson, Mattias V. Kessler, Christoph W. Department of Computer and Information Science - Linköping University a další

Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00445475 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_7⟩

Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Geografické téma: Paphos, Cyprus

Relation: inria-00445475; https://hal.inria.fr/inria-00445475

Dostupnost: https://hal.inria.fr/inria-00445475
https://doi.org/10.1007/978-3-540-92990-1_7

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11

Embedded Runtime for Reconfigurable Dataflow Graphs on Manycore Architectures

Autoři: Miomandre, Hugo Hascoët, Julien Desnos, Karol a další

Přispěvatelé: Miomandre, Hugo Hascoët, Julien Desnos, Karol a další

Zdroj: PARMA-DITAM ; https://hal.science/hal-01704702 ; PARMA-DITAM, Jan 2018, Manchester, United Kingdom. ⟨10.1145/3183767.3183780⟩

Témata: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Geografické téma: Manchester, United Kingdom

Dostupnost: https://hal.science/hal-01704702
https://hal.science/hal-01704702v1/document
https://hal.science/hal-01704702v1/file/parma-ditam18.pdf
https://doi.org/10.1145/3183767.3183780

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12

Survey of Models and Architectures to Ensure Linked Data Access

Autoři: Toure, Mahamadou Gandon, Fabien Guidedi, Kaladzavi a další

Přispěvatelé: Toure, Mahamadou Gandon, Fabien Guidedi, Kaladzavi a další

Zdroj: https://inria.hal.science/hal-03956456 ; Inria & Université Côte d'Azur, CNRS, I3S. 2023, pp.23.

Témata: Web of Data, Gossip protocol, graph replication, limited connectivity, semantic overlay, mobile contributor, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.4: Knowledge Representation Formalisms and Methods, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS]

Dostupnost: https://inria.hal.science/hal-03956456
https://inria.hal.science/hal-03956456v1/document
https://inria.hal.science/hal-03956456v1/file/MahamadouToureSurvey.pdf

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13

TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA

Autoři: Corre, Youenn Diguet, Jean-Philippe Heller, Dominique a další

Přispěvatelé: Corre, Youenn Diguet, Jean-Philippe Heller, Dominique a další

Zdroj: ACM Transactions on Embedded Computing Systems. 15:1-27

Témata: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, 13. Climate action, Electronic System Level, 0202 electrical engineering, electronic engineering, information engineering, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION, Multiprocessor, 02 engineering and technology, High-Level Synthesis, ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.2: Design Tools and Techniques, System-on-Chip

Přístupová URL adresa: https://hal.archives-ouvertes.fr/hal-01172103/document
https://dblp.uni-trier.de/db/journals/tecs/tecs15.html#CorreDHBL16
https://hal.archives-ouvertes.fr/hal-01172103
https://dl.acm.org/doi/10.1145/2816817
https://doi.org/10.1145/2816817

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14

Introduction au parallélisme et aux architectures parallèles

Autoři: Etiemble, Daniel Cappello, Franck Laboratoire de Recherche en Informatique (LRI) a další

Přispěvatelé: Etiemble, Daniel Cappello, Franck Laboratoire de Recherche en Informatique (LRI) a další

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793592 ; 2017.

Témata: pThreads, loi d'Amdhal, modèle Roofline, mémoires partagées et distribuées, parallélisme de données et de contrôle, modèles d'exécution, classification de Flynn, extensions SIMD, OpenMP, modèles de programmation, MPI, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://hal.science/hal-01793592

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15

Software Abstractions for Parallel Architectures ; Abstractions Logicielles pour Architectures Parallèles

Autoři: Falcou, Joel Systèmes parallèles (LRI) (ParSys - LRI) Laboratoire de Recherche en Informatique (LRI) a další

Přispěvatelé: Falcou, Joel Systèmes parallèles (LRI) (ParSys - LRI) Laboratoire de Recherche en Informatique (LRI) a další

Zdroj: https://inria.hal.science/tel-01111708 ; Distributed, Parallel, and Cluster Computing [cs.DC]. Universite de Paris 11, 2014.

Témata: parallel programming, generic programming, generative programming, meta-programming, parallel skeletons, programmation parallèle, méta-programmation, programmation générative, programmation générique, squelettes parallèles, ACM: D.: Software/D.2: SOFTWARE ENGINEERING, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC]

Dostupnost: https://inria.hal.science/tel-01111708
https://inria.hal.science/tel-01111708v1/document
https://inria.hal.science/tel-01111708v1/file/Thesis.pdf

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16

From Scilab to Multicore Embedded Systems: Algorithms and Methodologies

Autoři: Goulas, George Alefragis, Panayiotis Voros, Nikolaos S. a další

Přispěvatelé: Goulas, George Alefragis, Panayiotis Voros, Nikolaos S. a další

Zdroj: Proceedings of the IEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS 2012 ; https://inria.hal.science/hal-00752615 ; Proceedings of the IEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS 2012, Jul 2012, Samos, Greece

Témata: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Samos, Greece

Dostupnost: https://inria.hal.science/hal-00752615

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17

High Level Transforms for SIMD and Low-Level Computer Vision Algorithms

Autoři: Lacassagne, Lionel Etiemble, Daniel Zahraee, Hassan a další

Přispěvatelé: Lacassagne, Lionel Etiemble, Daniel Zahraee, Hassan a další

Zdroj: Symposium on Principles and Practice of Parallel Programming / WPMVP ; https://inria.hal.science/hal-01094906 ; Symposium on Principles and Practice of Parallel Programming / WPMVP, Feb 2014, Orlando, Florida, United States. pp.8, ⟨10.1145/2568058.2568067⟩ ; https://sites.google.com/site/ppopp2014/

Geografické téma: Orlando, Florida, United States

Dostupnost: https://inria.hal.science/hal-01094906
https://inria.hal.science/hal-01094906v1/document
https://inria.hal.science/hal-01094906v1/file/simd-140122.pdf
https://doi.org/10.1145/2568058.2568067

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18

Simultaneous floating-point sine and cosine for VLIW integer processors

Autoři: Jeannerod, Claude-Pierre Jourdan-Lu, Jingyan Arithmetic and Computing (ARIC) a další

Přispěvatelé: Jeannerod, Claude-Pierre Jourdan-Lu, Jingyan Arithmetic and Computing (ARIC) a další

Zdroj: 23rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2012)
https://inria.hal.science/hal-00672327
23rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2012), Jul 2012, Delft, Netherlands. pp.69-76

Témata: VLIW integer processor, instruction level parallelism, C software implementation, floating-point arithmetic, IEEE 754, unit in the last place, trigonometric function, ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES/B.2.4: High-Speed Arithmetic, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures/C.1.1.2: RISC/CISC, VLIW architectures, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Delft, Netherlands

Dostupnost: https://inria.hal.science/hal-00672327
https://inria.hal.science/hal-00672327v1/document
https://inria.hal.science/hal-00672327v1/file/Jeannerod-JourdanLu.pdf

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19

Real-time scheduling on heterogeneous system-on-chip architectures using an optimised artificial neural network

Autoři: Chillet, Daniel Eiche, Antoine Pillement, Sébastien a další

Přispěvatelé: Chillet, Daniel Eiche, Antoine Pillement, Sébastien a další

Zdroj: ISSN: 1383-7621 ; Journal of Systems Architecture ; https://inria.hal.science/hal-00650650 ; Journal of Systems Architecture, 2011, 57, pp.340-353. ⟨10.1016/j.sysarc.2011.01.004⟩.

Témata: Artificial neural network, Heterogeneous multi-processor architecture, Hopfield model, Inhibitor neurons, Task scheduling, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.7: Neural nets

Dostupnost: https://inria.hal.science/hal-00650650
https://doi.org/10.1016/j.sysarc.2011.01.004

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20

Infrastructures and Compilation Strategies for the Performance of Computing Systems

Autoři: Rohou, Erven Amdahl's Law is Forever (ALF) Inria Rennes – Bretagne Atlantique a další

Přispěvatelé: Rohou, Erven Amdahl's Law is Forever (ALF) Inria Rennes – Bretagne Atlantique a další

Zdroj: https://inria.hal.science/tel-01237164 ; Other [cs.OH]. Université de Rennes 1, 2015.

Témata: optimization, JIT, interpreter, dynamic binary optimization, performance, compilation, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.1: Compilers, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.4: Interpreters, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.0: Code generation, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.6: Optimization, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.9: Retargetable compilers, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.7: Single-instruction-stream, multiple-data-stream processors (SIMD), ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures/C.1.1.2: RISC/CISC, VLIW architectures, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.6: Pipeline processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH]

Relation: info:eu-repo/grantAgreement//Esprit Project 22729/EU/Optimising Compilers for Embedded Applications/OCEANS; info:eu-repo/grantAgreement//33478/EU/Advanced Compiler Technologies for Embedded Streaming/ACOTES; info:eu-repo/grantAgreement/EC/FP7/214009/EU/Open Media Platform/OMP

Dostupnost: https://inria.hal.science/tel-01237164
https://inria.hal.science/tel-01237164/document
https://inria.hal.science/tel-01237164/file/HDR-Erven-Rohou.pdf

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