Výsledky vyhledávání - acm: c.: computer systems organisation/c.1: processor architectural*

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  1. 1

    Micro-architectural simulation of embedded core heterogeneity with gem5 and McPAT

    Autoři: Endo, F.A. Couroussé, Damien Charles, H.-P. a další

    Přispěvatelé: Endo, F.A. Couroussé, Damien Charles, H.-P. a další

    Zdroj: RAPIDO '15 Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools ; https://cea.hal.science/cea-01818887 ; RAPIDO '15 Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, Jan 2015, Amsterdam, Netherlands. ⟨10.1145/2693433.2693440⟩

    Témata: ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.7: Simulation Support Systems, ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.7: Simulation Support Systems/I.6.7.0: Environments, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures, [INFO]Computer Science [cs]

    Geografické téma: Amsterdam, Netherlands

    Dostupnost: https://cea.hal.science/cea-01818887
    https://doi.org/10.1145/2693433.2693440

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  2. 2

    ASPLOS-IV proceedings : fourth international conference on architectural support for programming languages and operating systems : Santa Clara, California, April 8-11, 1991 / spons. by ACM in coop. with the IEEE Computer Society.

    Autoři: International Conference on Architectural Support for Programming Languages and Operating Systems (4 ; 1991 ; Santa Clara). Association for Computing Machinery. Institute of Electrical and Electronics Engineers. Computer Society.

    Přispěvatelé: International Conference on Architectural Support for Programming Languages and Operating Systems (4 ; 1991 ; Santa Clara). Association for Computing Machinery. Institute of Electrical and Electronics Engineers. Computer Society.

    Zdroj: Bibliogr. przy rozdz.
    Index.

    Témata: Sieci komputerowe, Komputery -- konferencje

    Přístupová URL adresa: http://katalog.nukat.edu.pl/lib/item?id=chamo:1759164&theme=nukat

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  3. 3

    Hardware Architectural Support for Control Systems and Sensor Processing.

    Autoři: VYAS, SUDHANSHU GUPTE, ADWAIT GILL, CHRISTOPHER D. a další

    Zdroj: ACM Transactions on Embedded Computing Systems; Sep2013, Vol. 13 Issue 2, p1-25, 25p

    Témata: COMPUTER input-output equipment, COMPUTER architecture, AUTOMATIC control systems, SENSOR networks, DIGITAL signal processing, ALGORITHMS, PID controllers

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  4. 4

    Scheduling Analysis from Architectural Models of Embedded Multi-Processor Systems

    Autoři: Rubini, Stéphane Fotsing, Christian Singhoff, Frank a další

    Přispěvatelé: Rubini, Stéphane Fotsing, Christian Singhoff, Frank a další

    Zdroj: ISSN: 1551-3688 ; ACM SIGBED Review ; https://hal.univ-brest.fr/hal-00983407 ; ACM SIGBED Review, 2014, 11 (1.

    Témata: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

    Dostupnost: https://hal.univ-brest.fr/hal-00983407
    https://hal.univ-brest.fr/hal-00983407v1/document
    https://hal.univ-brest.fr/hal-00983407v1/file/ewili.pdf

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  5. 5

    Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach

    Autoři: Schoeberl, Martin Schleuniger, Pascal Puffitsch, Wolfgang a další

    Přispěvatelé: Schoeberl, Martin Schleuniger, Pascal Puffitsch, Wolfgang a další

    Zdroj: Bringing Theory to Practice: Predictability and Performance in Embedded Systems ; https://inria.hal.science/inria-00585320 ; Bringing Theory to Practice: Predictability and Performance in Embedded Systems, Philipp Lucas, Lothar Thiele, Benoit Triquet, Theo Ungerer, and Reinhard Wilhelm, Mar 2011, Grenoble, France. pp.11-21, ⟨10.4230/OASIcs.PPES.2011.11⟩ ; http://drops.dagstuhl.de/opus/volltexte/2011/3077/pdf/2.pdf

    Témata: WCET-aware Compilation, WCET Analysis, Time-predictable Architecture, ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS/C.3.2: Real-time and embedded systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures/C.1.1.2: RISC/CISC, VLIW architectures, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-PF]Computer Science [cs]/Performance [cs.PF]

    Geografické téma: Grenoble, France

    Dostupnost: https://inria.hal.science/inria-00585320
    https://inria.hal.science/inria-00585320v1/document
    https://inria.hal.science/inria-00585320v1/file/schoeberl-ppes11.pdf
    https://doi.org/10.4230/OASIcs.PPES.2011.11

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  6. 6

    XPXM/C: a taxonomy of processor coupling techniques.

    Autoři: Artym, R. Mason, J.S.

    Zdroj: IEE Proceedings: Part E: Computers & Digital Techniques; May1988, Vol. 135 Issue 3, p173-180, 8p

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  7. 7

    Architectural and Protocol Exploration for 3D Optical Network-on-Chip ; Exploration architecturale et protocolaire pour un réseaux 3D optique sur puce

    Autoři: Luo, Jiating Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources (CAIRN) Inria Rennes – Bretagne Atlantique a další

    Přispěvatelé: Luo, Jiating Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources (CAIRN) Inria Rennes – Bretagne Atlantique a další

    Zdroj: https://inria.hal.science/tel-01956255 ; Hardware Architecture [cs.AR]. Université de Rennes 1 [UR1], 2018. English. ⟨NNT : ⟩.

    Témata: Network on chip NoC, Réseau sur puce NoC, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.1: Network Architecture and Design, ACM: D.: Software/D.4: OPERATING SYSTEMS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ET]Computer Science [cs]/Emerging Technologies [cs.ET]

    Dostupnost: https://inria.hal.science/tel-01956255
    https://inria.hal.science/tel-01956255v1/document
    https://inria.hal.science/tel-01956255v1/file/These_Jiating_fin.pdf

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  8. 8

    Exploiting Timing Error Resilience in Processor Architecture.

    Autoři: SARTORI, JOHN KUMAR, RAKESH

    Zdroj: ACM Transactions on Embedded Computing Systems; May2013 Supplement 2, Vol. 12, p1-25, 25p

    Témata: COMPLEMENTARY metal oxide semiconductor design & construction, MACRO processors, COMPUTER architecture, ERROR rates, ERRORS, MOORE'S law, INDUSTRIAL costs

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  9. 9

    Predictive Thermal Management for Chip Multiprocessors Using Co-designed Virtual Machines

    Autoři: Khan, Omer Kundu, Sandip Department of Electrical and Computer Engineering - University of Massachusetts (ECE) a další

    Přispěvatelé: Khan, Omer Kundu, Sandip Department of Electrical and Computer Engineering - University of Massachusetts (ECE) a další

    Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00446303 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_22⟩

    Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

    Geografické téma: Paphos, Cyprus

    Relation: inria-00446303; https://hal.inria.fr/inria-00446303

    Dostupnost: https://hal.inria.fr/inria-00446303
    https://doi.org/10.1007/978-3-540-92990-1_22

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  10. 10

    Periodic activity migration for fast sequential execution in future heterogeneous multicore processors

    Autoři: Michaud, Pierre Compilation, parallel architectures and system (CAPS) Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA) a další

    Přispěvatelé: Michaud, Pierre Compilation, parallel architectures and system (CAPS) Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA) a další

    Zdroj: https://inria.hal.science/inria-00340566 ; [Research Report] PI 1909, 2008, pp.20.

    Témata: Heterogeneous multicore processor, power consumption, heat flux, periodic activity migration, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

    Relation: Report N°: PI 1909

    Dostupnost: https://inria.hal.science/inria-00340566
    https://inria.hal.science/inria-00340566/document
    https://inria.hal.science/inria-00340566/file/PI-1909.pdf

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  11. 11

    Communication Based Proactive Link Power Management

    Autoři: Muralidhara, Sai Prashanth Kandemir, Mahmut Department of Computer Science and Engineering University Park a další

    Přispěvatelé: Muralidhara, Sai Prashanth Kandemir, Mahmut Department of Computer Science and Engineering University Park a další

    Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00445984 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_16⟩

    Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

    Geografické téma: Paphos, Cyprus

    Relation: inria-00445984; https://hal.inria.fr/inria-00445984

    Dostupnost: https://hal.inria.fr/inria-00445984
    https://doi.org/10.1007/978-3-540-92990-1_16

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  12. 12

    Speculatively Vectorized Bytecode

    Autoři: Rohou, Erven Dyshel, Sergei Nuzman, Dorit a další

    Přispěvatelé: Rohou, Erven Dyshel, Sergei Nuzman, Dorit a další

    Zdroj: International Conference on High-Performance and Embedded Architectures and Compilers ; https://inria.hal.science/inria-00525139 ; International Conference on High-Performance and Embedded Architectures and Compilers, Manolis Katevenis and Margaret Martonosi, Jan 2011, Heraklion, Greece

    Témata: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.7: Single-instruction-stream, multiple-data-stream processors (SIMD), ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.13: Reusable Software, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.0: Code generation, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.1: Compilers, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.6: Optimization, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH]

    Geografické téma: Heraklion, Greece

    Relation: info:eu-repo/grantAgreement//26535/EU/High-Performance Embedded Architectures and Compilers/HIPEAC

    Dostupnost: https://inria.hal.science/inria-00525139
    https://inria.hal.science/inria-00525139/document
    https://inria.hal.science/inria-00525139/file/Rohou-HiPEAC11.pdf

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  13. 13

    Scheduling issues on thermally-constrained processors

    Autoři: Michaud, Pierre Sazeides, Yiannakis Compilation, parallel architectures and system (CAPS) a další

    Přispěvatelé: Michaud, Pierre Sazeides, Yiannakis Compilation, parallel architectures and system (CAPS) a další

    Zdroj: https://inria.hal.science/inria-00110507 ; [Research Report] PI 1822, 2006, pp.19.

    Témata: Multi-core processor, temperature, thread scheduling, time slice, activity migration, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

    Relation: Report N°: PI 1822

    Dostupnost: https://inria.hal.science/inria-00110507
    https://inria.hal.science/inria-00110507/document
    https://inria.hal.science/inria-00110507/file/PI-1822.pdf

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  14. 14

    Development an efficient AXI-interconnect unit between set of customized peripheral devices and an implemented dual-core RISC-V processor.

    Autoři: Emil, Demyana Hamdy, Mohammed Nagib, Gihan

    Zdroj: Journal of Supercomputing; Oct2023, Vol. 79 Issue 15, p17000-17019, 20p

    Témata: TELECOMMUNICATION equipment, COMPUTER systems, ARCHITECTURAL design, MULTICORE processors, TAIGAS, CACHE memory

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  15. 15

    Processor Design for Soft Errors: Challenges and State of the Art.

    Autoři: LI, TUO AMBROSE, JUDE ANGELO RAGEL, ROSHAN a další

    Zdroj: ACM Computing Surveys; Dec2016, Vol. 49 Issue 3, p1-44, 44p, 3 Diagrams, 4 Charts, 1 Graph

    Témata: SOFT errors, MICROPROCESSOR design & construction, ERROR rates, COMPUTER architecture, DATA, ERROR detection (Information theory)

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  16. 16

    HMP-ASIPs: heterogeneous multi-pipeline application-specific instruction-set processors.

    Autoři: Radhakrishnan, S. Guo, H. Parameswaran, S. a další

    Zdroj: IET Computers & Digital Techniques (Institution of Engineering & Technology); Jan2009, Vol. 3 Issue 1, p94-108, 15p, 13 Diagrams, 4 Charts, 3 Graphs

    Témata: COMPUTER architecture, ARCHITECTURAL designs, ARCHITECTURE, INDUSTRIAL design, SET (Computer network protocol)

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  17. 17

    Soylent: A Word Processor with a Crowd Inside.

    Autoři: Bernstein, Michael S. Little, Greg Miller, Robert C. a další

    Zdroj: Communications of the ACM; Aug2015, Vol. 58 Issue 8, p85-94, 10p, 1 Color Photograph, 4 Diagrams, 1 Chart

    Témata: CROWDSOURCING, COMPUTER architecture, USER interfaces, HUMAN-machine systems, COMPUTER programming, ELECTRONIC data processing, ALGORITHMS

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  18. 18

    Concurrency in Transactional Memory

    Autoři: Gramoli, Vincent The University of Sydney Data61 Canberra (CSIRO) a další

    Přispěvatelé: Gramoli, Vincent The University of Sydney Data61 Canberra (CSIRO) a další

    Zdroj: https://hal.archives-ouvertes.fr/tel-01522826 ; Distributed, Parallel, and Cluster Computing [cs.DC]. UPMC - Sorbonne University, 2015.

    Témata: Software transactional memory, multicore, manycore, transaction polymorphism, elastic transactions, Mémoire transactionnelle, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.3: Language Constructs and Features, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, ACM: D.: Software/D.1: PROGRAMMING TECHNIQUES/D.1.3: Concurrent Programming, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC]

    Relation: tel-01522826; https://hal.archives-ouvertes.fr/tel-01522826; https://hal.archives-ouvertes.fr/tel-01522826/document; https://hal.archives-ouvertes.fr/tel-01522826/file/hdr-v4.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/chronology%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/chronology.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/cmp.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/complexity%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/complexity.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/composition2%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/composition2.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/histories%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/histories.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/histories2%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/histories2.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/lf-vs-pstm-16384%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/lf-vs-pstm-16384.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/lf-vs-stm-16384%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/lf-vs-stm-16384.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/multiprocessor.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/skiplist_diagram%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/skiplist_diagram.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/tree1%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/tree1.pdf

    Dostupnost: https://hal.archives-ouvertes.fr/tel-01522826
    https://hal.archives-ouvertes.fr/tel-01522826/document
    https://hal.archives-ouvertes.fr/tel-01522826/file/hdr-v4.pdf
    https://hal.archives-ouvertes.fr/tel-01522826/file/chronology%20%281%29.pdf
    https://hal.archives-ouvertes.fr/tel-01522826/file/chronology.pdf
    https://hal.archives-ouvertes.fr/tel-01522826/file/cmp.pdf
    https://hal.archives-ouvertes.fr/tel-01522826/file/complexity%20%281%29.pdf
    https://hal.archives-ouvertes.fr/tel-01522826/file/complexity.pdf
    https://hal.archives-ouvertes.fr/tel-01522826/file/composition2%20%281%29.pdf
    https://hal.archives-ouvertes.fr/tel-01522826/file/composition2.pdf

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  19. 19

    Securing Interruptible Enclaved Execution on Small Microprocessors.

    Autoři: BUSI, MATTEO NOORMAN, JOB VAN BULCK, JO a další

    Zdroj: ACM Transactions on Programming Languages & Systems; Sep2021, Vol. 43 Issue 3, p1-77, 77p

    Témata: COMPUTER systems, PROGRAMMING languages, MICROPROCESSORS, LANGUAGE research

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  20. 20

    HPC Systems in the Next Decade – What to Expect, When, Where.

    Autoři: Doglioni, C. Kim, D. Stewart, G.A. a další

    Zdroj: EPJ Web of Conferences; 11/16/2020, Vol. 245, p1-10, 10p

    Témata: HIGH performance computing, COMPUTER architecture, WORKFLOW management, COMPUTER software development, INFORMATION retrieval

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