Search Results - acm: c.: computer systems organisation/c.0: general/c.0.3: system architectures

System der Philosophie. Teil 1 : allgemeine Grundlegung der Philosophie / von Heinrich Rickert, 1921

Authors: Rickert, Heinrich, 1863-1936, Auteur du texte

Source: Bibliothèque nationale de France, département Philosophie, histoire, sciences de l'homme, Z KOJEVE-3611, 1921.

Relation: Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb40940976k

Access URL: http://gallica.bnf.fr/ark:/12148/bpt6k319337x

A natural system of botany, or A systematic view of the organisation, natural affinities, and geographical distribution, of the whole vegetable kingdom, together with the uses of the most important species in medicine, the arts, and rural or domestic economy ([Reprod.]) / by John Lindley,.., 1836

Authors: Lindley, John. Auteur du texte

Source: Bibliothèque nationale de France, 1836.

Relation: Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb37257380q

Access URL: http://gallica.bnf.fr/ark:/12148/bpt6k97815r

An introduction to the natural system of botany, or A systematic view of the organisation, natural affinities, and geographical distribution of the whole vegetable kingdom ([Reprod.]) / by John Lindley,.., 1830

Authors: Lindley, John. Auteur du texte

Source: Bibliothèque nationale de France, 1830.

Relation: Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb37267357d

Access URL: http://gallica.bnf.fr/ark:/12148/bpt6k97814d

HARS: A Hardware-Assisted Runtime Software for embedded many-core architectures

Authors: Lhuillier, Y. Ojail, M. Guerre, A. et al.

Contributors: Lhuillier, Y. Ojail, M. Guerre, A. et al.

Source: ISSN: 1539-9087.

Subject Terms: B.5.0 [Register-Transfer-Level Implementation]: General, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.7: Organization and Design/D.4.7.4: Real-time systems and embedded systems, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.1: Process Management, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION, [INFO]Computer Science [cs]

Availability: https://cea.hal.science/cea-01818892
https://doi.org/10.1145/2517311

PRET-C: A new language for programming precision timed architectures

Authors: Andalam, Sidharta Roop, Partha Girault, Alain et al.

Contributors: Andalam, Sidharta Roop, Partha Girault, Alain et al.

Source: https://inria.hal.science/inria-00391621 ; [Research Report] RR-6922, INRIA. 2009, pp.38.

Subject Terms: Real-time systems, Precision Timed (PRET) Architectures, Synchronous Languages, ACM: B.: Hardware/B.1: CONTROL STRUCTURES AND MICROPROGRAMMING, ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS/C.3.2: Real-time and embedded systems, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.2: Language Classifications/D.3.2.1: Concurrent, distributed, and parallel languages, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Availability: https://inria.hal.science/inria-00391621
https://inria.hal.science/inria-00391621v1/document
https://inria.hal.science/inria-00391621v1/file/rr.pdf

A Unifying View of Loosely Time-Triggered Architectures

Authors: Baudart, Guillaume Benveniste, Albert Bouillard, Anne et al.

Contributors: Baudart, Guillaume Benveniste, Albert Bouillard, Anne et al.

Source: https://inria.hal.science/hal-00955496 ; [Research Report] RR-8494, INRIA. 2014, pp.14.

Subject Terms: Time-Triggered Architecture, Elastic Circuits, Loosely Time-Triggered Architecture, ACM: C.: Computer Systems Organization/C.0: GENERAL, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Availability: https://inria.hal.science/hal-00955496
https://inria.hal.science/hal-00955496v1/document
https://inria.hal.science/hal-00955496v1/file/RR-8494.pdf

Impact of on-chip network parameters on NUCA cache performances.

Authors: Bardine, A. Comparetti, M. Foglia, P. et al.

Source: IET Computers & Digital Techniques (Institution of Engineering & Technology); Sep2009, Vol. 3 Issue 5, p501-512, 12p, 3 Diagrams, 2 Charts, 7 Graphs

Subject Terms: NETWORK routers, COMPUTER architecture, SYSTEMS development, COMPUTER systems, COMPUTER network architectures

Observations upon the windward coast of Africa, the religion, character, customs, &c., of the natives : with a system upon wich they may be civilised, and a knowledge attained of the interior of this extraordinary quarter of the globe, and upon the natural and commercial resources of the country : made in the years 1805 and 1806 / by Joseph Corry, 1807

Authors: Corry, Joseph. Auteur du texte

Source: Bibliothèque nationale de France, département Réserve des livres rares, 4-O3-588, 1807.

Relation: Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb37745673f

Access URL: http://gallica.bnf.fr/ark:/12148/bpt6k2001962

Chapter 7: Architectures and Implementations of Spatio-temporal Database Management Systems

Authors: Breunig, M. T?rker, C. Behlen, M. et al.

Contributors: Breunig, M. T?rker, C. Behlen, M. et al.

Source: Lecture Notes in Computer Science ISBN: 9783540405528
Breunig, M, Turker, C, Böhlen, M, Dieker, S, Guting, R H, Jensen, C S, Relly, L, Rigaux, P, Schek, H J & Scholl, M 2003, Architectures and implementations of spatio-temporal database management systems. in Spatio-Temporal Databases : the Chrochronos Approach. vol. 2520, pp. 263-318, Architectures and implementations of spatio-temporal database management systems, 19/05/2010.

Subject Terms: Programmation, ddc:550, Management Systems, [INFO] Computer Science [cs], 15. Life on land, 7. Clean energy, organisation des données, Earth sciences, Databases, 13. Climate action, 11. Sustainability, [INFO.INFO-DB] Computer Science [cs]/Databases [cs.DB], 14. Life underwater, logiciels

Access URL: https://vbn.aau.dk/da/publications/59612a30-0d5a-11dc-b676-000ea68e967b
https://vbn.aau.dk/da/publications/architectures-and-implementations-of-spatio-temporal-database-man
http://people.cs.aau.dk/~csj/Papers/Files/2003_breunigLNCS-2520.pdf
https://link.springer.com/chapter/10.1007%2F978-3-540-45081-8_7
https://basepub.dauphine.fr/handle/123456789/3831
https://dblp.uni-trier.de/db/conf/chorochronos/chorochronos2003.html#BreunigTBDGJRRSS03
https://rd.springer.com/chapter/10.1007/978-3-540-45081-8_7
https://hal.science/hal-01124849v1

Accepted for publication in ACM Transactions on Embedded Computing Systems. Special Issue on Networked Embedded Computing: Tools, Architectures and Applications. Sensor Deployment and Target Localization in Distributed Sensor Networks

Authors: Yi Zou The Pennsylvania State University CiteSeerX Archives

Contributors: Yi Zou The Pennsylvania State University CiteSeerX Archives

Source: http://wotan.liu.edu/docis/lib/goti/rclis/dbl/atemcs/(2004)3%253A1%253C61%253ASDATLI%253E/www.duke.edu%252F~yz21%252Fresearch%252FYZ_ACMTRANS-ECS-052003-BulletinVersion.pdf.

Subject Terms: Categories and Subject Descriptors, C.2.1 [Computer-communication Networks, Network Architecture and Design—Distributed networks, Wireless communication, C.2.4 [Computercommunication Networks, Distributed Systems—distributed applications, C.3 [Speical-Purpose and Application-based Systems, Real-time and embedded systems General Terms, Sensor Networks Additional Key Words and Phrases, Cluster-based sensor networks, cluster head, sensor field coverage

File Description: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.83.6740

Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.83.6740
http://wotan.liu.edu/docis/lib/goti/rclis/dbl/atemcs/(2004)3%253A1%253C61%253ASDATLI%253E/www.duke.edu%252F~yz21%252Fresearch%252FYZ_ACMTRANS-ECS-052003-BulletinVersion.pdf

Predictive Runtime Code Scheduling for Heterogeneous Architectures

Authors: Jiménez, Victor J. Vilanova, Llu'Is Gelado, Isaac et al.

Contributors: Jiménez, Victor J. Vilanova, Llu'Is Gelado, Isaac et al.

Source: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://inria.hal.science/inria-00445304 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_4⟩

Subject Terms: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Subject Geographic: Paphos, Cyprus

Availability: https://inria.hal.science/inria-00445304
https://doi.org/10.1007/978-3-540-92990-1_4

TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA

Authors: Corre, Youenn Diguet, Jean-Philippe Heller, Dominique et al.

Contributors: Corre, Youenn Diguet, Jean-Philippe Heller, Dominique et al.

Source: ACM Transactions on Embedded Computing Systems. 15:1-27

Subject Terms: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, 13. Climate action, Electronic System Level, 0202 electrical engineering, electronic engineering, information engineering, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION, Multiprocessor, 02 engineering and technology, High-Level Synthesis, ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.2: Design Tools and Techniques, System-on-Chip

Access URL: https://hal.archives-ouvertes.fr/hal-01172103/document
https://dblp.uni-trier.de/db/journals/tecs/tecs15.html#CorreDHBL16
https://hal.archives-ouvertes.fr/hal-01172103
https://dl.acm.org/doi/10.1145/2816817
https://doi.org/10.1145/2816817

Probabilistic System-on-a-Chip Architectures

Authors: Lakshmi N. Chakrapani Pinar Korkmaz Bilge E. S. Akgul et al.

Contributors: Lakshmi N. Chakrapani Pinar Korkmaz Bilge E. S. Akgul et al.

Source: http://www.crest.gatech.edu/palempbitscurrent/a29-chakrapani.pdf.

Subject Terms: Categories and Subject Descriptors, C.3 [Computer Systems Organization, Special-Purpose and Application-Based Systems, C.1.3 [Processor Architectures, Other Architecture Styles General Terms, Performance, Design, Reliability Additional Key Words and Phrases, Embedded systems, probabilistic computing ACM Reference Format

File Description: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.91.430

Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.91.430
http://www.crest.gatech.edu/palempbitscurrent/a29-chakrapani.pdf

From Scilab to Multicore Embedded Systems: Algorithms and Methodologies

Authors: Goulas, George Alefragis, Panayiotis Voros, Nikolaos S. et al.

Contributors: Goulas, George Alefragis, Panayiotis Voros, Nikolaos S. et al.

Source: Proceedings of the IEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS 2012 ; https://inria.hal.science/hal-00752615 ; Proceedings of the IEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS 2012, Jul 2012, Samos, Greece

Subject Terms: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Subject Geographic: Samos, Greece

Availability: https://inria.hal.science/hal-00752615

Real-time scheduling on heterogeneous system-on-chip architectures using an optimised artificial neural network

Authors: Chillet, Daniel Eiche, Antoine Pillement, Sébastien et al.

Contributors: Chillet, Daniel Eiche, Antoine Pillement, Sébastien et al.

Source: ISSN: 1383-7621 ; Journal of Systems Architecture ; https://inria.hal.science/hal-00650650 ; Journal of Systems Architecture, 2011, 57, pp.340-353. ⟨10.1016/j.sysarc.2011.01.004⟩.

Subject Terms: Artificial neural network, Heterogeneous multi-processor architecture, Hopfield model, Inhibitor neurons, Task scheduling, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.7: Neural nets

Availability: https://inria.hal.science/hal-00650650
https://doi.org/10.1016/j.sysarc.2011.01.004

Reconfigurable computing: architectures and design methods.

Authors: Todman, T. J. Constantinides, G. A. Wilton, S. J. E. et al.

Source: IEE Proceedings -- Computers & Digital Techniques; Mar2005, Vol. 152 Issue 2, p193-207, 15p

Subject Terms: ADAPTIVE computing systems, COMPUTER systems, COMPUTER architecture, COMPUTER science, SYSTEMS development, SYSTEMS design, INFORMATION technology, COMPUTER industry

A Framework for Task Scheduling and Memory Partitioning for Multi-Processor System-on-Chip

Authors: Salamy, Hassan Ramanujam, J. Department of Electrical and Computer Engineering - Louisiana State University (ECE) et al.

Contributors: Salamy, Hassan Ramanujam, J. Department of Electrical and Computer Engineering - Louisiana State University (ECE) et al.

Source: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00446288 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_20⟩

Subject Terms: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Subject Geographic: Paphos, Cyprus

Relation: inria-00446288; https://hal.inria.fr/inria-00446288

Availability: https://hal.inria.fr/inria-00446288
https://doi.org/10.1007/978-3-540-92990-1_20

Towards a standardised framework for a multi-agent system approach for cooperation in an original design manufacturing company.

Authors: Lin, Jiun-Shiung Ou-Yang, Chao Juan, Yeh-Chun

Source: International Journal of Computer Integrated Manufacturing; Jun2009, Vol. 22 Issue 6, p494-514, 21p, 1 Color Photograph, 1 Black and White Photograph, 14 Diagrams

Subject Terms: COMPUTER integrated manufacturing systems, COMPUTER-aided engineering, POLYNOMIALS, APPROXIMATION theory, COMPUTER network architectures

Proceedings of the 13th International Conference on Real-Time Systems (RTS'2005)

Authors: Navet, Nicolas Real time and interoperability (TRIO) INRIA Lorraine et al.

Contributors: Navet, Nicolas Real time and interoperability (TRIO) INRIA Lorraine et al.

Source: https://inria.hal.science/inria-00000559 ; Nicolas Navet. BIRP, pp.515, 2005.

Subject Terms: Real-Time systems, Scheduling, Modeling, Middleware, Fault-Tolerance, Operating Systems, Formal Methods, ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS/C.3.2: Real-time and embedded systems, ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS/C.3.1: Process control systems, ACM: C.: Computer Systems Organization/C.4: PERFORMANCE OF SYSTEMS/C.4.1: Fault tolerance, ACM: C.: Computer Systems Organization/C.4: PERFORMANCE OF SYSTEMS/C.4.5: Reliability, availability, and serviceability, ACM: C.: Computer Systems Organization/C.0: GENERAL/C.0.3: System architectures, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems/C.2.4.1: Distributed applications, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-OS]Computer Science [cs]/Operating Systems [cs.OS], [INFO.INFO-PF]Computer Science [cs]/Performance [cs.PF], [MATH.MATH-OC]Mathematics [math]/Optimization and Control [math.OC]

Availability: https://inria.hal.science/inria-00000559

Integration of recommender system for Web cache management.

Authors: Hiranpongsin, Supawadee Bhattarakosol, Pattarasinee

Source: Maejo International Journal of Science & Technology; May-Aug2013, Vol. 7 Issue 2, p232-247, 16p

Subject Terms: WEB caches, RECOMMENDER systems, QUALITY of service, COMPUTER networks, COMPUTER network architectures, COMPARATIVE studies