Search Results - acm: c.: computer system organizations/c.1: processor architectural/c.1.4: parallel architecture*

Efficient Breadth-First Search on the Cell/BE Processor.

Authors: Scarpazza, Daniele Paolo Villa, Oreste Petrini, Fabrizio

Source: IEEE Transactions on Parallel & Distributed Systems; Oct2008, Vol. 19 Issue 10, p1381-1395, 28p, 3 Black and White Photographs, 5 Charts, 8 Graphs

Subject Terms: MICROPROCESSORS, PARALLEL computer software, COMPUTER software development, BROADBAND communication systems, SOFTWARE architecture, PROGRAM transformation, PARALLEL programs (Computer programs), COMPUTER system design & construction, ALGORITHMS, SYSTEMS software, INTEGRATED circuits, COMPUTER software

A Survey on Memory-centric Computer Architectures.

Authors: GEBREGIORGIS, ANTENEH HOANG ANH DU NGUYEN JINTAO YU et al.

Source: ACM Journal on Emerging Technologies in Computing Systems; Oct2022, Vol. 18 Issue 4, p1-50, 50p

Subject Terms: COMPUTER architecture, INTERNET surveys, PARALLEL processing

Phase-Change Memory: An Architectural Perspective.

Authors: ZILBERBERG, OMER WEISS, SHLOMO TOLEDO, SIVAN

Source: ACM Computing Surveys; Jun2013, Vol. 45 Issue 3, p29:1-29:33, 33p, 10 Diagrams, 1 Chart, 1 Graph

Subject Terms: COMPUTER architecture, PHASE change memory, DYNAMIC random access memory, ARCHITECTURAL design, DATA protection, COMPUTER systems

A Survey of Machine Learning for Computer Architecture and Systems.

Authors: NAN WU YUAN XIE

Source: ACM Computing Surveys; Apr2023, Vol. 55 Issue 3, p1-39, 39p

Subject Terms: COMPUTER architecture, COMPUTER systems, MACHINE learning, SYSTEMS design, COMPILERS (Computer programs), SERVER farms (Computer network management), ARCHITECTURAL design

Exploiting Timing Error Resilience in Processor Architecture.

Authors: SARTORI, JOHN KUMAR, RAKESH

Source: ACM Transactions on Embedded Computing Systems; May2013 Supplement 2, Vol. 12, p1-25, 25p

Subject Terms: COMPLEMENTARY metal oxide semiconductor design & construction, MACRO processors, COMPUTER architecture, ERROR rates, ERRORS, MOORE'S law, INDUSTRIAL costs

Reliability aware throughput management of chip multi-processor architecture via thread migration.

Authors: Pouyan, Fatemeh Azarpeyvand, Ali Safari, Saeed et al.

Source: Journal of Supercomputing; Apr2016, Vol. 72 Issue 4, p1363-1380, 18p

Subject Terms: SIMULTANEOUS multithreading processors, COMPUTER architecture, SOFT errors, MINIATURE electronic equipment, PARALLEL processing, MULTIPROCESSORS

Hardware Architectural Support for Control Systems and Sensor Processing.

Authors: VYAS, SUDHANSHU GUPTE, ADWAIT GILL, CHRISTOPHER D. et al.

Source: ACM Transactions on Embedded Computing Systems; Sep2013, Vol. 13 Issue 2, p1-25, 25p

Subject Terms: COMPUTER input-output equipment, COMPUTER architecture, AUTOMATIC control systems, SENSOR networks, DIGITAL signal processing, ALGORITHMS, PID controllers

Efficient Reuse Distance Analysis of Multicore Scaling for Loop-Based Parallel Programs.

Authors: MENG-JU WU DONALD YEUNG

Source: ACM Transactions on Computer Systems; Feb2013, Vol. 31 Issue 1, p1:1-1:37, 37p

Subject Terms: PARALLEL programming, MULTICORE processors, CACHE memory, LOOPS (Group theory), COMPUTER storage devices, COMPUTER memory management

Processor Design for Soft Errors: Challenges and State of the Art.

Authors: LI, TUO AMBROSE, JUDE ANGELO RAGEL, ROSHAN et al.

Source: ACM Computing Surveys; Dec2016, Vol. 49 Issue 3, p1-44, 44p, 3 Diagrams, 4 Charts, 1 Graph

Subject Terms: SOFT errors, MICROPROCESSOR design & construction, ERROR rates, COMPUTER architecture, DATA, ERROR detection (Information theory)

A Survey of Coarse-Grained Reconfigurable Architecture and Design: Taxonomy, Challenges, and Applications.

Authors: LEIBO LIU JIANFENG ZHU ZHAOSHI LI et al.

Source: ACM Computing Surveys; Nov2020, Vol. 52 Issue 6, p1-39, 39p

Subject Terms: ARCHITECTURAL design, TAXONOMY, ENERGY consumption

Top Picks in Computer Architecture from Conferences in 2018.

Authors: Dwarkadas, Sandhya

Source: IEEE Micro; May-Jun2019, Vol. 39 Issue 3, p6-10, 5p

Subject Terms: COMPUTER architecture, ORDER picking systems, MESSAGE authentication codes, PARALLEL computers, RANDOM access memory

Boosting Parallel Applications Performance on Applying DIM Technique in a Multiprocessing Environment.

Authors: Rutzig, Mateus B. Beck, Antonio C. S. Madruga, Felipe et al.

Source: International Journal of Reconfigurable Computing; 2011, p1-13, 13p

Subject Terms: MULTIPROCESSORS, SIMULTANEOUS multithreading processors, EMBEDDED computer systems, SYSTEMS on a chip, COMPUTER architecture, ADAPTIVE computing systems

A simultaneous multithreading processor architecture with predictable timing behavior.

Authors: Siqueira, Hadley Magno Kreutz, Marcio Eduardo

Source: Design Automation for Embedded Systems; Mar2020, Vol. 24 Issue 1, p45-62, 18p

Subject Terms: SIMULTANEOUS multithreading processors, COMPUTER systems, CYBER physical systems, DETERMINISTIC algorithms, ARCHITECTURAL design, SYSTEMS engineering

Evolvable multi-processor: a novel MPSoC architecture with evolvable task decomposition and scheduling.

Authors: Vakili, S. Fakhraie, S. M. Mohammadi, S.

Source: IET Computers & Digital Techniques (Institution of Engineering & Technology); Mar2010, Vol. 4 Issue 2, p143-156, 14p, 7 Diagrams, 4 Charts, 1 Graph

Subject Terms: SYSTEMS on a chip, COMPUTER systems, COMPUTER engineering, COMPUTER software development, FAULT-tolerant computing

STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse.

Authors: Yue, Jinshan Liu, Yongpan Yuan, Zhe et al.

Source: IEEE Journal of Solid-State Circuits; Aug2022, Vol. 57 Issue 8, p2560-2573, 14p

Subject Terms: MACRO processors, ENERGY consumption, SYSTEM integration, VIDEO coding, ARCHITECTURAL design, COMPUTER architecture

GPU-Like On-Chip System for Decoding LDPC Codes.

Authors: LE GAL, BERTRAND JEGO, CHRISTOPHE

Source: ACM Transactions on Embedded Computing Systems; Feb2014, Vol. 13 Issue 4, p95-95:19, 20p

Subject Terms: SYSTEMS on a chip, GRAPHICS processing units, FORWARD error correction, RAPID prototyping, MATHEMATICAL models, ALGORITHMS, COMPUTER simulation, FIELD programmable gate arrays, DECODERS & decoding, CODING theory

Distributed Architecture for Resource Management in Large Scale Grids

Authors: Jeanvoine, Emmanuel Rilling, Louis Morin, Christine et al.

Contributors: Jeanvoine, Emmanuel Rilling, Louis Morin, Christine et al.

Source: https://inria.hal.science/inria-00001066 ; [Research Report] PI 1775, 2006, pp.13.

Subject Terms: Grid computing, distributed system, peer-to-peer overlay networks, resource allocation, self-healing \\ Grille de calcul, système distribué, réseaux logiques pair-à-pair, allocation de ressources, auto-réparation, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH]

Relation: Report N°: PI 1775

Availability: https://inria.hal.science/inria-00001066
https://inria.hal.science/inria-00001066v1/document
https://inria.hal.science/inria-00001066v1/file/PI-1775.pdf

SELF-ASSESSMENT PROCEDURE XII.

Authors: Winner, Robert I. Carter, Edward M.

Source: Communications of the ACM; Jan1984, Vol. 27 Issue 1, p29-36, 8p

Subject Terms: COMPUTER architecture, ASSOCIATIONS, institutions, etc., COMPUTER science, SYSTEMS development, COMPUTER systems, COMPUTERS, SOCIETIES, INSTRUCTIONAL systems, EDUCATION

PARALLEL ALGORITHMS FOR THE EXECUTION OF RELATIONAL DATABASE OPERATIONS REVISITED ON GRIDS.

Authors: Mach, Werner Schikuta, Erich

Source: International Journal of High Performance Computing Applications; May2009, Vol. 23 Issue 2, p152-170, 19p, 4 Diagrams, 4 Charts, 19 Graphs

Subject Terms: PARALLEL algorithms, GRID computing, RELATIONAL databases, DATA transmission systems, GRIDS (Cartography), COMPUTER architecture, GEOGRAPHICAL positions, DATABASE selection, DATABASES

Lightweight Chip Multi-Threading (LCMT): Maximizing Fine-Grained Parallelism On-Chip.

Authors: Li, Sheng Kuntz, Shannon Brockman, Jay et al.

Source: IEEE Transactions on Parallel & Distributed Systems; Jul2011, Vol. 22 Issue 7, p1178-1191, 0p

Subject Terms: INTEGRATED circuits, SIMULTANEOUS multithreading processors, PARALLEL algorithms, SIMULATION methods & models, PERFORMANCE evaluation, MULTICORE processors, SYNCHRONIZATION, COMPUTER software, COMPUTER architecture