Search Results - acm: c.: computer system organization/c.1: processor architectures/c.1.4: parallel architektura*
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Authors: et al.
Contributors: et al.
Source: Bibliogr. przy rozdz.
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Alternate Title: Stack matrix architecture for parallel processing using reverse Polish notation. (English)
Authors:
Source: Przegląd Elektrotechniczny; 2025, Issue 10, p82-89, 8p
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Source: Bibliogr. s. 310-339. Indeks.
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Subject Terms: Algorytmy, Architektura komputerów, Przetwarzanie równoległe (informatyka)
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Authors: Shiva, Sajjan G.
Source: Bibliogr. przy rozdziałach.
Subject Terms: Architektura komputerów, Komputery równoległe, Komputery potokowe
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Authors: et al.
Contributors: et al.
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Authors: et al.
Contributors: et al.
Source: Bibliogr. przy rozdz. Indeks.
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Authors: et al.
Contributors: et al.
Source: Bibliogr. przy rozdz. Indeks.
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Authors: By:MARTIN BANKS
Source: Financial Times (London, England), April 23, 1991, p. 10 9pp
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Source: Bibliogr. przy poszczególnych rozdziałach.
Subject Terms: Architektura komputerów, Przetwarzanie równoległe (informatyka)
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Authors: et al.
Contributors: et al.
Source: Bibliogr. przy rozdz.
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Authors: Feldman, Julian
Source: Communications of the ACM. 5(9)
Subject Terms: Information and Computing Sciences, Information Systems, Information and computing sciences
File Description: application/pdf
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Authors:
Source: Sensors (14248220); 1/15/2020, Vol. 20 Issue 2, p1-20, 20p
Subject Terms: MICROPROCESSORS, GLOBAL Positioning System, BASEBAND, MICROCONTROLLERS, GATE array circuits, FLASH memory
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Alternate Title: Information Architecture in Foreign Literature 1982–2018. Quantitative Analysis. (English)
Authors: Matysek, Anna
Source: Zagadnienia Informacji Naukowej; 2018, Vol. 112 Issue 2, p88-111, 24p
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Subject Terms: peephole optimalizátor, peephole optimalizace, LLVM, backend, překladač, mikroprocesorová architektura, popis architektury, peephole optimizer, peephole optimization, compiler, microprocessor architecture, architecture description
File Description: text/html
Relation: MINISTR, M. Peephole optimalizátor pro konfigurovatelné architektury procesorů [online]. Brno: Vysoké učení technické v Brně. Fakulta informačních technologií. 2012.; 79137; http://hdl.handle.net/11012/52891
Availability: http://hdl.handle.net/11012/52891
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Authors: et al.
Contributors: et al.
Source: Bibliogr. s. 397. Indeksy.
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Authors: Amenyo, John-Thones
Source: Journal of Educational Computing Research. 2012 47(4):351-370.
Peer Reviewed: Y
Page Count: 20
Descriptors: Educational Games, Computer Games, Computer Uses in Education, Programming, Information Science, Computer Science Education, Computer System Design, STEM Education, Professional Personnel, Training Methods, Instructional Materials, Educational Strategies, Computer Simulation, College Instruction
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