Výsledky vyhledávání - acm: c.: computer system organization/c.1: processor architecture*

Novel Architecture of Smart FFT Processor

Autoři: Teymourzadeh, Rozita University of California San Francisco (UC San Francisco) University of California (UC)

Přispěvatelé: Teymourzadeh, Rozita University of California San Francisco (UC San Francisco) University of California (UC)

Zdroj: https://hal.archives-ouvertes.fr/hal-01802071 ; 2014.

Témata: FFT, Digital Design, Processor, VLSI, Novel Architecture, Radix, Harmonic, ACM: D.: Software, ACM: B.: Hardware, ACM: C.: Computer Systems Organization, ACM: I.: Computing Methodologies, ACM: B.: Hardware/B.6: LOGIC DESIGN, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES, [INFO]Computer Science [cs], [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [SPI]Engineering Sciences [physics], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, [SPI.TRON]Engineering Sciences [physics]/Electronics

Relation: hal-01802071; https://hal.archives-ouvertes.fr/hal-01802071; https://hal.archives-ouvertes.fr/hal-01802071/document; https://hal.archives-ouvertes.fr/hal-01802071/file/Novel%20Architecture%20of%20Smart%20FFT%20Processor_Draft.pdf

Dostupnost: https://hal.archives-ouvertes.fr/hal-01802071
https://hal.archives-ouvertes.fr/hal-01802071/document
https://hal.archives-ouvertes.fr/hal-01802071/file/Novel%20Architecture%20of%20Smart%20FFT%20Processor_Draft.pdf

Reconstruction of switching thresholds in piecewise-affine models of genetic regulatory networks

Autoři: Drulhe, Samuel Ferrari-Trecate, Giancarlo de Jong, Hidde a další

Přispěvatelé: Drulhe, Samuel Ferrari-Trecate, Giancarlo de Jong, Hidde a další

Zdroj: Hybrid Systems: Computation and Control, HSCC 2006 ; https://inria.hal.science/inria-00001225 ; Hybrid Systems: Computation and Control, HSCC 2006, Mar 2006, Santa Barbara, CA, USA, pp.184 - 199, ⟨10.1007/11730637⟩

Témata: Hybrid system, Genetic regulatory network, system identification, switching thresholds reconstruction, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.5: Heterogeneous (hybrid) systems, ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.1: Simulation Theory/I.6.1.1: Systems theory, [SDV.OT]Life Sciences [q-bio]/Other [q-bio.OT]

Dostupnost: https://inria.hal.science/inria-00001225
https://inria.hal.science/inria-00001225v1/document
https://inria.hal.science/inria-00001225v1/file/LNCS_HSCC06.pdf
https://doi.org/10.1007/11730637

Towards a New Processor Architecture. ; Vers une nouvelle Architecture de Processeurs

Autoři: Vincent, Pierre Landru, Jacques Ecole nationale supérieure Mines-Télécom Lille Douai (IMT Nord Europe) a další

Přispěvatelé: Vincent, Pierre Landru, Jacques Ecole nationale supérieure Mines-Télécom Lille Douai (IMT Nord Europe) a další

Zdroj: https://hal.science/hal-05117313 ; 2025.

Témata: silicon, parallel, serial, RISC, photonics, computer, optronics, optics, processor, fiber, laser, digital, silicium, parallèle, série, processeur, photonique, ordinateur, optronique, optique, numérique, fibre, ACM: B.: Hardware, ACM: C.: Computer Systems Organization, [INFO]Computer Science [cs], [PHYS]Physics [physics]

Dostupnost: https://hal.science/hal-05117313
https://hal.science/hal-05117313v2/document
https://hal.science/hal-05117313v2/file/frParalSerieRiscV1.pdf

Introduction à l'architecture des ordinateurs

Autoři: Anceau, François Etiemble, Daniel Circuits Intégrés Numériques et Analogiques (CIAN) a další

Přispěvatelé: Anceau, François Etiemble, Daniel Circuits Intégrés Numériques et Analogiques (CIAN) a další

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01794102 ; 2010.

Témata: Architecture des ordinateurs, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://hal.science/hal-01794102

Evolution de l'architecture des ordinateurs

Autoři: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Přispěvatelé: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793615 ; 2016.

Témata: mur de la chaleur, mur mémoire, technologie CMOS, GPU, multi-cœur, CPU, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://hal.science/hal-01793615

Exploring branch predictability limits with the MTAGE+SC predictor *

Autoři: Seznec, André Pushing Architecture and Compilation for Application Performance (PACAP) Inria Rennes – Bretagne Atlantique a další

Přispěvatelé: Seznec, André Pushing Architecture and Compilation for Application Performance (PACAP) Inria Rennes – Bretagne Atlantique a další

Zdroj: 5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5)
https://inria.hal.science/hal-01354251
5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5), Jun 2016, Seoul, South Korea. pp.4
http://www.jilp.org/cbp2016/

Témata: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures/C.1.1.1: Pipeline processors, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Seoul, South Korea

Dostupnost: https://inria.hal.science/hal-01354251
https://inria.hal.science/hal-01354251v1/document
https://inria.hal.science/hal-01354251v1/file/MutiTage-SC.pdf

TAGE-SC-L Branch Predictors Again

Autoři: Seznec, André Pushing Architecture and Compilation for Application Performance (PACAP) Inria Rennes – Bretagne Atlantique a další

Přispěvatelé: Seznec, André Pushing Architecture and Compilation for Application Performance (PACAP) Inria Rennes – Bretagne Atlantique a další

Zdroj: 5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5)
https://inria.hal.science/hal-01354253
5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5), Jun 2016, Seoul, South Korea
http://www.jilp.org/cbp2016/

Témata: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures/C.1.1.1: Pipeline processors, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Seoul, South Korea

Dostupnost: https://inria.hal.science/hal-01354253
https://inria.hal.science/hal-01354253v1/document
https://inria.hal.science/hal-01354253v1/file/CBP2016-TAGE-SC-L%20.pdf

Skewed Compressed Cache

Autoři: Sardashti, Somayeh Seznec, André Wood, David A. a další

Přispěvatelé: Sardashti, Somayeh Seznec, André Wood, David A. a další

Zdroj: Proceeding of the 47th Annual IEEE/ACM International Symposium on Microarchitecture ; MICRO - 47th Annual IEEE/ACM International Symposium on Microarchitecture ; https://inria.hal.science/hal-01088050 ; MICRO - 47th Annual IEEE/ACM International Symposium on Microarchitecture, Dec 2014, Cambridge, United Kingdom

Témata: component, cache design, compression, performance, energy, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Cambridge, United Kingdom

Relation: info:eu-repo/grantAgreement//267175/EU/Defying Amdahl\'s Law/DAL

Dostupnost: https://inria.hal.science/hal-01088050
https://inria.hal.science/hal-01088050/document
https://inria.hal.science/hal-01088050/file/scc%20october%202%20%281%29.pdf

On-Chip Memory Architecture Exploration Framework for DSP Processor-Based Embedded System on Chip.

Autoři: Kumar, T. S. Rajesh Govindarajan, R. Ravikumar, C. P.

Zdroj: ACM Transactions on Embedded Computing Systems; Mar2012, Vol. 11 Issue 1, p1-25, 25p

Témata: SYSTEMS on a chip, COMPUTER storage devices, COMPUTER architecture, DIGITAL signal processing, EMBEDDED computer systems, PERFORMANCE evaluation, PERSONAL computers

Yet Another Compressed Cache: a Low Cost Yet Effective Compressed Cache

Autoři: Sardashti, Somayeh Seznec, André Wood, David A. a další

Přispěvatelé: Sardashti, Somayeh Seznec, André Wood, David A. a další

Zdroj: ISSN: 1544-3566.

Témata: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors), [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: info:eu-repo/grantAgreement//267175/EU/Defying Amdahl\'s Law/DAL

Dostupnost: https://inria.hal.science/hal-01354248
https://inria.hal.science/hal-01354248v1/document
https://inria.hal.science/hal-01354248v1/file/yacc-taco-july%2022-final.pdf
https://doi.org/10.1145/2976740

Flexible Web-Based Educational System for Teaching Computer Architecture and Organization.

Autoři: Djordjevic, Jovan Nikolic, Bosko Milenkovic, Aleksandar

Zdroj: IEEE Transactions on Education; May2005, Vol. 48 Issue 2, p264-273, 10p

Témata: COMPUTER training, EDUCATION, TEACHING, COMPUTER architecture, COMPUTER input-output equipment, COMPUTER science

TAGE-SC-L Branch Predictors

Autoři: Seznec, André Amdahl's Law is Forever (ALF) Inria Rennes – Bretagne Atlantique a další

Přispěvatelé: Seznec, André Amdahl's Law is Forever (ALF) Inria Rennes – Bretagne Atlantique a další

Zdroj: Proceedings of the 4th Championship Branch Prediction ; JILP - Championship Branch Prediction ; https://inria.hal.science/hal-01086920 ; JILP - Championship Branch Prediction, Jun 2014, Minneapolis, United States ; http://www.jilp.org/cbp2014/

Témata: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Minneapolis, United States

Relation: info:eu-repo/grantAgreement//267175/EU/Defying Amdahl\'s Law/DAL

Dostupnost: https://inria.hal.science/hal-01086920
https://inria.hal.science/hal-01086920/document
https://inria.hal.science/hal-01086920/file/CBP4-TAGE-SC-L.pdf

Processeurs VLIW

Autoři: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Přispěvatelé: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793958 ; 2015.

Témata: Parallélisme d'instructions, VLIW, pipeline logiciel, traitement du signal, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://hal.science/hal-01793958

Extensions SIMD des jeux d'instructions

Autoři: Etiemble, Daniel Lacassagne, Lionel Laboratoire de Recherche en Informatique (LRI) a další

Přispěvatelé: Etiemble, Daniel Lacassagne, Lionel Laboratoire de Recherche en Informatique (LRI) a další

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793974 ; Techniques de l'Ingénieur, 2015.

Témata: Instructions SIMD, SSE, intrinsèque, vectorisation, Altivec, Neon, AVX, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://hal.science/hal-01793974

Introduction au parallélisme et aux architectures parallèles

Autoři: Etiemble, Daniel Cappello, Franck Laboratoire de Recherche en Informatique (LRI) a další

Přispěvatelé: Etiemble, Daniel Cappello, Franck Laboratoire de Recherche en Informatique (LRI) a další

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793592 ; 2017.

Témata: pThreads, loi d'Amdhal, modèle Roofline, mémoires partagées et distribuées, parallélisme de données et de contrôle, modèles d'exécution, classification de Flynn, extensions SIMD, OpenMP, modèles de programmation, MPI, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://hal.science/hal-01793592

Jeux d'instructions des processeurs

Autoři: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Přispěvatelé: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Zdroj: https://hal.science/hal-01794009 ; 2016.

Témata: CISC, format d'instructions, type d'instructions, RISC, interface matériel-logiciel, jeu d'instructions, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://hal.science/hal-01794009

Processeurs superscalaires 'flots de données'

Autoři: Anceau, François Etiemble, Daniel Circuits Intégrés Numériques et Analogiques (CIAN) a další

Přispěvatelé: Anceau, François Etiemble, Daniel Circuits Intégrés Numériques et Analogiques (CIAN) a další

Zdroj: https://hal.science/hal-01793606 ; 2018.

Témata: superscalaire, parpallélisme d’instruction, flot de données, renommage de registres, stations de réservation, tampon de réordonnancement, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://hal.science/hal-01793606

Processeurs superscalaires multi-pipelines

Autoři: Etiemble, Daniel Anceau, François Laboratoire de Recherche en Informatique (LRI) a další

Přispěvatelé: Etiemble, Daniel Anceau, François Laboratoire de Recherche en Informatique (LRI) a další

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793667 ; 2015.

Témata: superscalaire, multi-pipeline, lancement des instructions, parallélisme d'instructions, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://hal.science/hal-01793667

Processeurs : exécution pipeline des instructions

Autoři: Etiemble, Daniel Anceau, François Laboratoire de Recherche en Informatique (LRI) a další

Přispěvatelé: Etiemble, Daniel Anceau, François Laboratoire de Recherche en Informatique (LRI) a další

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793994 ; 2013.

Témata: Pipeline, superpipeline, renommage de registres, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://hal.science/hal-01793994

Hiérarchie mémoire : les caches

Autoři: Etiemble, Daniel Anceau, François Laboratoire de Recherche en Informatique (LRI) a další

Přispěvatelé: Etiemble, Daniel Anceau, François Laboratoire de Recherche en Informatique (LRI) a další

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01794025 ; 2012.

Témata: fonctionnement des caches, cohérence des caches, caches multiprocesseurs et multicoeurs, optimisations logicielles, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://hal.science/hal-01794025