Search Results - acm: c.: computer system organization/c.1: procesov architectures/c.1.4: parallel architecture~

Mobile Robot Architecture with Parallelism between and within Layers / 階層間・階層内並列実行による走行ロボットアーキテクチャ

Authors: Yoshimasa Goto 後藤 吉正

Source: 日本機械学会論文集 C編 / Transactions of the Japan Society of Mechanical Engineers Series C. 1993, 59(563):2198

dg2vhdl a tool to facilitate the high level synthesisof parallel processing array architectures: DG2VHDL: A tool to facilitate the high level synthesis of parallel processing array architectures

Authors: Elias S. Manolakos Andrew Stone

Subject Terms: Computer system organization, signal flow graphs

File Description: application/xml

Access URL: https://dblp.uni-trier.de/db/journals/vlsisp/vlsisp24.html#StoneM00
https://link.springer.com/article/10.1023%2FA%3A1008122812813

Software Architecture for Parallel Computer Vision ( 'Parallel and Cooperative Processing for Image Understanding') / 並列画像理解のソフトウェアアーキテクチャ (<小特集>「並列・分散協調画像理解」)

Authors: Rin-ichiro TANIGUCHI 谷口 倫一郎

Source: 人工知能 / Journal of the Japanese Society for Artificial Intelligence. 1994, 9(5):652

Integrated Continuous Healthcare Team Computer System Architecture

Authors: Caeiro, J. Oliveira, H. Goes, M. et al.

Subject Terms: Integrated Continuous Healthcare, Computer System Architecture

Relation: Jasnau Caeiro, J., Oliveira, H., Goes, M., Lopes, M. J., & Fonseca, C. (2020). Integrated Continuous Healthcare Team Computer System Architecture. In D. Mendes, C. Fonseca, M. Lopes, J. García-Alonso, & J. Murillo (Eds.), Exploring the Role of ICTs in Healthy Aging (pp. 231-246). IGI Global.; https://www.igi-global.com/gateway/chapter/254655; nd; mjl@uevora.pt; cfonseca@uevora.pt; 745

Availability: http://hdl.handle.net/10174/34154

Parallel Computer Architectures for the SPMD Programming Model

Authors: 北島宏之 [著]

File Description: image/jp2

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I3177822

Degree: 博士 (情報科学) -- 東北大学

A parallel architecture for computer graphics based on the conflict-free multiport frame buffer

Authors: 西村憲 [著]

File Description: image/jp2

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I3127088

Degree: 博士 (理学) -- 東京大学

Study on architectures for parallel opto-electronic computer

Authors: 林森茂 [著]

File Description: image/jp2

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I3116433

Degree: 博士 (工学) -- 東京工業大学

Design and implementation of function-classified parallel computer architecture for personal robots ASPIRE with application to active interface

Authors: 山崎信行 [著]

File Description: image/jp2

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I3109093

Degree: 博士 (工学) -- 慶應義塾大学

Parallel VLSI architecture emulation and the organization of APSA/MPP

Authors: Odonnell, John T

Source: NASA. Goddard Space Flight Center, Frontiers of Massively Parallel Scientific Computation.

Subject Terms: Computer Programming And Software

Access URL: https://ntrs.nasa.gov/citations/19870017108

Efficient parallel architecture for highly coupled real-time linear system applications

Authors: Carroll, Chester C Homaifar, Abdollah Barua, Soumavo

Subject Terms: Computer Operations And Hardware

Access URL: https://ntrs.nasa.gov/citations/19880010631

A modular, massively parallel computer architecture for trainable real-time control systems

Authors: Nilsson, Kenneth Svensson, Bertil Wiberg, Per-Arne

Source: Control Engineering Practice. 1(4):655-661

Subject Terms: Algorithms, Control systems, Neural networks, Parallel processing systems, Real time systems, Control system design, Learning systems, Static scheduling, Time deterministic manner, Computer architecture

File Description: print

Access URL: https://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-37653

A comparison of message passing and shared memory architectures for data parallel programs

Authors: Klaiber, A. C. Levy, H. M.

Source: ACM SIGARCH Computer Architecture News ; volume 22, issue 2, page 94-105 ; ISSN 0163-5964

Availability: https://doi.org/10.1145/192007.192020
https://dl.acm.org/doi/10.1145/192007.192020
https://dl.acm.org/doi/pdf/10.1145/192007.192020

Book review: Computing with Parallel Architectures: T.Node edited by D. Gassilloud and J. C. Grossetie (Kluwer Academic Publishers 1991)

Authors: Allen, Ken

Source: ACM SIGARCH Computer Architecture News ; volume 20, issue 4, page 65-66 ; ISSN 0163-5964

Availability: https://doi.org/10.1145/142880.773996
https://dl.acm.org/doi/10.1145/142880.773996
https://dl.acm.org/doi/pdf/10.1145/142880.773996

Proceedings of the 1989 ACM symposium on parallel algorithms and architectures

Source: Conference: Association for Computing Machinery (ACM) symposium on parallel algorithms and architectures, Santa Fe, NM (United States), 18-21 Jun 1989

File Description: Medium: X; Size: Pages: (434 p)

Access URL: http://www.osti.gov/scitech/biblio/5015495

Playable Serious Games for Studying and Programming Computational STEM and Informatics Applications of Distributed and Parallel Computer Architectures

Authors: Amenyo, John-Thones

Source: Journal of Educational Computing Research. 2012 47(4):351-370.

Peer Reviewed: Y

Page Count: 20

Descriptors: Educational Games, Computer Games, Computer Uses in Education, Programming, Information Science, Computer Science Education, Computer System Design, STEM Education, Professional Personnel, Training Methods, Instructional Materials, Educational Strategies, Computer Simulation, College Instruction

Access URL: https://baywood.metapress.com/link.asp?target=contribution&id=C382164612W4M379

MITRE's future generation computer architectures program

Authors: Bensley, E. H. Brando, T. J. Fohlin, J. C. et al.

Source: ACM SIGPLAN Notices ; volume 24, issue 4, page 99-101 ; ISSN 0362-1340 1558-1160

Availability: https://doi.org/10.1145/67387.67412
https://dl.acm.org/doi/10.1145/67387.67412
https://dl.acm.org/doi/pdf/10.1145/67387.67412

Proceedings of the 2nd annual ACM symposium on parallel algorithms and architectures

Source: Conference: SPAA '90: 2nd annual Association for Computing Machinery (ACM) symposium on parallel algorithms and architectures, Island of Crete (Greece), 2-6 Jul 1990

File Description: Medium: X; Size: Pages: (417 p)

Access URL: http://www.osti.gov/scitech/biblio/5015823

The new generation of computer architecture

Authors: Treleaven, Philip C.

Source: ACM SIGARCH Computer Architecture News ; volume 11, issue 3, page 402-409 ; ISSN 0163-5964

Availability: https://doi.org/10.1145/1067651.801680
https://dl.acm.org/doi/10.1145/1067651.801680
https://dl.acm.org/doi/pdf/10.1145/1067651.801680

NETRA: A parallel architecture for integrated vision systems. 1: Architecture and organization

Authors: Choudhary, Alok N Patel, Janak H Ahuja, Narendra

Subject Terms: Cybernetics

Access URL: https://ntrs.nasa.gov/citations/19900005523

HARS: A Hardware-Assisted Runtime Software for embedded many-core architectures

Authors: Lhuillier, Y. Ojail, M. Guerre, A. et al.

Contributors: Lhuillier, Y. Ojail, M. Guerre, A. et al.

Source: ISSN: 1539-9087.

Subject Terms: B.5.0 [Register-Transfer-Level Implementation]: General, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.7: Organization and Design/D.4.7.4: Real-time systems and embedded systems, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.1: Process Management, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION, [INFO]Computer Science [cs]

Availability: https://cea.hal.science/cea-01818892
https://doi.org/10.1145/2517311