Výsledky vyhledávání - acm: c.: computer system organizacion/c.1: processor architectural~
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Zdroj: RAPIDO '15 Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools ; https://cea.hal.science/cea-01818887 ; RAPIDO '15 Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, Jan 2015, Amsterdam, Netherlands. ⟨10.1145/2693433.2693440⟩
Témata: ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.7: Simulation Support Systems, ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.7: Simulation Support Systems/I.6.7.0: Environments, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures, [INFO]Computer Science [cs]
Geografické téma: Amsterdam, Netherlands
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Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00446303 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_22⟩
Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems
Relation: inria-00446303; https://hal.inria.fr/inria-00446303
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Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00446288 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_20⟩
Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems
Relation: inria-00446288; https://hal.inria.fr/inria-00446288
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Zdroj: https://inria.hal.science/inria-00110507 ; [Research Report] PI 1822, 2006, pp.19.
Témata: Multi-core processor, temperature, thread scheduling, time slice, activity migration, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]
Relation: Report N°: PI 1822
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Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00445984 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_16⟩
Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems
Relation: inria-00445984; https://hal.inria.fr/inria-00445984
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Zdroj: https://inria.hal.science/tel-01956255 ; Hardware Architecture [cs.AR]. Université de Rennes 1 [UR1], 2018. English. ⟨NNT : ⟩.
Témata: Network on chip NoC, Réseau sur puce NoC, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.1: Network Architecture and Design, ACM: D.: Software/D.4: OPERATING SYSTEMS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ET]Computer Science [cs]/Emerging Technologies [cs.ET]
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Zdroj: https://inria.hal.science/inria-00340566 ; [Research Report] PI 1909, 2008, pp.20.
Témata: Heterogeneous multicore processor, power consumption, heat flux, periodic activity migration, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]
Relation: Report N°: PI 1909
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Zdroj: ISSN: 1551-3688 ; ACM SIGBED Review ; https://hal.univ-brest.fr/hal-00983407 ; ACM SIGBED Review, 2014, 11 (1.
Témata: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems
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Zdroj: Design Automation Conference ; https://hal.science/hal-00077558 ; 2002, pp100
Témata: FLPA, Power characterization, C code, Energy, Estimation, DSP VLIW, IEEE, ACM, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]
Dostupnost: https://hal.science/hal-00077558
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Témata: Categories and Subject Descriptors, C.3 [Computer Systems Organization, Special-Purpose and Application-Based Systems, C.1.3 [Processor Architectures, Other Architecture Styles General Terms, Performance, Design, Reliability Additional Key Words and Phrases, Embedded systems, probabilistic computing ACM Reference Format
Popis souboru: application/pdf
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Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00445500 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_10⟩
Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems
Relation: inria-00445500; https://hal.inria.fr/inria-00445500
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Témata: 密碼學, 處理器, 安全性, 測試排程, Cryptography, processor, security, test scheduling
Time: 45
Popis souboru: 155 bytes; text/html
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Koblitz, “Elliptic curve cryptosystems,” in Mathmatics of Computation, pp. 203–209, 1987. [10] W. Diffie and M. E. Hellman, “New directions in cryptography,” IEEE Trans. Information Theory, vol. 22, pp. 644–654, Nov. 1976. [11] National Institute of Standards and Technology (NIST), Data Encryption Standard (DES). Springfield, VA 22161: National Technical Information Service, Oct. 1999. [12] National Institute of Standards and Technology (NIST), Secure Hash Standard (SHS). Spring- field, VA 22161: National Technical Information Service, Aug. 2002. [13] R. L. Rivest, “The MD5 message-digest algorithm.” RFC 1321, the Internet Society, Apr. 1992. [14] P. L. Montgomery, “Modular multiplication without trial division,” Math. Computation, vol. 44, no. 7, pp. 519–521, 1985. [15] P.-S. Chen, S.-A. Hwang, and C.-W.Wu, “A systolic RSA public key cryptosystem,” in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), vol. 4, (Atlanta), pp. 408–411, May 1996. [16] C.-C. Yang, T.-S. Chang, and C.-W. Jen, “A new RSA cryptosystem hardware design based on Montgomery’s algorithm,” IEEE Trans. Circuits and Systems II: Analog and Digital Signal Processing, vol. 45, pp. 908–913, July 1998. [17] C.-Y. Su, S.-A. Hwang, P.-S. Chen, and C.-W. Wu, “An improved Montgomery algorithm for high-speed RSA public-key cryptosystem,” IEEE Trans. VLSI Systems, vol. 7, pp. 280–284, June 1999. [18] J.-H. Hong and C.-W. Wu, “A radix-4 cellular array modular multiplier based on Montgomery’s algorithm and Booth’s algorithm,” in Proc. 10th VLSI Design/CAD Symp., (Nantou), pp. 165–168, Aug. 1999. [19] C.-H. Wu, J.-H. Hong, and C.-W. Wu, “VLSI design of RSA cryptosystem based on the Chinese Remainder Theorem,” J. Inform. Science and Engineering, vol. 17, pp. 967–979, Nov. 2001. [20] Y.-C. Lin, “A word-based RSA public-key crypto-processor core for IC smart card,” master thesis, Dept. Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan, June 2001. [21] A. F. Tenca, G. Todorov, and C¸ .K.Koc¸, “High-radix design of a scalable modular multiplier,” in Cryptographic Hardware and Embedded Systems (CHES) 2001 (C¸ . K. Koc¸, D. Naccache, and C. Paar, eds.), vol. 2162 of LNCS, pp. 189–205, Springer-Verlag, 2001. [22] M.-C. Sun, C.-P. Su, C.-T. Huang, and C.-W. Wu, “Design of a scalable RSA and ECC crypto-processor,” in Proc. Asia and South Pacific Design Automation Conf. (ASP-DAC), (Kitakyushu), pp. 495–498, Jan. 2003. (Best Paper Award). [23] E. Savas¸, A. F. Tenca, and C¸ .K. Koc¸, “A scalable and unified multiplier architecture for finite fields GF(p) and GF(2m),” in Cryptographic Hardware and Embedded Systems (CHES) 2000, LNCS, pp. 281–296, Springer-Verlag, 2000. [24] J. Burke, J. McDonald, and T. Austin, “Architectural support for fast symmetric-key cryptography,” ACM SIGPLN Notices, vol. 35, pp. 178–189, Nov. 2000. [25] L. Wu, C. Weaver, and T. Austin, “CryptoManiac: A fast flexible architecture for secure communication,” in Proc. 28th Ann. Int. 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Springfield, VA 22161: National Technical Information Service, Mar. 2002. [31] N. Cravotta, “Accelerating high-speed encryption: one bottleneck after another,” 2001. [32] W. Feghali, B. Burres, G. Wolrich, and D. Carrigan, “Security: Adding protection to the network via the network processor,” Intel Technology Journal, vol. 6, no. 3, pp. 40–49, 2002. [33] P. C. Lekkas, Network Processors: Architectures, Protocols, and Platforms. McGraw-Hill, 2003. [34] E. Khan, M. W. El-Kharashi, A. N. M. E. Rafiq, F. Gebali, and M. Abd-El-Barr, “Network processors for communication security: A review,” in Proc. IEEE Pacific Rim Conf. Communications, Computers and Signal Processing, pp. 173–176, 2003. [35] V. R. J.Daemen, “The Block Cipher Rijndael,” in Smart Card Research and Application, vol. 1820 of LNCS, pp. 288–296, Springer-Verlag, 2000. [36] A. Dandalis, V. K. Prasanna, and J. D. P. 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(ISC), vol. 2200 of LNCS, pp. 220–234, Springer- Verlag, Oct. 2001. [40] K. U. Jarvinen, M. T. Tommiska, and J. O. Skytta, “A fully pipelined memoryless 17.8 Gbps AES-128 encryptor,” in Proc. Int. Symp. Field-Programmable Gate Arrays (FPGA), (Monterey), pp. 207–215, ACM Press, 2003. [41] I. Verbauwhede, P. Schaumont, and H. Kuo, “Design and performance testing of a 2.29-GB/s Rijndael processor,” IEEE Journal of Solid-State Circuits, vol. 38, pp. 569–572, Mar. 2003. [42] V. Fischer and M. Drutarovsky, “Two methods of Rijndael implementation in reconfigurable hardware,” in Cryptographic Hardware and Embedded Systems (CHES) 2001, vol. 2162 of LNCS, pp. 77–92, Springer-Verlag, May 2001. [43] S. Morioka and A. Satoh, “A 10Gbps full-AES crypto design with a twisted-BDD S-Box architecture,” in Proc. IEEE Int. Conf. Computer Design (ICCD), (Freiburg, Germany), pp. 98– 103, Sept. 2002. [44] U. Mayer, C. Oelsner, and T. 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[83] E. J. Marinissen, S. Goel, and M. Lousberg, “Wrapper design for embedded core test,” in Proc. Int. Test Conf. (ITC), pp. 911–920, 2000. [84] E. J. Marinissen and S. K. Goel, “Analysis of test bandwidth utilization in test bus and TestRail architectures for SOCs,” in Proc. IEEE Int. Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS), pp. 52–60, Apr. 2002. [85] V. Iyengar and K. Chakrabarty, “Test bus sizing for system-on-a-chip,” IEEE Trans. Computers, vol. 51, pp. 449–459, May 2002. [86] M. C. Golumbic, Algorithmic Graph Theory and Perfect Graphs. New York: Academic Press, 1980. [87] W.-L. Hsu and T.-H. Ma, “Fast and simple algorithm for recognizing chordal comparability graphs and interval graphs,” SIAM J. Computing, vol. 28, no. 3, pp. 1004–1020, 1999. [88] E. T. F. Glover and D. de Werra, “A user’s guide to Tabu Search,” Annals of Operations Research, vol. 41, pp. 3–28, 1993. [89] E. J. Marinissen, V. Iyengar, and K. Chakrabarty, “A set of benchmarks for modular testing of SOCs,” in Proc. Int. Test Conf. (ITC), (Baltimore), pp. 519–528, Oct. 2002. [90] C.-P. Su and C.-W.Wu, “A graph-based approach to power-constrained SOC test scheduling,” J. Electronic Testing: Theory and Applications, vol. 20, pp. 45–60, Feb. 2003.; http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/36018
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Zdroj: https://inria.hal.science/inria-00000469 ; [Research Report] PI 1704, 2005, pp.13.
Témata: Cluster management, distributed system, operating system, single system image, OSCAR, Kerrighed \\ Administration de grappes, systèmes distribués, système d'exploitation, système à image unique, Kerrighed, ACM: D.: Software/D.4: OPERATING SYSTEMS, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-OS]Computer Science [cs]/Operating Systems [cs.OS]
Relation: Report N°: PI 1704
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Zdroj: 6th International Conference on Cloud Computing and Services Science
CLOSER: Cloud Computing and Services Science
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01341172
CLOSER: Cloud Computing and Services Science, Apr 2016, Roma, Italy. pp.352-359, ⟨10.5220/0005923803520359⟩
http://closer.scitevents.org/DataDiversityConvergence.aspx?y=2016Témata: SQL and NoSQL Integration, Heterogeneous Data Stores, Multistore System, Cloud, ACM: H.: Information Systems/H.2: DATABASE MANAGEMENT/H.2.5: Heterogeneous Databases, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, [INFO.INFO-DB]Computer Science [cs]/Databases [cs.DB]
Relation: info:eu-repo/grantAgreement//611068/EU/A Coherent and Rich PaaS with a Common Programming Model/CoherentPaaS
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Zdroj: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00446343 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_26⟩
Témata: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, manag, lang
Relation: https://hal.inria.fr/inria-00446343
Dostupnost: https://hal.inria.fr/inria-00446343
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Zdroj: Bringing Theory to Practice: Predictability and Performance in Embedded Systems ; https://inria.hal.science/inria-00585320 ; Bringing Theory to Practice: Predictability and Performance in Embedded Systems, Philipp Lucas, Lothar Thiele, Benoit Triquet, Theo Ungerer, and Reinhard Wilhelm, Mar 2011, Grenoble, France. pp.11-21, ⟨10.4230/OASIcs.PPES.2011.11⟩ ; http://drops.dagstuhl.de/opus/volltexte/2011/3077/pdf/2.pdf
Témata: WCET-aware Compilation, WCET Analysis, Time-predictable Architecture, ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS/C.3.2: Real-time and embedded systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures/C.1.1.2: RISC/CISC, VLIW architectures, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-PF]Computer Science [cs]/Performance [cs.PF]
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Zdroj: ACM symposium on Principles of distributed computing (PODC'13) ; https://hal.science/hal-01151136 ; ACM symposium on Principles of distributed computing (PODC'13), Jul 2013, New-York, United States. pp.84-91, ⟨10.1145/2484239.2484271⟩
Témata: Agreement problem, Synchronous distributed system, Byzantine process, Message-passing model, Round-based protocol, EIG, Consensus, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.7: Organization and Design/D.4.7.1: Distributed systems, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.5: Reliability/D.4.5.2: Fault-tolerance, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.1: Process Management/D.4.1.0: Concurrency, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.1: Process Management/D.4.1.5: Synchronization, [INFO]Computer Science [cs], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS]
Geografické téma: New-York, United States
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Zdroj: ISSN: 1383-7621 ; Journal of Systems Architecture ; https://inria.hal.science/hal-00650650 ; Journal of Systems Architecture, 2011, 57, pp.340-353. ⟨10.1016/j.sysarc.2011.01.004⟩.
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Zdroj: https://inria.hal.science/inria-00264111 ; [Research Report] RR-6475, INRIA. 2008, pp.19.
Témata: ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.2: Network Protocols, ACM: G.: Mathematics of Computing/G.3: PROBABILITY AND STATISTICS/G.3.8: Queueing theory, [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, [INFO.INFO-NI]Computer Science [cs]/Networking and Internet Architecture [cs.NI]
Relation: info:eu-repo/semantics/altIdentifier/arxiv/0803.2129; ARXIV: 0803.2129
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Zdroj: https://inria.hal.science/inria-00401773 ; [Research Report] PI 1933, 2009, pp.10.
Témata: Virtualization, bytecode, just-in-time compilation, multicore, many-core, software engineering, software componentss, ACM: D.: Software, [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE]
Relation: Report N°: PI 1933
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