Search Results - acm: c.: computer system organizacion/c.1: procesov architectures/c.1.4: parallel architectures~

Proceedings of the 1989 ACM symposium on parallel algorithms and architectures

Source: Conference: Association for Computing Machinery (ACM) symposium on parallel algorithms and architectures, Santa Fe, NM (United States), 18-21 Jun 1989

File Description: Medium: X; Size: Pages: (434 p)

Access URL: http://www.osti.gov/scitech/biblio/5015495

Proceedings of the 2nd annual ACM symposium on parallel algorithms and architectures

Source: Conference: SPAA '90: 2nd annual Association for Computing Machinery (ACM) symposium on parallel algorithms and architectures, Island of Crete (Greece), 2-6 Jul 1990

File Description: Medium: X; Size: Pages: (417 p)

Access URL: http://www.osti.gov/scitech/biblio/5015823

Survey of The Computer Industry (18): Software takes the driving seat - Mid-Range Systems, hardware architectures under review

Authors: By:MARTIN BANKS

Source: Financial Times (London, England), April 23, 1991, p. 10 9pp

Parallel ILP for distributed-memory architectures

Authors: Nuno A. Fonseca Ashwin Srinivasan Fernando Silva et al.

Subject Terms: Ciência de computadores, Ciências da computação e da informação, Computer science, Computer and information sciences

File Description: application/pdf

Relation: 0885-6125

Availability: https://hdl.handle.net/10216/91401

Parallel algorithms and architectures for LDPC Decoding

Authors: Fernandes, Gabriel Falcão Paiva

Source: FERNANDES, Gabriel Falcão Paiva - Parallel algorithms and architectures for LDPC decoding [em linha]. Coimbra : [s.n], 2010. [Consult. Dia Mês Ano]. Tese de doutoramento. Disponível na WWW:<http://hdl.handle.net/10316/14583>

Subject Terms: Computação paralela, Arquitectura de computadores

Availability: https://hdl.handle.net/10316/14583

A Massively Parallel Adaptive Fast-Multipole Method on Heterogeneous Architectures

Contributors: Biros, George [University of Texas, Austin]

Source: Conference: ACM/IEEE Supercomputing, Portland, OR, USA, 20091114, 20091114

File Description: Medium: X

Access URL: http://www.osti.gov/scitech/biblio/1033545

Grid Generation with Boundary Point Distribution Control using Heterogeneous Parallel Architectures

Authors: Silva, André Barata, Jorge M M uBibliorum

Contributors: Silva, André Barata, Jorge M M uBibliorum

Subject Terms: Airfoils, Grid Generation, Parallel Methods

File Description: application/pdf

Relation: 1973-7459

Availability: http://hdl.handle.net/10400.6/11545

A Massively Parallel Adaptive Fast Multipole Method on Heterogeneous Architectures

Contributors: Biros, George [University of Texas, Austin]

Source: Communications of the ACM; 55; 5

File Description: Medium: X; Size: 101

Access URL: http://www.osti.gov/scitech/biblio/1039644

Survey on A-Z of Computing (2): Providing a definition of standards - Architecture

Authors: By:PHILIP MANCHESTER

Source: Financial Times (London, England), June 23, 1992, 8pp

Readers weigh in on . . .

Authors: By:Readers

Source: IT Business.ca (Canada), June 24, 2005 More News, 5pp

Allocation of Parallel Real-Time Tasks in Distributed Multi-core Architectures supported by an FTT-SE Network

Authors: Martínez, Ricardo Garibay Nelissen, Geoffrey Ferreira, Luís Lino et al.

Contributors: Martínez, Ricardo Garibay Nelissen, Geoffrey Ferreira, Luís Lino et al.

Subject Terms: Constraint Programming, Real-Time, Parallel Tasks, Distributed Multi-core Architectures

File Description: application/pdf

Availability: http://hdl.handle.net/10400.22/6867

Performance comparison of parallel architectures for real-time control

Authors: Daniel, H. A. Ruano, Antonio Sapientia

Contributors: Daniel, H. A. Ruano, Antonio Sapientia

Subject Terms: Real-time control, Adaptive control, Multiprocessors systems, Heterogeneous parallel architectures, Digital signal processors

File Description: application/pdf

Relation: 01419331; 0141-9331; AUT: HDA01050; ARU00698

Availability: http://hdl.handle.net/10400.1/2198

Performance evaluation of parallel algorithms and architectures in concurrent multiprocessor systems. Final report, January-September 1987

Contributors: Pomalaza-Raez, C

File Description: Medium: X; Size: Pages: 22

Access URL: http://www.osti.gov/scitech/biblio/6316609

ARRIS Announces Successful Interoperation of Keystone(TM) D5(TM) DMTS(TM) With Four Video on Demand Vendors; Operators assured of simple integration of the Keystone D5 into present Digital Video networks and emerging M-CMTS architectures

Source: PR Newswire (USA), December 13, 2005, 4pp

Professor wins grant to study networks AMHERST -- UMass Professor Arnold L. Rosenberg has been named one of eight Fulbright scholars from the United States who will be studying in France in the coming year.

Source: Recorder, The (Greenfield, MA), September 3, 1999, 2pp

Learn about the Current Situation within the Sensor Network Industry, Including for Example the Benefits and Limitations for Future Applications

Source: Business Wire, December 16, 2005

Xilinx Delivers Faster Timing Closure in ISE 8.1i, Maximizing FPGA Performance Up to 70% Over Competing Solutions; New ISE Fmax Technology Provides Enhanced Physical Synthesis Capabilities for Virtex-4 and Spartan-3 Architectures

Source: PR Newswire (USA), December 12, 2005, 4pp

Computer architectures: varied blueprints will lift system speeds to dizzying heights

Contributors: Weiss, R

Source: Electron. Des.; (United States); 33:12

File Description: Medium: X; Size: Pages: 82-92

Access URL: http://www.osti.gov/scitech/biblio/6364312

Generation of simulators for PASM-type architectures using a meta-simulator

Contributors: Chang, C

Source: Other Information: Thesis (Ph. D.)

File Description: Medium: X; Size: Pages: 166

Access URL: http://www.osti.gov/scitech/biblio/6998158

Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures

Authors: Casini, Daniel Biondi, Alessandro Nelissen, Geoffrey et al.

Contributors: Casini, Daniel Biondi, Alessandro Nelissen, Geoffrey et al.

Subject Terms: Real-time, Memory feasibility, Parallel tasks, Scratchpad memories

File Description: application/pdf

Relation: 2576-3172

Availability: http://hdl.handle.net/10400.22/12864