Search Results - acm: c.: computer system organizacija/c.1: processor architectures/c.1.4: parallel architektury*

Playable Serious Games for Studying and Programming Computational STEM and Informatics Applications of Distributed and Parallel Computer Architectures

Authors: Amenyo, John-Thones

Source: Journal of Educational Computing Research. 2012 47(4):351-370.

Peer Reviewed: Y

Page Count: 20

Descriptors: Educational Games, Computer Games, Computer Uses in Education, Programming, Information Science, Computer Science Education, Computer System Design, STEM Education, Professional Personnel, Training Methods, Instructional Materials, Educational Strategies, Computer Simulation, College Instruction

Access URL: https://baywood.metapress.com/link.asp?target=contribution&id=C382164612W4M379

A Down-to-Earth Educational Operating System for Up-in-the-Cloud Many-Core Architectures

Authors: Ziwisky, Michael Persohn, Kyle Brylow, Dennis

Source: ACM Transactions on Computing Education. Jan 2013 13(1).

Peer Reviewed: Y

Page Count: 12

Descriptors: Computer Software, Technology Uses in Education, Information Management, Computer Science, Laboratory Experiments, Undergraduate Study, Delivery Systems, Technological Advancement

Peephole optimalizátor pro konfigurovatelné architektury procesorů ; Peephole Optimizer for Configurable Processor Architectures

Authors: Ministr, Martin Masařík, Karel Křoustek, Jakub

Contributors: Ministr, Martin Masařík, Karel Křoustek, Jakub

Subject Terms: peephole optimalizátor, peephole optimalizace, LLVM, backend, překladač, mikroprocesorová architektura, popis architektury, peephole optimizer, peephole optimization, compiler, microprocessor architecture, architecture description

File Description: text/html

Relation: MINISTR, M. Peephole optimalizátor pro konfigurovatelné architektury procesorů [online]. Brno: Vysoké učení technické v Brně. Fakulta informačních technologií. 2012.; 79137; http://hdl.handle.net/11012/52891

Availability: http://hdl.handle.net/11012/52891

TALL—a list processor for the Philco 2000 computer

Authors: Feldman, Julian

Source: Communications of the ACM. 5(9)

Subject Terms: Information and Computing Sciences, Information Systems, Information and computing sciences

File Description: application/pdf

Access URL: https://escholarship.org/uc/item/6qk36727
https://escholarship.org/content/qt6qk36727/qt6qk36727.pdf

Multi-core and Single-core Raspberry Pi Microprocessor's.

Alternate Title: Wielordzeniowe i jednordzeniowe mikroprocesory Raspberry Pi. (Polish)

Authors: SAINUDDIN, Nurulidayu MOHD SULTAN, Juwita AZUANI, Mohamed

Source: Przegląd Elektrotechniczny; 2023, Vol. 99 Issue 1, p38-43, 6p

Subject Terms: RASPBERRY Pi, CENTRAL processing units, MICROPROCESSORS, COMPUTER performance, COMPUTER multitasking, MULTICORE processors

Automatické řízení výpočtu ve specializovaném výpočetním systému ; Specialized Computer System Automatic Control

Authors: Opálka, Jan Kunovský, Jiří Šátek, Václav

Contributors: Opálka, Jan Kunovský, Jiří Šátek, Václav

Subject Terms: derivace, diferenciální rovnice, Taylorova řada, mikroprocesor, numerická integrace, pevná řádová čárka, pohyblivá řádová čárka, integrátor, řadič, boothův algoritmus, paralelní architektury, derivation, diferential equnation, Taylor series, mikroprocessor, numeric integration, fixed point, floating point, integrator, controller, Booth algorithm, parallel architectures

File Description: application/pdf; text/html

Relation: OPÁLKA, J. Automatické řízení výpočtu ve specializovaném výpočetním systému [online]. Brno: Vysoké učení technické v Brně. Fakulta informačních technologií. 2016.; 103587; http://hdl.handle.net/11012/69421

Availability: http://hdl.handle.net/11012/69421

Advanced Computer Architectures.

Authors: Fox, Geoffrey C. Messina, Paul C.

Source: Scientific American. Oct 1987 257(4):66-74.

Peer Reviewed: N

Page Count: 9

Descriptors: Computer Software, Computers, Efficiency, Information Technology, Input Output, Input Output Devices, Problem Solving, Programing, Programing Languages, Science and Society, Systems Approach, Technological Advancement, Technology

Journal Code: CIJJAN1988

Critical Branches and Lucky Loads in Control-Independence Architectures

Authors: Malik, Kshitiz

Source: ProQuest LLC. 2009Ph.D. Dissertation, University of Illinois at Urbana-Champaign.

Peer Reviewed: N

Page Count: 157

Descriptors: Computer System Design, Performance, Engineering

Access URL: https://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:3392207

Analysis of FPGA accelerator architecture for Fast Statistical Convolutional Neural Network in real time Emotional Recognition System.

Alternate Title: Analiza architektury akceleratora FPGA dla szybkiej statystycznej sieci splotowej w systemie rozpoznawania emocji w czasie rzeczywistym. (Polish)

Authors: Samson Immanuel, J. Manoj, G. Prince, Shajin et al.

Source: Przegląd Elektrotechniczny; 2021, Vol. 97 Issue 7, p132-134, 3p

Subject Terms: DEEP learning, CONVOLUTIONAL neural networks, ARTIFICIAL intelligence, APPLICATION-specific integrated circuits, FIELD programmable gate arrays, ALGORITHMS

Using MEMS-based storage in computer systems---MEMS storage architectures

Authors: Hong, Bo Wang, Feng Brandt, Scott A et al.

Source: ACM Transactions on Storage. 2(1)

Subject Terms: Affordable and Clean Energy, Data Format, Networking & Telecommunications

File Description: application/pdf

Access URL: https://escholarship.org/uc/item/8076d22w
https://escholarship.org/content/qt8076d22w/qt8076d22w.pdf

Multiplication of Matrices of Arbitrary Shape on a Data Parallel Computer

Authors: Mathur, Kapil K. Johnsson, S. Lennart

Source: Mathur, Kapil K. and S. Lennart Johnsson. Multiplication of Matrices of Arbitrary Shape on a Data Parallel Computer. Harvard Computer Science Group Technical Report TR-01-92.

Access URL: http://nrs.harvard.edu/urn-3:HUL.InstRepos:23017262

Enhancing Monte Carlo Particle Transport for Modern Many-Core Architectures

Authors: Ryan C. Bleile

Source: ProQuest LLC. 2021Ph.D. Dissertation, University of Oregon.

Peer Reviewed: N

Page Count: 200

Sponsoring Agency: US Department of Energy

Descriptors: Monte Carlo Methods, Computers, Computer Oriented Programs, Models, Algorithms, Data Collection, Computer Science, Client Server Architecture

Access URL: https://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:28321322

Neighborhood - Adaptable Processor for Multi - Processing ; Hardware Architectures for Morphological Filters with Large Structuring Elements ; Číslicové architektury pro morfologické filtry s velkými strukturujícími elementy

Authors: Bartovský, Jan Georgiev, Vjačeslav

Contributors: Bartovský, Jan Georgiev, Vjačeslav

Subject Terms: matematická morfologie, morfologický filtr, obvodová implementace, algoritmus, FPGA, mathematical morphology, morphological filter, hardware implementation, algorithm

File Description: 157 s.; application/pdf

Relation: 36922; http://hdl.handle.net/11025/5152

Availability: http://hdl.handle.net/11025/5152

NEC research & development

Authors: 日本電気株式会社

Source: 39(4);1998・10

Využití architektury TRIPS pro řešení výpočetně náročných úloh

Authors: Krutek, Roland Krumnikl, Michal Gaura, Jan

Contributors: Krutek, Roland Krumnikl, Michal Gaura, Jan

Subject Terms: TRIPS, Tera-op Reliable Intelligently Adaptive Processing System, EDGE, Explicit Data Graph Execution, procesorová architektura, paralelizmus, paralelní výpočty, polymorfní procesor, processor architecture, parallelism, parallel computation, polymorph processor

File Description: 1977663 bytes; application/pdf; application/octet-stream; text/plain; image/jpeg; downloadable_files_count: 5

Relation: OSD002; https://hdl.handle.net/10084/87594; S2724; KRU255_FEI_B2647_2612R025_2011

Availability: https://hdl.handle.net/10084/87594

A Shift Selection Strategy for Parallel Shift-invert Spectrum Slicing in Symmetric Self-consistent Eigenvalue Computation

Authors: Williams-Young, DB Beckman, PG Yang, C

Source: ACM Transactions on Mathematical Software. 46(4)

Subject Terms: Eigenvalues, parallel eigenvalue algorithms, self-consistent field, shift-invert spectrum slicing, math.NA, cs.DC, cs.NA, physics.comp-ph, Numerical & Computational Mathematics, Computation Theory and Mathematics, Information Systems

File Description: application/pdf

Access URL: https://escholarship.org/uc/item/5840h0mj
https://escholarship.org/content/qt5840h0mj/qt5840h0mj.pdf

Implementace generického procesoru v FPGA

Authors: Mikušek, Petr Martínek, Tomáš Kořenek, Jan

Contributors: Mikušek, Petr Martínek, Tomáš Kořenek, Jan

Subject Terms: Virtex-II Pro, transport triggered architectures, processor architectures, VLIW, přenosem spouštěné architektury, VHDL, COMBO6X, FPGA, architektury procesorů

File Description: application/pdf; text/html

Access URL: http://hdl.handle.net/11012/54028

Implementace generického procesoru v FPGA ; Implementation of Generic Processor in FPGA

Authors: Mikušek, Petr Martínek, Tomáš Kořenek, Jan

Contributors: Mikušek, Petr Martínek, Tomáš Kořenek, Jan

Subject Terms: přenosem spouštěné architektury, VLIW, architektury procesorů, VHDL, COMBO6X, FPGA, Virtex-II Pro, transport triggered architectures, processor architectures

File Description: application/pdf; text/html

Relation: MIKUŠEK, P. Implementace generického procesoru v FPGA [online]. Brno: Vysoké učení technické v Brně. Fakulta informačních technologií. .; 15302; http://hdl.handle.net/11012/54028

Availability: http://hdl.handle.net/11012/54028

Distributed merge trees

Authors: Morozov, D Weber, GH

Source: ACM Sigplan Notices. 48(8)

Subject Terms: Information and Computing Sciences, Applied Computing, topological data analysis, feature extraction, merge tree computation, parallelization, hybrid parallelization approaches, Software Engineering

File Description: application/pdf

Access URL: https://escholarship.org/uc/item/49d568wd
https://escholarship.org/content/qt49d568wd/qt49d568wd.pdf

Návrh pokročilé architektury procesoru v jazyce VHDL

Authors: Slavík, Daniel Straka, Martin Šimek, Václav

Contributors: Slavík, Daniel Straka, Martin Šimek, Václav

Subject Terms: scalar, RAM, superscalar, návrh, design, procesor, cache, subscalar, VHDL, superskalární, processor, subskalární, skalární

File Description: application/pdf; text/html

Access URL: http://hdl.handle.net/11012/54277