Search Results - acm: c.: computer system organizacija/c.1: processor architectures/c.1.4: parallel architectures

Parallel Computer Architectures for the SPMD Programming Model

Authors: 北島宏之 [著]

File Description: image/jp2

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I3177822

Degree: 博士 (情報科学) -- 東北大学

Study on architectures for parallel opto-electronic computer

Authors: 林森茂 [著]

File Description: image/jp2

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I3116433

Degree: 博士 (工学) -- 東京工業大学

An FPGA-based integrated environment for computer architecture.

Authors: Bulić, Patricio Guštin, Veselko Šonc, Damjan et al.

Source: Computer Applications in Engineering Education; Mar2013, Vol. 21 Issue 1, p26-35, 10p, 3 Color Photographs, 6 Diagrams

Subject Terms: FIELD programmable gate arrays, COMPUTER architecture, RISC microprocessors, DEBUGGING, COMPUTER organization, VHDL (Computer hardware description language), EDUCATION

Multipass communication systems for tiled processor architectures

Authors: Anant Agarwal. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Shnidman, Nathan R. (Nathan Robert)

Index Terms: Electrical Engineering and Computer Science., Thesis

URL: http://hdl.handle.net/1721.1/36137

Parallel memory system architectures for packet processing in network virtualization

Authors: 郡川, 智洋 Korikawa, Tomohiro

File Description: application/pdf

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I11689792

Degree: 博士(情報学) -- 京都大学

The Impact of Parallel Architectures on the Solution of Eigenvalue Problems.

Authors: YALE UNIV NEW HAVEN CT DEPT OF COMPUTER SCIENCE Ipsen,Ilse C. F. Saad,Youcef

Source: DTIC AND NTIS

Index Terms: Theoretical Mathematics, ALGORITHMS, COMPUTATIONS, EIGENVALUES, PARALLEL PROCESSING, LINEAR ALGEBRA, COUPLING(INTERACTION), LINEAR SYSTEMS, IMPACT, MODELS, TWO DIMENSIONAL, GRIDS, NUMERICAL ANALYSIS, ARRAYS, PROCESSING EQUIPMENT, SOLUTIONS(GENERAL), SURVEYS, SYMMETRY, VECTOR ANALYSIS, MULTIPROCESSORS, PARALLEL ORIENTATION, ARCHITECTURE., Text

URL: https://apps.dtic.mil/docs/citations/ADA163187

Studies on optical arithmetic and parallel computing architectures
光算術及び並列コンピューティングアーキテクチャに関する研究

Authors: 黄, 洪欣 黄洪欣 [著]

Parallel Computer Architectures for the SPMD Programming Model
SPMD型並列プログラミングモデルのための並列計算機アーキテクチャに関する研究

Authors: 北島, 宏之 北島宏之 [著]

Study on architectures for parallel opto-electronic computer
光コンピュータのアーキテクチャに関する研究

Authors: 林, 森茂 林森茂 [著]

Playable Serious Games for Studying and Programming Computational STEM and Informatics Applications of Distributed and Parallel Computer Architectures

Authors: Amenyo, John-Thones

Source: Journal of Educational Computing Research. 2012 47(4):351-370.

Peer Reviewed: Y

Page Count: 20

Descriptors: Educational Games, Computer Games, Computer Uses in Education, Programming, Information Science, Computer Science Education, Computer System Design, STEM Education, Professional Personnel, Training Methods, Instructional Materials, Educational Strategies, Computer Simulation, College Instruction

Access URL: https://baywood.metapress.com/link.asp?target=contribution&id=C382164612W4M379

Customizable Memory Schemes for Data Parallel Architectures

Authors: Gou, C. (author)

Index Terms: Computer Architecture, Data Parallel Accelerators, Parallel Memory Schemes, Customizable Memory Schemes, doctoral thesis, Text

URL: http://resolver.tudelft.nl/uuid:7fdd74cb-f771-4b9c-bfdb-3314e25277d1
9789072298232

Parallel Simulation of Chip-Multiprocessor Architectures

Authors: FLORIDA UNIV GAINESVILLE HIGH-PERFORMANCE COMPUTING AND SIMULATION RESEARCH LAB Chidester, Matthew C. George, Alan D.

Source: DTIC

Index Terms: Computer Programming and Software, Computer Hardware, SIMULATION, MICROPROCESSORS, PARALLEL PROCESSORS, PARALLEL SIMULATION, CMP(CHIP-MULTIPROCESSOR), CMP ARCHITECTURES, MPI(MESSAGE PASSING INTERFACE), SCI(SCALABLE COHERENT INTERFACE), MYRINET NETWORK, Text

URL: https://apps.dtic.mil/docs/citations/ADA466301

A Down-to-Earth Educational Operating System for Up-in-the-Cloud Many-Core Architectures

Authors: Ziwisky, Michael Persohn, Kyle Brylow, Dennis

Source: ACM Transactions on Computing Education. Jan 2013 13(1).

Peer Reviewed: Y

Page Count: 12

Descriptors: Computer Software, Technology Uses in Education, Information Management, Computer Science, Laboratory Experiments, Undergraduate Study, Delivery Systems, Technological Advancement

Guidance, Navigation and Control. Digital Emulation Technology Laboratory. Volume 5. Task 4, 5, and 7: Software Development and GN&C Processor Development

Authors: GEORGIA INST OF TECH ATLANTA COMPUTER ENGINEERING RESEARCH LAB Tan, W. S. Schwan, Karsten

Source: DTIC AND NTIS

Index Terms: Antimissile Defense Systems, NAVIGATIONAL AIDS, DIGITAL SIMULATION, INTERCEPTORS, SIMULATION, DIGITAL SYSTEMS, INTEGRATED SYSTEMS, CONTROL SYSTEMS, TEST BEDS, ENVIRONMENTS, REAL TIME, COMPUTER PROGRAMMING, NUMERICAL ANALYSIS, PARALLEL PROCESSING, PARALLEL PROCESSORS, PROCESSING EQUIPMENT, CLUSTERING, IMAGES, LOW LEVEL, DIFFERENTIAL EQUATIONS, FILTERS, PARALLEL ORIENTATION, CLOSED LOOP SYSTEMS, EXECUTIVE ROUTINES, FUNCTIONS, DATA PROCESSING EQUIPMENT, COMPUTER PROGRAMS, SIGNAL PROCESSING, VERY LARGE SCALE INTEGRATION., Text

URL: https://apps.dtic.mil/docs/citations/ADA225127

Resource Estimation for Parallel Architectures with Distributed Processor/Memory Nodes

Authors: M. A. Thornton D. L. Andrews

Source: Journal of computing and information technology; ISSN 1330-1136 (Print); ISSN 1846-3908 (Online); Volume 6; Issue 4

Index Terms: multiprocessor; memory nodes, text, info:eu-repo/semantics/article, info:eu-repo/semantics/publishedVersion

Electro-Optic Computing Architectures: Volume II. Components and System Design and Analysis

Authors: HUGHES RESEARCH LABS MALIBU CA Efron, U. Esener, S. et al.

Source: DTIC

Index Terms: Electrooptical and Optoelectronic Devices, Optics, OPTICAL EQUIPMENT, ELECTROOPTICS, CIRCUIT INTERCONNECTIONS, ARCHITECTURE, INTERFACES, ARRAYS, EFFICIENCY, MODULAR CONSTRUCTION, PARALLEL PROCESSORS, PROCESSING EQUIPMENT, COMMUNICATION AND RADIO SYSTEMS, ROUTING, MULTIPLE OPERATION, GLOBAL COMMUNICATIONS., OPTICAL COMPUTER ARCHITECTURE, OPTICAL SWITCHING, MICRO OPTICAL CIRCUITS, EOI(ELECTRO OPTIC INTERFACE), PE61101E, PE62712E, WURLA2750001, Text

URL: https://apps.dtic.mil/docs/citations/ADA341187

6.823 Computer System Architecture, Spring 2002

Additional Titles: Computer System Architecture

Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Asanovic, Krste Arvind, V. et al.

Index Terms: computer architecture, computer system architecture, hardware, hardware design, software, software design, instruction set design, processor micro-architecture, pipelining, cache memory, virtual memory, I/O, input/output, interrupts, superscalar architectures, VLIW machines, vector supercomputers, multithreaded architectures, symmetric multiprocessors, parallel computers, Computer architecture, Learning Object

URL: http://hdl.handle.net/1721.1/35849

6.823 Computer System Architecture, Spring 2002

Additional Titles: Computer System Architecture

Authors: Asanovic, Krste Arvind, V. Devadas, Srinivas et al.

Index Terms: computer architecture, computer system architecture, hardware, hardware design, software, software design, instruction set design, processor micro-architecture, pipelining, cache memory, virtual memory, I/O, input/output, interrupts, superscalar architectures, VLIW machines, vector supercomputers, multithreaded architectures, symmetric multiprocessors, parallel computers, Computer architecture

URL: http://hdl.handle.net/1721.1/35849

C-Flow : a compiler for statically scheduled message passing in parallel programs

Additional Titles: Compiler for statically scheduled message passing in parallel programs

Authors: Anant Agarwal. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Griffin, Patrick (Patrick Robert)

Index Terms: Electrical Engineering and Computer Science., Thesis

URL: http://hdl.handle.net/1721.1/38329

Design for scalability in 3D computer graphics architectures

Authors: Holten-Lund, Hans Erik

Source: Holten-Lund , H E 2002 , Design for scalability in 3D computer graphics architectures . <

Index Terms: book

URL: https://orbit.dtu.dk/en/publications/488f2f19-6f63-43cf-a7b4-97271ad56853
https://backend.orbit.dtu.dk/ws/files/5259080/imm888.pdf
https://backend.orbit.dtu.dk/ws/files/5259081/imm888.ps
http://www.imm.dtu.dk/pubdb/p.php?888