Výsledky vyhledávání - acm: c.: computer system organizacii/c.1: processor architekture/c.1.4: parallel architecture~

Adaptation of an acoustic propagation model to the parallel architecture of a graphics processor

Autoři: Ey, Emanuel Felisberto, P. Sapientia

Přispěvatelé: Ey, Emanuel Felisberto, P. Sapientia

Zdroj: urn:tid:202485617

Témata: Underwater acoustics, Acoustic propagation modeling, High-performance computing, Open CL, Parallel computing

Popis souboru: application/pdf

Dostupnost: http://hdl.handle.net/10400.1/4990

Parallel graphics and visualization

Autoři: Santos, Luís Paulo Reiners, Dirk Favre, Jean a další

Přispěvatelé: Santos, Luís Paulo Reiners, Dirk Favre, Jean a další

Témata: Editorial, Parallel graphics and visualization

Popis souboru: application/pdf

Relation: 0097-8493

Dostupnost: https://hdl.handle.net/1822/14616

A many-core co-processor for embedded parallel computing on FPGA

Autoři: José, Wilson Neto, Horácio Véstias, Mário a další

Přispěvatelé: José, Wilson Neto, Horácio Véstias, Mário a další

Témata: Many-core, FPGA, Matrix multiplication, Parallel processing, Reconfigurable computing

Popis souboru: application/pdf

Relation: 978-1-4673-8035-5

Dostupnost: http://hdl.handle.net/10400.21/6014

TALL—a list processor for the Philco 2000 computer

Autoři: Feldman, Julian

Zdroj: Communications of the ACM. 5(9)

Témata: Information and Computing Sciences, Information Systems, Information and computing sciences

Popis souboru: application/pdf

Přístupová URL adresa: https://escholarship.org/uc/item/6qk36727
https://escholarship.org/content/qt6qk36727/qt6qk36727.pdf

The AMPERE Project: A Model-driven development framework for highly Parallel and EneRgy-Efficient computation supporting multi-criteria optimization

Autoři: Quiñones, Eduardo Royuela, Sara Scordino, Claudio a další

Přispěvatelé: Quiñones, Eduardo Royuela, Sara Scordino, Claudio a další

Témata: Parallel programming models, Parallel and heterogeneous embedded processor architectures, Model-driven approaches, Safety-critical embedded systems

Popis souboru: application/pdf

Relation: 2375-5261

Dostupnost: http://hdl.handle.net/10400.22/16386

Multiplication of Matrices of Arbitrary Shape on a Data Parallel Computer

Autoři: Mathur, Kapil K. Johnsson, S. Lennart

Zdroj: Mathur, Kapil K. and S. Lennart Johnsson. Multiplication of Matrices of Arbitrary Shape on a Data Parallel Computer. Harvard Computer Science Group Technical Report TR-01-92.

Přístupová URL adresa: http://nrs.harvard.edu/urn-3:HUL.InstRepos:23017262

Analiza parametrów czasowych architektury potokowej specjalizowanych procesorów sprzętowychThe parameters analysis for pipeline architekture of specialised hardware processor

Autoři: Wiatr, K.

Témata: systemy czasu rzeczywistego, architektury systemów wieloprocesorowych, układy programowalne, image processing systems, architecture hardware processors

Přístupová URL adresa: http://yadda.icm.edu.pl/baztech/element/bwmeta1.element.baztech-article-BWA1-0001-0487

Scalable Architecture for a Room Temperature Solid-State Quantum Information Processor

Autoři: Yao, Norman Jiang, Liang Gorshkov, Alexey a další

Zdroj: Yao, Norman Y., Liang Jiang, Alexey V. Gorshkov, Peter C. Maurer, Geza Giedke, J. Ignacio Cirac, Mikhail D. Lukin. 2012. Scalable architecture for a room temperature solid-state quantum information processor. Nature Communications 3(4): 800.

Témata: physical sciences, atomic and molecular physics, nuclear-spin qubits, coupled electron, diamond, nitrogen, entanglement, spectroscopy, manipulation, computation, resolution, particles

Popis souboru: application/pdf

Relation: http://arxiv.org/abs/1012.2864v1; Nature Communications

Přístupová URL adresa: http://nrs.harvard.edu/urn-3:HUL.InstRepos:8951184

Parallel fpga routing based on the operator formulation

Autoři: Moctar, Yehdhih Ouid Mohammed Brisk, Philip

Témata: Built Environment and Design, Architecture, Engineering, Electrical Engineering, Field Programmable Gate Array, Routing, Routing Resource Graph, Maze Expansion, Irregular Algorithm, Software Transactional Memory

Přístupová URL adresa: https://escholarship.org/uc/item/0jp9j4dj

Towards an algorithmic skeleton framework for programming the Intel R Xeon PhiTM processor

Autoři: Marques, Hélder de Almeida Paulino, Hervé RUN

Přispěvatelé: Marques, Hélder de Almeida Paulino, Hervé RUN

Témata: Many integrated cores architectures, Intel R Xeon PhiTM, Parallel programming, Algorithmic skeletons

Popis souboru: application/pdf

Dostupnost: http://hdl.handle.net/10362/14394

Experiences on object tracking using a many-core embedded system

Autoři: Minozzo, Laercio Rufino, José Lima, José a další

Přispěvatelé: Minozzo, Laercio Rufino, José Lima, José a další

Témata: Visual tracking, Computer vision, Embedded systems, Heterogeneous systems, Parallel / hybrid programming

Popis souboru: application/pdf

Relation: 978-989-8533-69-2

Dostupnost: http://hdl.handle.net/10198/16259

PDES-A

Autoři: Rahman, Shafiur Abu-Ghazaleh, Nael Najjar, Walid

Zdroj: ACM Transactions on Modeling and Computer Simulation. 29(2)

Témata: PDES, FPGA, accelerator, coprocessor, parallel simulation, Computation Theory and Mathematics, Information Systems, Operations Research

Popis souboru: application/pdf

Přístupová URL adresa: https://escholarship.org/uc/item/2z10p5n0
https://escholarship.org/content/qt2z10p5n0/qt2z10p5n0.pdf

NEC research & development

Autoři: 日本電気株式会社

Zdroj: 39(4);1998・10

Measurement-Based Probabilistic Timing Analysis for Graphics Processor Units

Autoři: Berezovskyi, Kostiantyn Guet, Fabrice Santinelli, Luca a další

Přispěvatelé: Berezovskyi, Kostiantyn Guet, Fabrice Santinelli, Luca a další

Témata: Computer Communication Networks, Computer System Implementation, Algorithm Analysis and Problem Complexity, Software Engineering

Popis souboru: application/pdf

Dostupnost: http://hdl.handle.net/10400.22/9498

Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage

Autoři: Kluter, Theo Burri, Samuel Brisk, Philip a další

Zdroj: ACM Transactions on Architecture and Code Optimization. 11(2)

Témata: Affordable and Clean Energy, Performance, Design, Experimentation, Instruction set extension, architecturally visible storage, memory coherence, memory consistence, Virtual Ways, Computer Software, Electrical and Electronic Engineering

Přístupová URL adresa: https://escholarship.org/uc/item/4x32223n

Processador neuronal virtual digital para implementação VLSI

Autoři: Velez, Jorge Manuel Borda de Água

Témata: Computador neuronal, Processador neuronal, Redes neuronais, Algoritmo Backpropagation, Representação numérica, Linguagens de descrição de Hardware, Verilog, Processamento paralelo, Análise de desempenho, Neural computer, Neural processor, Neural nets, Backpropagation algorithm, Numerical representation, Hardware description language, Parallel processing, Performance analysis

Popis souboru: application/pdf

Dostupnost: http://hdl.handle.net/10773/27407

Communication efficient multi-processor FFT

Autoři: Johnsson, S. Lennart Jacquemin, Michel Krawitz, Robert L.

Zdroj: Johnsson, S. Lennart, Michel Jacquemin, and Robert L. Krawitz. 1991. Communication efficient multi-processor FFT. Harvard Computer Science Group Technical Report TR-25-91.

Relation: Harvard Computer Science Group Technical Report

Přístupová URL adresa: http://nrs.harvard.edu/urn-3:HUL.InstRepos:35059732

Tool to Support Computer Architecture Teaching and Learning

Autoři: Bruno Miguel Barroso da Nova

Témata: Engenharia electrotécnica, electrónica e informática, Electrical engineering, Electronic engineering, Information engineering

Popis souboru: application/pdf

Dostupnost: https://hdl.handle.net/10216/68509

The Impact of Operating System Structure on Personal Computer Performance

Autoři: Chen, J. Bradley Endo, Yashuhiro Chan, Kee a další

Zdroj: Chen, J. Bradley, Yasohiro Endo, Kee Chan, David Mazieres, Antonio Dias, Margo Seltzer, and Michael D. Smith. 1995. The Impact of Operating System Structure on Personal Computer Performance. Harvard Computer Science Group Technical Report TR-09-95.

Popis souboru: application/pdf

Přístupová URL adresa: http://nrs.harvard.edu/urn-3:HUL.InstRepos:24829608

Verification of a Practical Hardware Security Architecture Through Static Information Flow Analysis

Autoři: Andrew Ferraiuolo Rui Xu Danfeng Zhang a další

Zdroj: ACM SIGARCH Computer Architecture News. 45(1):555-568

Přístupová URL adresa: https://ntrs.nasa.gov/citations/23495833788112