Výsledky vyhledávání - acm: c.: computer system organizacii/c.1: processor architectures/c.1.4: parallel architecture*

Fast Parallel Graph-Search with Splittable and Catenable Frontiers

Autoři: Acar, Umut A. Charguéraud, Arthur Rainey, Mike a další

Přispěvatelé: Acar, Umut A. Charguéraud, Arthur Rainey, Mike a další

Zdroj: [Technical Report] Inria. 2015

Témata: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL], ACM: F.: Theory of Computation/F.2: ANALYSIS OF ALGORITHMS AND PROBLEM COMPLEXITY/F.2.2: Nonnumerical Algorithms and Problems, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS]

Přístupová URL adresa: https://inria.hal.science/hal-01089125v2/file/psearch.pdf
https://inria.hal.science/hal-01089125
https://inria.hal.science/hal-01089125v2/document

The K2 parallel processor ; architecture and hardware implementation

Autoři: Annaratone, Marco Fillo, Marco Nakabayashi, Kiyoshi a další

Zdroj: ACM SIGARCH Computer Architecture News ; volume 18, issue 2SI, page 92-101 ; ISSN 0163-5964

Dostupnost: https://doi.org/10.1145/325096.325118
https://dl.acm.org/doi/10.1145/325096.325118
https://dl.acm.org/doi/pdf/10.1145/325096.325118

A parallel processor architecture for graphics arithmetic operations

Autoři: Torborg, John G.

Zdroj: ACM SIGGRAPH Computer Graphics ; volume 21, issue 4, page 197-204 ; ISSN 0097-8930

Dostupnost: https://doi.org/10.1145/37402.37426
https://dl.acm.org/doi/10.1145/37402.37426
https://dl.acm.org/doi/pdf/10.1145/37402.37426

L'architecture considérée sous le rapport de l'art, des moeurs et de la législation. Tome 1 / ; par C.-N. Ledoux. Tome premier, 1804

Autoři: Ledoux, Claude-Nicolas, 1736-1806, Auteur du texte

Zdroj: Bibliothèque nationale de France, département Réserve des livres rares, RES-V-25, 1804.

Relation: Notice d'ensemble : http://catalogue.bnf.fr/ark:/12148/cb30770251g; Notice d’oeuvre : http://catalogue.bnf.fr/ark:/12148/cb121212940; Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb30770251g

Přístupová URL adresa: http://gallica.bnf.fr/ark:/12148/bpt6k1047050b

[Croquis de maisons et de détails d'architecture à Bourges] : [dessin] / [C. Meryon], 1852

Autoři: Meryon, Charles, 1821-1868, Graveur

Zdroj: Bibliothèque nationale de France, département Estampes et photographie, RESERVE FOL-B-6 (4), 1852.

Relation: Notice d'ensemble : http://catalogue.bnf.fr/ark:/12148/cb42129049v; Notice de recueil : http://catalogue.bnf.fr/ark:/12148/cb403476810; Appartient à : [Recueil. Oeuvre de Charles Meryon. Dessins]; Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb42129049v

Přístupová URL adresa: http://gallica.bnf.fr/ark:/12148/btv1b550024734

Evaluation of fault-tolerant parallel-processor architectures over long space missions

Autoři: Johnson, Sally C

Témata: Statistics And Probability

Přístupová URL adresa: https://ntrs.nasa.gov/citations/19890017288

Processor architecture exploration and synthesis of massively parallel multi-processor accelerators in application to LDPC decoding.

Autoři: Jan, Yahya Jóźwiak, Lech

Zdroj: Microprocessors & Microsystems. Mar2014, Vol. 38 Issue 2, p152-169. 18p.

Témata: *MULTIPROCESSORS, *COMPUTER architecture, *COMPUTER networks, *SYSTEMS design, *TOPOLOGY, *PERFORMANCE evaluation

Parallel techniques for physically based simulation on multi-core processor architectures

Autoři: Thomaszewski, Bernhard Pabst, Simon Blochinger, Wolfgang

Zdroj: Computers & Graphics. Feb2008, Vol. 32 Issue 1, p25-40. 16p.

Témata: *DIGITAL image processing, *COMPUTER architecture, *LINEAR systems, *PARALLEL algorithms, *COMPUTER graphics software, *COMPUTATIONAL mathematics

Model-driven adaptation of double-precision matrix multiplication to the Cell processor architecture

Autoři: Wyrzykowski, Roman Rojek, Krzysztof Szustak, Lukasz

Zdroj: Parallel Computing. Apr2012, Vol. 38 Issue 4/5, p260-276. 17p.

Témata: *COMPUTER architecture, *ALGORITHMS, *COMPUTER scheduling, *COMPUTER performance, *MATRICES (Mathematics), *MULTIPLICATION

A Parallel Architecture for the Partitioning around Medoids (PAM) Algorithm for Scalable Multi-Core Processor Implementation with Applications in Healthcare.

Autoři: Mushtaq, Hassan Khawaja, Sajid Gul Akram, Muhammad Usman a další

Zdroj: Sensors (14248220). Dec2018, Vol. 18 Issue 12, p4129. 1p.

Témata: *CLUSTER analysis (Statistics), *COMPUTER architecture, *ALGORITHMS, *MULTICORE processors, *MEDICAL care

Efficient parallel architecture for highly coupled real-time linear system applications

Autoři: Carroll, Chester C Homaifar, Abdollah Barua, Soumavo

Témata: Computer Operations And Hardware

Přístupová URL adresa: https://ntrs.nasa.gov/citations/19880010631

MASA: a multithreaded processor architecture for parallel symbolic computing

Autoři: Halstead, R. H. Fujita, T.

Zdroj: ACM SIGARCH Computer Architecture News ; volume 16, issue 2, page 443-451 ; ISSN 0163-5964

Dostupnost: https://doi.org/10.1145/633625.52449
https://dl.acm.org/doi/10.1145/633625.52449
https://dl.acm.org/doi/pdf/10.1145/633625.52449

The K2 distributed memory parallel processor ; architecture, compiler, and operating system

Autoři: Annaratone, M. Fillo, M. Halbherr, M. a další

Zdroj: Proceedings of the 1991 ACM/IEEE conference on Supercomputing - Supercomputing '91 ; page 900-909

Dostupnost: https://doi.org/10.1145/125826.126721
https://dl.acm.org/doi/10.1145/125826.126721
http://dl.acm.org/ft_gateway.cfm?id=126721%26amp%3Bftid=21307%26amp%3Bdwn=1

an architecture independent graphical tool for automatic contention free process to processor mapping: An architecture-independent graphical tool for automatic contention-free process-to-processor mapping

Autoři: Shen, H. Lor, S. Maheshwari, P.

Zdroj: The Journal of Supercomputing. 18(2):115-139

Témata: 1712 Software, Other programming paradigms (object-oriented, sequential, concurrent, automatic, etc.), parallel processing, parallel computing, routing, 1708 Hardware and Architecture, Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.), scheduling, 1710 Information Systems, 2614 Theoretical Computer Science, graphical tool, task mapping

Popis souboru: application/xml

Přístupová URL adresa: https://zbmath.org/1606570
https://doi.org/10.1023/a:1008171232465
https://link.springer.com/article/10.1023/A:1008171232465
https://dblp.uni-trier.de/db/journals/tjs/tjs18.html#ShenLM01
https://espace.library.uq.edu.au/view/UQ:335cdc1
https://digital.library.adelaide.edu.au/dspace/handle/2440/36905

An Integrated Memory Array Processor Architecture for Embedded Image Recognition Systems

Autoři: Kyo, Shorin Okazaki, Shin'ichiro Arai, Tamio

Zdroj: ACM SIGARCH Computer Architecture News ; volume 33, issue 2, page 134-145 ; ISSN 0163-5964

Dostupnost: https://doi.org/10.1145/1080695.1069982
https://dl.acm.org/doi/10.1145/1080695.1069982
http://dl.acm.org/ft_gateway.cfm?id=1069982%26amp%3Bftid=313823%26amp%3Bdwn=1

De l'architecture des forteresses, ou De l'art de fortifier les places, et de disposer les établissemens de tout genre, qui ont rapport à la guerre . Premiere partie. Essai sur la fortification... par C. F. Mandar.., 1801

Autoři: Mandar, Charles François, 1757-1844, Auteur du texte

Zdroj: Bibliothèque nationale de France, département Littérature et art, V-22465, 1801.

Relation: Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb30870419q

Přístupová URL adresa: http://gallica.bnf.fr/ark:/12148/bpt6k9640257v

Notice sur la vie et les travaux du C. Antoine, architecte de l'ancienne Académie d'architecture, de la Société des sciences, lettres et arts de Paris, et membre de l'Institut national de France, lue dans la séance publique de l'Institut, du 8 vendémiaire an 12, par Joachim le Breton, secrétaire perpetuel de la classe des beaux-arts, et membre de celle d'histoire et de littérature ancienne, 1803

Zdroj: Bibliothèque nationale de France, département Estampes et photographie, RESERVE 8-YA3-27 (50, 1396), 1803.

Relation: Notice de recueil : http://catalogue.bnf.fr/ark:/12148/cb44343928z; Appartient à : Collection Deloynes. Tome 50, pièces 1336 à 1396, Supplément au Tome V; Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb443480249

Přístupová URL adresa: http://gallica.bnf.fr/ark:/12148/btv1b10537578r

Classification of parallel processor architectures (invited tutorial session)

Autoři: Gajski, Daniel Gannon, Dennis Hills, Daniel a další

Zdroj: ACM SIGARCH Computer Architecture News ; volume 13, issue 3, page 45 ; ISSN 0163-5964

Dostupnost: https://doi.org/10.1145/327070.328200
https://dl.acm.org/doi/10.1145/327070.328200

Cyclical processor and computer architectures for highly parallel applications

Autoři: Wong, Fut-Suan

Dostupnost: http://hdl.handle.net/2429/25646

A RISC processor architecture with a versatile stack system

Autoři: Aßmann, Claus

Zdroj: ACM SIGARCH Computer Architecture News ; volume 21, issue 5, page 63-70 ; ISSN 0163-5964

Dostupnost: https://doi.org/10.1145/165660.165673
https://dl.acm.org/doi/10.1145/165660.165673
https://dl.acm.org/doi/pdf/10.1145/165660.165673