Search Results - acm: c.: computer system organizacii/c.1: processor architectures/c.1.4: parallel architectural*

Efficient parallel architecture for highly coupled real-time linear system applications

Authors: Carroll, Chester C Homaifar, Abdollah Barua, Soumavo

Subject Terms: Computer Operations And Hardware

Access URL: https://ntrs.nasa.gov/citations/19880010631

Modelling parallel programs and multiprocessor architectures with AXE

Authors: Yan, Jerry C Fineman, Charles E

Subject Terms: Computer Systems

Access URL: https://ntrs.nasa.gov/citations/19910015479

Parallel architectures for computing cyclic convolutions

Authors: Yeh, C.-S Reed, I. S Truong, T. K

Source: IEE Proceedings, Part F - Communications, Radar and Signal Processing. 130(5 Au)

Subject Terms: Computer Operations And Hardware

Access URL: https://ntrs.nasa.gov/citations/19830062461

DFT algorithms for bit-serial GaAs array processor architectures

Authors: Mcmillan, Gary B

Subject Terms: Computer Programming And Software

Access URL: https://ntrs.nasa.gov/citations/19890017990

An Evaluation of Architectural Platforms for Parallel Navier-Stokes Computations

Authors: Jayasimha, D. N Hayder, M. E Pillay, S. K

Subject Terms: Computer Programming And Software

Access URL: https://ntrs.nasa.gov/citations/19960022703

Hypercluster Parallel Processor

Authors: Blech, Richard A Cole, Gary L Milner, Edward J et al.

Source: NASA Tech Briefs. 16(11)

Subject Terms: Electronic Systems

Access URL: https://ntrs.nasa.gov/citations/19920000668

Towards an algorithmic skeleton framework for programming the Intel R Xeon PhiTM processor

Authors: Marques, Hélder de Almeida Paulino, Hervé RUN

Contributors: Marques, Hélder de Almeida Paulino, Hervé RUN

Subject Terms: Many integrated cores architectures, Intel R Xeon PhiTM, Parallel programming, Algorithmic skeletons

File Description: application/pdf

Availability: http://hdl.handle.net/10362/14394

Survey of The Computer Industry (18): Software takes the driving seat - Mid-Range Systems, hardware architectures under review

Authors: By:MARTIN BANKS

Source: Financial Times (London, England), April 23, 1991, p. 10 9pp

Parallel ILP for distributed-memory architectures

Authors: Nuno A. Fonseca Ashwin Srinivasan Fernando Silva et al.

Subject Terms: Ciência de computadores, Ciências da computação e da informação, Computer science, Computer and information sciences

File Description: application/pdf

Relation: 0885-6125

Availability: https://hdl.handle.net/10216/91401

The Economist: Soul of a newer machine

Source: Economist, The (London, England), September 6, 2003, 3pp

The AMPERE Project: A Model-driven development framework for highly Parallel and EneRgy-Efficient computation supporting multi-criteria optimization

Authors: Quiñones, Eduardo Royuela, Sara Scordino, Claudio et al.

Contributors: Quiñones, Eduardo Royuela, Sara Scordino, Claudio et al.

Subject Terms: Parallel programming models, Parallel and heterogeneous embedded processor architectures, Model-driven approaches, Safety-critical embedded systems

File Description: application/pdf

Relation: 2375-5261

Availability: http://hdl.handle.net/10400.22/16386

It's RIP la difference; Opinion

Authors: By:GRAEME PHILIPSON

Source: Age, The (Melbourne, Australia), August 19, 2003 Computers Late, p. 4 4pp

Parallel graphics and visualization

Authors: Santos, Luís Paulo Reiners, Dirk Favre, Jean et al.

Contributors: Santos, Luís Paulo Reiners, Dirk Favre, Jean et al.

Subject Terms: Editorial, Parallel graphics and visualization

File Description: application/pdf

Relation: 0097-8493

Availability: https://hdl.handle.net/1822/14616

Survey on A-Z of Computing (2): Providing a definition of standards - Architecture

Authors: By:PHILIP MANCHESTER

Source: Financial Times (London, England), June 23, 1992, 8pp

Memory management and communication on homogeneous and heterogeneous parallel systems

Authors: Martins, Paula Ruano, M. Graça Cunha, J. C. E et al.

Contributors: Martins, Paula Ruano, M. Graça Cunha, J. C. E et al.

Subject Terms: Architectures, Digital signal processors, Parallel processing, Memory banks, Communication channels, Performance analysis

File Description: application/pdf

Relation: 0-08-043685-4; AUT: MRU00118

Availability: http://hdl.handle.net/10400.1/5870

Architectural Analysis of Complex Evolving Systems of Systems

Authors: Lindvall, Mikael Stratton, William C Sibol, Deane E et al.

Subject Terms: Mathematical And Computer Sciences (General)

Access URL: https://ntrs.nasa.gov/citations/20100015773

Spacelab output processing system architectural study

Subject Terms: Computer Operations And Hardware

Access URL: https://ntrs.nasa.gov/citations/19780008697

MIPS Technologies' CEO to Present at the Lehman Brothers 2003 Semiconductor and Computer Systems Conference

Authors: By:PATRICK

Source: Business Wire, November 17, 2003

CoWare and ACE Expand Strategic Alliance to Drive Custom Processor Design; Multi-year Agreement Integrates ACE's C-Compiler Technology with CoWare's Processor Design Tool

Source: Business Wire, October 24, 2005

Professor wins grant to study networks AMHERST -- UMass Professor Arnold L. Rosenberg has been named one of eight Fulbright scholars from the United States who will be studying in France in the coming year.

Source: Recorder, The (Greenfield, MA), September 3, 1999, 2pp