Search Results - acm: c.: computer system organizacii/c.1: processes architectures/c.1.4: parallel architecture*

Parallel generation of architecture on the GPU.

Authors: Steinberger, Markus Kenzel, Michael Kainz, Bernhard et al.

Source: Computer Graphics Forum. May2014, Vol. 33 Issue 2, p73-82. 10p.

Subject Terms: *PARALLEL computers, *COMPUTER architecture, *GRAPHICS processing units, *SHAPE recognition (Computer vision), *STOCHASTIC analysis, *CENTRAL processing units

L'architecture considérée sous le rapport de l'art, des moeurs et de la législation. Tome 1 / ; par C.-N. Ledoux. Tome premier, 1804

Authors: Ledoux, Claude-Nicolas, 1736-1806, Auteur du texte

Source: Bibliothèque nationale de France, département Réserve des livres rares, RES-V-25, 1804.

Relation: Notice d'ensemble : http://catalogue.bnf.fr/ark:/12148/cb30770251g; Notice d’oeuvre : http://catalogue.bnf.fr/ark:/12148/cb121212940; Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb30770251g

Access URL: http://gallica.bnf.fr/ark:/12148/bpt6k1047050b

[Croquis de maisons et de détails d'architecture à Bourges] : [dessin] / [C. Meryon], 1852

Authors: Meryon, Charles, 1821-1868, Graveur

Source: Bibliothèque nationale de France, département Estampes et photographie, RESERVE FOL-B-6 (4), 1852.

Relation: Notice d'ensemble : http://catalogue.bnf.fr/ark:/12148/cb42129049v; Notice de recueil : http://catalogue.bnf.fr/ark:/12148/cb403476810; Appartient à : [Recueil. Oeuvre de Charles Meryon. Dessins]; Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb42129049v

Access URL: http://gallica.bnf.fr/ark:/12148/btv1b550024734

De l'architecture des forteresses, ou De l'art de fortifier les places, et de disposer les établissemens de tout genre, qui ont rapport à la guerre . Premiere partie. Essai sur la fortification... par C. F. Mandar.., 1801

Authors: Mandar, Charles François, 1757-1844, Auteur du texte

Source: Bibliothèque nationale de France, département Littérature et art, V-22465, 1801.

Relation: Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb30870419q

Access URL: http://gallica.bnf.fr/ark:/12148/bpt6k9640257v

Notice sur la vie et les travaux du C. Antoine, architecte de l'ancienne Académie d'architecture, de la Société des sciences, lettres et arts de Paris, et membre de l'Institut national de France, lue dans la séance publique de l'Institut, du 8 vendémiaire an 12, par Joachim le Breton, secrétaire perpetuel de la classe des beaux-arts, et membre de celle d'histoire et de littérature ancienne, 1803

Source: Bibliothèque nationale de France, département Estampes et photographie, RESERVE 8-YA3-27 (50, 1396), 1803.

Relation: Notice de recueil : http://catalogue.bnf.fr/ark:/12148/cb44343928z; Appartient à : Collection Deloynes. Tome 50, pièces 1336 à 1396, Supplément au Tome V; Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb443480249

Access URL: http://gallica.bnf.fr/ark:/12148/btv1b10537578r

Review of Intelligent Software Architectures for the Development of An Intelligent Decision Support System for Design Process Planning in Concurrent Engineering.

Authors: Reidsema, C. Szczerbicki, E.

Source: Cybernetics & Systems. Sep2002, Vol. 33 Issue 6, p629-658. 30p.

Subject Terms: *CONCURRENT engineering, *COMPUTER architecture, *INTELLIGENT agents, *DECISION support systems

Fast Parallel Graph-Search with Splittable and Catenable Frontiers

Authors: Acar, Umut A. Charguéraud, Arthur Rainey, Mike et al.

Contributors: Acar, Umut A. Charguéraud, Arthur Rainey, Mike et al.

Source: [Technical Report] Inria. 2015

Subject Terms: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL], ACM: F.: Theory of Computation/F.2: ANALYSIS OF ALGORITHMS AND PROBLEM COMPLEXITY/F.2.2: Nonnumerical Algorithms and Problems, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS]

Access URL: https://inria.hal.science/hal-01089125v2/file/psearch.pdf
https://inria.hal.science/hal-01089125
https://inria.hal.science/hal-01089125v2/document

Performance modelling of parallel computer architectures

Authors: Harrison, P. G. Field, A. J.

Source: ACM SIGMETRICS Performance Evaluation Review ; volume 14, issue 1, page 18-27 ; ISSN 0163-5999

Availability: https://doi.org/10.1145/317531.317535
https://dl.acm.org/doi/10.1145/317531.317535
https://dl.acm.org/doi/pdf/10.1145/317531.317535

Efficient parallel architecture for highly coupled real-time linear system applications

Authors: Carroll, Chester C Homaifar, Abdollah Barua, Soumavo

Subject Terms: Computer Operations And Hardware

Access URL: https://ntrs.nasa.gov/citations/19880010631

Parallel architecture for OPS5

Authors: Butler, P. L. Allen, J. D. Bouldin, D. W.

Source: ACM SIGARCH Computer Architecture News ; volume 16, issue 2, page 452-257 ; ISSN 0163-5964

Availability: https://doi.org/10.1145/633625.52450
https://dl.acm.org/doi/10.1145/633625.52450
https://dl.acm.org/doi/pdf/10.1145/633625.52450

Integrated Continuous Healthcare Team Computer System Architecture

Authors: Caeiro, J. Oliveira, H. Goes, M. et al.

Subject Terms: Integrated Continuous Healthcare, Computer System Architecture

Relation: Jasnau Caeiro, J., Oliveira, H., Goes, M., Lopes, M. J., & Fonseca, C. (2020). Integrated Continuous Healthcare Team Computer System Architecture. In D. Mendes, C. Fonseca, M. Lopes, J. García-Alonso, & J. Murillo (Eds.), Exploring the Role of ICTs in Healthy Aging (pp. 231-246). IGI Global.; https://www.igi-global.com/gateway/chapter/254655; nd; mjl@uevora.pt; cfonseca@uevora.pt; 745

Availability: http://hdl.handle.net/10174/34154

Combining Self-Explaining with Computer Architecture Diagrams to Enhance the Learning of Assembly Language Programming

Authors: Hung, Y.-C

Source: IEEE Transactions on Education. Nov 2012 55(4):546-551.

Peer Reviewed: Y

Page Count: 6

Descriptors: Foreign Countries, Control Groups, Experimental Groups, Web Sites, Programming Languages, Programming, Visual Aids, Computer Assisted Instruction, Statistical Analysis, Novices, Scores, Learning Processes, Computer Science Education, Computer Software, Computer System Design, Multimedia Instruction, Multimedia Materials, Instructional Design, Engineering Education, Teaching Methods, Instructional Effectiveness, College Students, College Instruction, Pretests Posttests, Comparative Analysis

Geographic Terms: Taiwan

A comparison of message passing and shared memory architectures for data parallel programs

Authors: Klaiber, A. C. Levy, H. M.

Source: ACM SIGARCH Computer Architecture News ; volume 22, issue 2, page 94-105 ; ISSN 0163-5964

Availability: https://doi.org/10.1145/192007.192020
https://dl.acm.org/doi/10.1145/192007.192020
https://dl.acm.org/doi/pdf/10.1145/192007.192020

Book review: Computing with Parallel Architectures: T.Node edited by D. Gassilloud and J. C. Grossetie (Kluwer Academic Publishers 1991)

Authors: Allen, Ken

Source: ACM SIGARCH Computer Architecture News ; volume 20, issue 4, page 65-66 ; ISSN 0163-5964

Availability: https://doi.org/10.1145/142880.773996
https://dl.acm.org/doi/10.1145/142880.773996
https://dl.acm.org/doi/pdf/10.1145/142880.773996

81/2: an MSIMD model for massively parallel simulation: This thesis proposes an environment for very large digital simulations. The realization of these simulations relies on the efficient use of the large parallel computers that will be available in the near future. In addition, many simulation applications correspond to programs whose computation sequence can be predicted at compile time. This is the case, for example, with the simulation of discrete dynamic systems (control systems, economic mechanisms, automaton networks, synchronous VLSI circuits, discretized continuous systems), which will be a prime example of applications. More specifically, we are studying a model for programming applications with predictable behavior on massively parallel computers. Our aim is twofold: 1) to provide the expressiveness needed for simulation applications, and in particular for the simulation of discrete dynamical systems; 2) to preserve the simplicity and efficiency of SIMD execution models, while gaining the efficiency and flexibility of control structures offered by MIMD. In order to study our programming model in greater detail, the specific resources of massively parallel simulation will constitute the explicit entities of an experimental language called Otto e Mezzo, or 8 1 / 2 .The development of Otto e Mezzo was influenced by the early lessons of the MEGA project, by theConnection-Machine programming and the LUCID, LUSTRE and SIGNAL languages. The Connection-Machine brought us the concept of collection, and LUCID the notion of temporal sequence. MEGA explores the implications of massive parallelism: what architectures and execution models are needed to build and run computers with several thousand processors? The two main consequences have been the development of a static language for expressing both data parallelism and control parallelism. As the language is static, the main execution parameters are fixed at compile time.From a technical point of view, the contributions of this work consist in integrating the concept of collection and the concept of time sequence into a data-flow language and compiling it for a massive synchronizable MIMD architecture. The collection is the preferred medium for data parallelism, while time sequences enable static processing of control parallelism. From the point of view of simulation applications, temporal sequences correspond to the notion of trajectory and collections to that of multi-dimensional variable.Merging the concepts of collection and temporal sequence addresses the objections initially raised against the inefficient handling of arrays in the classical data-flow model. In addition, this extension makes it possible to take into account the problem of data distribution in a distributed memory architecture, a problem traditionally absent from data-flow concerns. The result is an MSIMD language in which parallelism is implicit, static and very fine-grained.The data-flow form of the language simplifies program analysis and optimization techniques. We give several examples through collection type inference, dependency graph analysis, program time analysis, constant propagation and critical path optimization. The door remains open to numerous program analyses, optimizations and transformations.Compilation is essential to achieve the required performance. It is based on language semantics and translates into the distributed resolution of a system of equations. Compilation gives this system a "triangular form", which translates into efficient resolution. The activity management of the corresponding tasks is not carried out by an executive, but is regulated at compile time by a static scheduling of all activities. This compilation phase enables data to be distributed while taking advantage of a very detailed knowledge of the structure of the calculations and taking into account communication costs. Particular attention has been paid to the implementation of scheduling, to ensure that its complexity is compatible with the response times expected for compilation.This work has led to the development, based on the techniques presented in this thesis, of an interpreter/compiler for a subset of the 81/2 language. This interpreter currently exists on a UNIX workstation. Sequential code generation (workstation and SIMD computer) is planned for the very near future. Code generation for a synchronizable MIMD machine (such as the PTAH machine developed in the MEGA project) is currently being implemented.

Authors: Giavitto, Jean-Louis

Contributors: Giavitto, Jean-Louis

Subject Terms: parallelism, stream, data parallelism, langage declaratif, MIMD, Compilation, simulation, SIMD, [INFO.INFO-PL] Computer Science [cs]/Programming Languages [cs.PL], declarative language, Control parallelism, Dataflow, compilation, [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-MO] Computer Science [cs]/Modeling and Simulation, Langage de programmation, programing language

Access URL: https://hal.science/tel-04336866v1

A System Level Compiler for Massively-Parallel, Spatial, Dataflow Architectures

Authors: Van Essendelft, Dirk Wingo, Patrick Jordan, Terry et al.

Subject Terms: FOS: Computer and information sciences, D.3, D.1, I.6, J.2, Emerging Technologies (cs.ET), Hardware Architecture (cs.AR), Distributed, Parallel, and Cluster Computing (cs.DC), Programming Languages (cs.PL)

Implementation of a blade element UH-60 helicopter simulation on a parallel computer architecture in real-time

Authors: Moxon, Bruce C Green, John A

Subject Terms: Aircraft Design, Testing And Performance

Access URL: https://ntrs.nasa.gov/citations/19910032090

MITRE's future generation computer architectures program

Authors: Bensley, E. H. Brando, T. J. Fohlin, J. C. et al.

Source: ACM SIGPLAN Notices ; volume 24, issue 4, page 99-101 ; ISSN 0362-1340 1558-1160

Availability: https://doi.org/10.1145/67387.67412
https://dl.acm.org/doi/10.1145/67387.67412
https://dl.acm.org/doi/pdf/10.1145/67387.67412

Playable Serious Games for Studying and Programming Computational STEM and Informatics Applications of Distributed and Parallel Computer Architectures

Authors: Amenyo, John-Thones

Source: Journal of Educational Computing Research. 2012 47(4):351-370.

Peer Reviewed: Y

Page Count: 20

Descriptors: Educational Games, Computer Games, Computer Uses in Education, Programming, Information Science, Computer Science Education, Computer System Design, STEM Education, Professional Personnel, Training Methods, Instructional Materials, Educational Strategies, Computer Simulation, College Instruction

Access URL: https://baywood.metapress.com/link.asp?target=contribution&id=C382164612W4M379

Modelling parallel programs and multiprocessor architectures with AXE

Authors: Yan, Jerry C Fineman, Charles E

Subject Terms: Computer Systems

Access URL: https://ntrs.nasa.gov/citations/19910015479