Suchergebnisse - acm: c.: computer system organizacie/c.1: processor architectures/c.1.4: parallel architectures

Evaluation of fault-tolerant parallel-processor architectures over long space missions

Autoren: Johnson, Sally C

Schlagwörter: Statistics And Probability

Zugangs-URL: https://ntrs.nasa.gov/citations/19890017288

Swarm Processor System: hardware process scheduler based energy efficient multi-core system

Autoren: Sang-Min Lee Seung Hun Kim Won Seob Jeong et al.

Quelle: IEICE Electronics Express. 2014, 11(14):20140424

Cyclical processor and computer architectures for highly parallel applications

Autoren: Wong, Fut-Suan

Verfügbarkeit: http://hdl.handle.net/2429/25646

Parallel techniques for physically based simulation on multi-core processor architectures

Autoren: Thomaszewski, Bernhard Pabst, Simon Blochinger, Wolfgang

Quelle: Computers & Graphics. Feb2008, Vol. 32 Issue 1, p25-40. 16p.

Schlagwörter: *DIGITAL image processing, *COMPUTER architecture, *LINEAR systems, *PARALLEL algorithms, *COMPUTER graphics software, *COMPUTATIONAL mathematics

Exploring Processor and Memory Architectures for Multimedia

Autoren: Iranpour, Ali Lund University, Faculty of Engineering, LTH, Departments at LTH, Department of Computer Science, Parallel Systems, Lunds universitet, Lunds Tekniska Högskola, Institutioner vid LTH, Institutionen för datavetenskap, Parallella System, Originator Lund University, Faculty of Engineering, LTH, Departments at LTH, Department of Computer Science, Lunds universitet, Lunds Tekniska Högskola, Institutioner vid LTH, Institutionen för datavetenskap, Originator et al.

Weitere Verfasser: Iranpour, Ali Lund University, Faculty of Engineering, LTH, Departments at LTH, Department of Computer Science, Parallel Systems, Lunds universitet, Lunds Tekniska Högskola, Institutioner vid LTH, Institutionen för datavetenskap, Parallella System, Originator Lund University, Faculty of Engineering, LTH, Departments at LTH, Department of Computer Science, Lunds universitet, Lunds Tekniska Högskola, Institutioner vid LTH, Institutionen för datavetenskap, Originator et al.

Schlagwörter: Natural Sciences, Computer and Information Sciences, Computer Sciences, Naturvetenskap, Data- och informationsvetenskap (Datateknik), Datavetenskap (Datalogi)

Dateibeschreibung: electronic

Zugangs-URL: https://lucris.lub.lu.se/ws/files/5380095/2270093.pdf

Multipass communication systems for tiled processor architectures

Autoren: Shnidman, Nathan R. (Nathan Robert)

Thesis Advisors: Anant Agarwal., Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.

Schlagwörter: Electrical Engineering and Computer Science.

Dateibeschreibung: 202 p.; application/pdf

Verfügbarkeit: http://hdl.handle.net/1721.1/36137

ePUMA embedded parallel DSP processor with Unique Memory Access

Autoren: Liu, Dake Karlsson, Andréas Sohl, Joar et al.

Quelle: ePUMA Information, Communications and Signal Processing (ICICS), 2011. :1-5

Schlagwörter: digital signal processing chips, embedded systems, field programmable gate arrays, information retrieval, memory architecture, parallel architectures, parallel programming, SIMD memory subsystem architecture, control stream processing, ePUMA embedded parallel DSP processor, free parallel data access, hardware limit, high-end embedded systems, kernel-based parallel programming flow, master-slave multiSIMD architecture, on chip multiDSP-processor, orthogonal operations, parallel arithmetic computing kernels, parallel computing, parallel data access, parallel signal processing platform, programming tools, unique memory access, Baseband, Computer architecture, Digital signal processing, Kernel, Multimedia communication, Power demand, Silicon, CMP, SIMD, ePUMA

Dateibeschreibung: print

Zugangs-URL: https://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-100382

Multipass communication systems for tiled processor architectures

Autoren: Anant Agarwal. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Shnidman, Nathan R. (Nathan Robert)

Index Begriffe: Electrical Engineering and Computer Science., Thesis

URL: http://hdl.handle.net/1721.1/36137

Architectures of Flexible Symmetric Key Crypto Engines-A Survey: From Hardware Coprocessor to Multi-Crypto-Processor System on Chip.

Autoren: BOSSUET, LILIAN GRAND, MICHAEL GASPAR, LUBOS et al.

Quelle: ACM Computing Surveys. Aug2013, Vol. 45 Issue 4, p41-41:32. 32p. 9 Diagrams, 3 Charts, 2 Graphs.

Schlagwörter: *CRYPTOGRAPHY research, *COMPUTER network security, *COMPUTER architecture, *FAULT-tolerant computing, *FAULT tolerance (Engineering), *RELIABILITY in engineering

Parallel Architectures.

Autoren: Flynn, Michael J. Rudd, Kevin W.

Quelle: ACM Computing Surveys. Mar96, Vol. 28 Issue 1, p67-70. 4p.

Schlagwörter: *COMPUTERS, *MULTIPROCESSORS, *MATHEMATICAL combinations, *ENGINEERING models, *SYSTOLIC array circuits, *COMPUTER systems

Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures

Autoren: Wolinski, Christophe Kuchcinski, Krzysztof Teich, Jürgen et al.

Weitere Verfasser: Wolinski, Christophe Kuchcinski, Krzysztof Teich, Jürgen et al.

Quelle: 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools. 11th Euromicro conference on Digital System Design (DSD). :345-352

Schlagwörter: Natural Sciences, Computer and Information Sciences, Computer Sciences, Naturvetenskap, Data- och informationsvetenskap (Datateknik), Datavetenskap (Datalogi)

Pipelined computations of B-spline curve.

Autoren: Wang, C.-H. Liu, H.-Y. Wen, R.-S.

Quelle: IEEE Transactions on Systems, Man & Cybernetics. 1992, Vol. 22 Issue 2, p327-331. 5p.

An optimizing C compiler for DSP architectures

Optimizing C compiler for digital signal processor architectures

Autoren: Lin, Jeremy H. (Jeremy Huei), 1976

Thesis Advisors: Martin Rinard., Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science

Schlagwörter: Electrical Engineering and Computer Science

Dateibeschreibung: 48 leaves; application/pdf

Verfügbarkeit: http://hdl.handle.net/1721.1/47889

Optimal processor dynamic-energy reduction for parallel workloads on heterogeneous multi-core architectures.

Autoren: Barros, C.A. Silveira, L.F.Q. Valderrama, C.A. et al.

Quelle: Microprocessors & Microsystems. Aug2015, Vol. 39 Issue 6, p418-425. 8p.

Schlagwörter: *PARALLEL computers, *WORKLOAD of computer networks, *HETEROGENEOUS computing, *MULTICORE processors, *COMPUTER architecture

The Impact of Parallel Architectures on the Solution of Eigenvalue Problems.

Autoren: YALE UNIV NEW HAVEN CT DEPT OF COMPUTER SCIENCE Ipsen,Ilse C. F. Saad,Youcef

Quelle: DTIC AND NTIS

Index Begriffe: Theoretical Mathematics, ALGORITHMS, COMPUTATIONS, EIGENVALUES, PARALLEL PROCESSING, LINEAR ALGEBRA, COUPLING(INTERACTION), LINEAR SYSTEMS, IMPACT, MODELS, TWO DIMENSIONAL, GRIDS, NUMERICAL ANALYSIS, ARRAYS, PROCESSING EQUIPMENT, SOLUTIONS(GENERAL), SURVEYS, SYMMETRY, VECTOR ANALYSIS, MULTIPROCESSORS, PARALLEL ORIENTATION, ARCHITECTURE., Text

URL: https://apps.dtic.mil/docs/citations/ADA163187

Processor-embedded distributed smart disks for I/O-intensive workloads: architectures, performance models and evaluation

Autoren: Chiu, Steve C. Liao, Wei-keng Choudhary, Alok N. et al.

Quelle: Journal of Parallel & Distributed Computing. Mar2004, Vol. 64 Issue 3, p427. 20p.

Schlagwörter: *EMBEDDED computer systems, *INTEGRATED circuits, *SYSTEMS design, *DATA transmission systems

Efficient Implementation of 3D Finite Difference Schemes on Recent Processor Architectures

Effektiv implementering av finita differensmetoder i 3D på senaste processorarkitekturer

Autoren: Ceder, Frederick

Schlagwörter: hpc, high performance computing, intel, haswell, xeon phi, knights corner, burgers equation, finite difference methods, fdm, ftcs, parallel programming, vectorization, simd, Computer Sciences, Datavetenskap (datalogi)

Dateibeschreibung: application/pdf

Verfügbarkeit: http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-170082

High-performance computer system architectures for embedded computing

Autoren: Lee, Dongwon

Schlagwörter: Turbo decoding, GPU architecture, SDF graph, DRAM system, Embedded computer systems, High performance computing, Electronic data processing, Parallel processing (Electronic computers)

Verfügbarkeit: http://hdl.handle.net/1853/42766

Thread-Parallel MPEG-2, MPEG-4 and H.264 Video Encoders for SoC Multi-Processor Architectures.

Autoren: Jacobs, Tom R. Chouliaras, Vassilios A. Mulvaney, David J.

Quelle: IEEE Transactions on Consumer Electronics. Feb2006, Vol. 52 Issue 1, p269-275. 7p. 3 Diagrams, 8 Graphs.

Schlagwörter: *MULTIPROCESSORS, *MPEG (Video coding standard), *DIGITAL video standards, *ELECTRONIC circuit design, *VIDEO compression standards, *COMPUTERS

Application-Set Driven Exploration for Custom Processor Architectures

Autoren: Arslan, Mehmet Ali Gruian, Flavius Kuchcinski, Krzysztof et al.

Weitere Verfasser: Arslan, Mehmet Ali Gruian, Flavius Kuchcinski, Krzysztof et al.

Quelle: 2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP) 26th IEEE International Conference on Application-specific Systems, Architectures and Processors. :70-71

Schlagwörter: Natural Sciences, Computer and Information Sciences, Computer Sciences, Naturvetenskap, Data- och informationsvetenskap (Datateknik), Datavetenskap (Datalogi)