Search Results - acm: c.: computer system organizacia/c.1: processor architectures/c.1.4: parallel architecture*

A continuation-based noninterruptible multithreading processor architecture.

Authors: Amamiya, Satoshi Amamiya, Makoto Hasegawa, Ryuzo et al.

Source: Journal of Supercomputing; Feb2009, Vol. 47 Issue 2, p228-252, 25p, 18 Diagrams, 1 Chart, 10 Graphs

Subject Terms: INTEGRATED circuits, SIMULTANEOUS multithreading processors, COMPUTER architecture, COMPUTERS, COMPUTER operating systems, COMPUTER software, COMPUTER programming

Reliability aware throughput management of chip multi-processor architecture via thread migration.

Authors: Pouyan, Fatemeh Azarpeyvand, Ali Safari, Saeed et al.

Source: Journal of Supercomputing; Apr2016, Vol. 72 Issue 4, p1363-1380, 18p

Subject Terms: SIMULTANEOUS multithreading processors, COMPUTER architecture, SOFT errors, MINIATURE electronic equipment, PARALLEL processing, MULTIPROCESSORS

Multi-objective scheduling of Scientific Workflows in multisite clouds

Authors: Liu, Ji Pacitti, Esther Valduriez, Patrick et al.

Contributors: Liu, Ji Pacitti, Esther Valduriez, Patrick et al.

Source: Recercat. Dipósit de la Recerca de Catalunya
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)

Subject Terms: multi-objective scheduling, Multisite cloud, [INFO.INFO-DB]Computer Science [cs]/Databases [cs.DB], Parallel processing (Electronic computers), Processament en paral·lel (Ordinadors), Enginyeria electrònica [Àrees temàtiques de la UPC], Scientific workflow, Workflow computing systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, 02 engineering and technology, Cicle de treball, Scientific workflow management system, multisite cloud, Multi-objective scheduling, 0202 electrical engineering, electronic engineering, information engineering, [INFO.INFO-DB] Computer Science [cs]/Databases [cs.DB], Algorismes computacionals, parallel execution, Algorithms and architectures for advanced scientific computing, Àrees temàtiques de la UPC::Enginyeria electrònica, scientific workflow management system, Parallel execution

File Description: application/pdf

Access URL: https://upcommons.upc.edu/bitstream/2117/95941/1/Multi-objective%20scheduling%20of%20scientific%20workflows%20in%20Multisite.pdf
http://hdl.handle.net/2117/95941
https://upcommons.upc.edu/handle/2117/95941
https://core.ac.uk/display/81576844
https://www.sciencedirect.com/science/article/pii/S0167739X16300917
https://dblp.uni-trier.de/db/journals/fgcs/fgcs63.html#LiuPVOM16
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01342203/document
https://hal.archives-ouvertes.fr/lirmm-01342203

SPAA'95 : 7th annual ACM symposium on parallel algorithms and architectures : July 17-19, 1995, Santa Barbara, California / spons. by ACM SIGACT, ACM SIGARCH in cooperation with EATCS.

Authors: ACM Symposium on Parallel Algorithms and Architectures (7 ; 1995 ; Santa Barbara). ACM Special Interest Group for Algorithms and Computation Theory. ACM Special Interest Group on Computer Architecture. et al.

Contributors: ACM Symposium on Parallel Algorithms and Architectures (7 ; 1995 ; Santa Barbara). ACM Special Interest Group for Algorithms and Computation Theory. ACM Special Interest Group on Computer Architecture. et al.

Source: Bibliogr. przy rozdz.
Index.

Access URL: http://katalog.nukat.edu.pl/lib/item?id=chamo:1759879&theme=nukat

SPAA'94 : 6th annual ACM symposium on parallel algorithms and architectures : June 27-29, 1994, Cape May, New Jersey / spons. by ACM SIGACT, ACM SIGARCH in cooperation with EATCS.

Authors: ACM Symposium on Parallel Algorithms and Architectures (6 ; 1994 ; Cape May). ACM Special Interest Group for Automata and Computability Theory. ACM Special Interest Group on Computer Architecture. et al.

Contributors: ACM Symposium on Parallel Algorithms and Architectures (6 ; 1994 ; Cape May). ACM Special Interest Group for Automata and Computability Theory. ACM Special Interest Group on Computer Architecture. et al.

Source: Bibliogr. przy rozdz.
Indeks.

Subject Terms: Przetwarzanie równoległe (informatyka) -- konferencje, Algorytmy -- konferencje, Architektura komputerów -- konferencje

Access URL: http://katalog.nukat.edu.pl/lib/item?id=chamo:1759872&theme=nukat

Fast Parallel Graph-Search with Splittable and Catenable Frontiers

Authors: Acar, Umut A. Charguéraud, Arthur Rainey, Mike et al.

Contributors: Acar, Umut A. Charguéraud, Arthur Rainey, Mike et al.

Source: [Technical Report] Inria. 2015

Subject Terms: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL], ACM: F.: Theory of Computation/F.2: ANALYSIS OF ALGORITHMS AND PROBLEM COMPLEXITY/F.2.2: Nonnumerical Algorithms and Problems, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS]

Access URL: https://inria.hal.science/hal-01089125v2/file/psearch.pdf
https://inria.hal.science/hal-01089125
https://inria.hal.science/hal-01089125v2/document

Novel graph processor architecture, prototype system, and results

Authors: Vitaliy Gleyzer Alexei Lomakin William S. Song et al.

Source: 2016 IEEE High Performance Extreme Computing Conference (HPEC). :1-7

Subject Terms: FOS: Computer and information sciences, Computer Science - Distributed, Parallel, and Cluster Computing, Hardware Architecture (cs.AR), 0202 electrical engineering, electronic engineering, information engineering, Distributed, Parallel, and Cluster Computing (cs.DC), 02 engineering and technology, 0101 mathematics, Computer Science - Hardware Architecture, 01 natural sciences

Access URL: http://arxiv.org/pdf/1607.06541
http://arxiv.org/abs/1607.06541
https://arxiv.org/abs/1607.06541
http://ui.adsabs.harvard.edu/abs/2016arXiv160706541S/abstract
https://arxiv.org/pdf/1607.06541.pdf
https://arxiv.org/abs/1607.06541
http://ieeexplore.ieee.org/document/7761635/
https://dblp.uni-trier.de/db/journals/corr/corr1607.html#SongGLK16
https://arxiv.org/pdf/1607.06541
http://ieeexplore.ieee.org/abstract/document/7761635
https://ieeexplore.ieee.org/document/7761635/

Architectures of flexible symmetric key crypto engines—a survey: From hardware coprocessor to multi-crypto-processor system on chip

Authors: Bossuet, Lilian Grand, Michael Gaspar, Lubos et al.

Contributors: Bossuet, Lilian Grand, Michael Gaspar, Lubos et al.

Source: ACM Computing Surveys

Subject Terms: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 16. Peace & justice

Security and Safety Concerns in Air Taxis: A Systematic Literature Review

Authors: Isadora Garcia Ferrão David Espes Catherine Dezan et al.

Contributors: Isadora Garcia Ferrão David Espes Catherine Dezan et al.

Source: Sensors (Basel)
Sensors, Vol 22, Iss 18, p 6875 (2022)
Sensors; Volume 22; Issue 18; Pages: 6875

Subject Terms: ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems, air taxi architecture, Aircraft, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.1: Mobile processors, Chemical technology, 05 social sciences, TP1-1185, Article, [INFO.INFO-MC]Computer Science [cs]/Mobile Computing, [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], air taxi security, air taxi safety, 11. Sustainability, 0502 economics and business, Humans, Safety

File Description: application/pdf

Access URL: https://pubmed.ncbi.nlm.nih.gov/36146224
https://doaj.org/article/6ede3995254045d2ae6cd72c94932ffc

The K2 distributed memory parallel processor: architecture, compiler, and operating system

Authors: P. Steiner M. Annaratone M. Viredaz et al.

Source: Proceedings of the 1991 ACM/IEEE conference on Supercomputing - Supercomputing '91. :900-909

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 0101 mathematics, 01 natural sciences

Access URL: https://dl.acm.org/doi/10.1145/125826.126721
https://dblp.uni-trier.de/db/conf/sc/sc1991.html#AnnaratoneFHRSV91
http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000005348857

DiST: a simple, reliable and scalable method to significantly reduce processor architecture simulation time

Authors: Girbal, Sylvain Mouchard, Gilles Cohen, Albert et al.

Contributors: Girbal, Sylvain Mouchard, Gilles Cohen, Albert et al.

Source: ACM SIGMETRICS Performance Evaluation Review. 31:1-12

Subject Terms: [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, [INFO.INFO-PL] Computer Science [cs]/Programming Languages [cs.PL], [INFO.INFO-ES] Computer Science [cs]/Embedded Systems

File Description: application/pdf

Access URL: https://hal.science/hal-01257307v1
https://dl.acm.org/doi/10.1145/781027.781029
https://hal.archives-ouvertes.fr/hal-01257307
http://www.cs.usask.ca/ftp/pub/discus/seminars2003-2004/dist.pdf
http://pages.saclay.inria.fr/olivier.temam/files/eval/GMCT03.pdf
https://hal.archives-ouvertes.fr/hal-01257307/document
https://dblp.uni-trier.de/db/conf/sigmetrics/sigmetrics2003.html#GirbalMCT03

On the processing architecture in wireless video sensor networks: node and network level performance evaluation.

Authors: Yousefi, Mehdi Hadadian Nejad Kavian, Yousef S. Mahmoudi, Alimorad

Source: Multimedia Tools & Applications; Sep2019, Vol. 78 Issue 17, p24789-24807, 19p

Subject Terms: WIRELESS sensor networks, NETWORK performance, ARCHITECTURE, PERFORMANCE evaluation, FIELD programmable gate arrays, COMPUTER network architectures

Decoupled Vector Processing Unit: Past, Present, and Future.

Authors: Wang, Ruo-Xi Zhang, Dun-Bo Lang, Qing-Jie et al.

Source: Journal of Computer Science & Technology (10009000); Sep2025, Vol. 40 Issue 5, p1368-1385, 18p

Subject Terms: SIMD (Computer architecture), PARALLEL processing, ARRAY processors, SCALABILITY, MICROPROCESSOR design & construction

Cyclical processor and computer architectures for highly parallel applications

Authors: Wong, Fut-Suan

Access URL: https://open.library.ubc.ca/media/download/pdf/831/1.0096640/1
https://open.library.ubc.ca/handle/2429/25646

Energy consumption model over parallel programs implemented on multicore architectures

Authors: Ricardo Isidro-Ramirez Amilcar Meneses‐Viveros E. Hernández

Source: International Journal of Advanced Computer Science and Applications. 6

Subject Terms: FOS: Computer and information sciences, Parallel computing, Computer Networks and Communications, Mobile device, 02 engineering and technology, Cloud Computing and Big Data Technologies, Computer multitasking, 7. Clean energy, Microprocessor, Multicore Architectures, Parallel Computing, Server, Engineering, Distributed Grid Computing Systems, 11. Sustainability, Parallel Computing and Performance Optimization, FOS: Mathematics, 0202 electrical engineering, electronic engineering, information engineering, GPU Computing, Efficient energy use, Embedded system, Biology, Ecology, Multi-core processor, Performance Optimization, Statistics, Computer science, Distributed computing, Energy consumption, High-Performance Computing, Operating system, Hardware and Architecture, Electrical engineering, FOS: Biological sciences, Computer Science, Physical Sciences, Energy (signal processing), Mathematics, Information Systems

Access URL: http://thesai.org/Downloads/Volume6No6/Paper_35-Energy_consumption_model_over_parallel_programs.pdf
https://thesai.org/Downloads/Volume6No6/Paper_35-Energy_consumption_model_over_parallel_programs.pdf
https://thesai.org/Publications/ViewPaper?Volume=6&Issue=6&Code=IJACSA&SerialNo=35

L'architecture considérée sous le rapport de l'art, des moeurs et de la législation. Tome 1 / ; par C.-N. Ledoux. Tome premier, 1804

Authors: Ledoux, Claude-Nicolas, 1736-1806, Auteur du texte

Source: Bibliothèque nationale de France, département Réserve des livres rares, RES-V-25, 1804.

Relation: Notice d'ensemble : http://catalogue.bnf.fr/ark:/12148/cb30770251g; Notice d’oeuvre : http://catalogue.bnf.fr/ark:/12148/cb121212940; Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb30770251g

Access URL: http://gallica.bnf.fr/ark:/12148/bpt6k1047050b

Classification of parallel processor architectures (invited tutorial session)

Authors: Dennis Gannon James Browne Daniel D. Gajski et al.

Source: ACM SIGARCH Computer Architecture News. 13:45

Subject Terms: 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 01 natural sciences

Access URL: https://dl.acm.org/doi/10.1145/327070.328200

Customized pipeline and instruction set architecture for embedded processing engines.

Authors: Yazdanbakhsh, Amir Salehi, Mostafa Fakhraie, Sied

Source: Journal of Supercomputing; May2014, Vol. 68 Issue 2, p948-977, 30p

Subject Terms: EMBEDDED computer systems, BENCHMARKING (Management), PROGRAM transformation, BANDWIDTHS, DATA pipelining, COMPUTER architecture

[Croquis de maisons et de détails d'architecture à Bourges] : [dessin] / [C. Meryon], 1852

Authors: Meryon, Charles, 1821-1868, Graveur

Source: Bibliothèque nationale de France, département Estampes et photographie, RESERVE FOL-B-6 (4), 1852.

Relation: Notice d'ensemble : http://catalogue.bnf.fr/ark:/12148/cb42129049v; Notice de recueil : http://catalogue.bnf.fr/ark:/12148/cb403476810; Appartient à : [Recueil. Oeuvre de Charles Meryon. Dessins]; Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb42129049v

Access URL: http://gallica.bnf.fr/ark:/12148/btv1b550024734

Evaluation of fault-tolerant parallel-processor architectures over long space missions

Authors: Johnson, Sally C

Subject Terms: Statistics And Probability

Access URL: https://ntrs.nasa.gov/citations/19890017288