Suchergebnisse - acm: c.: computer system organizacia/c.1: processor architecture/c.1.4: parallel architecture*

Parallel Fock Matrix Construction Algorithm for Molecular Orbital Calculation Specific Computer / 分子軌道計算専用計算機のためのフォック行列並列計算アルゴリズムの開発

Autoren: Hiroaki HONDA Hiroaki UMEDA Umpei NAGASHIMA et al.

Quelle: Journal of Computer Chemistry, Japan. 2005, 4(4):179

An Overview of Parallel Processors and Processing.

Autoren: Tse-Yun Feng¹

Quelle: ACM Computing Surveys. Mar77, Vol. 9 Issue 1, p1-2. 2p.

Schlagwörter: *MULTIPROCESSORS, *COMPUTER architecture, *PARALLEL processing, *COMPUTERS, DATA pipelining, LARGE scale integration of circuits

Reviews & Products: ACM Computing Surveys (Periodical)

Pipelined computations of B-spline curve.

Autoren: Wang, C.-H. Liu, H.-Y. Wen, R.-S.

Quelle: IEEE Transactions on Systems, Man & Cybernetics. 1992, Vol. 22 Issue 2, p327-331. 5p.

A Survey of Techniques for Architecting and Managing Asymmetric Multicore Processors.

Autoren: MITTAL, SPARSH¹ (AUTHOR) mittals@ornl.gov

Quelle: ACM Computing Surveys. Feb2016, Vol. 48 Issue 3, p45:1-45:38. 38p. 2 Diagrams, 6 Charts.

Schlagwörter: *COMPUTER architecture, *COMPUTER systems, *PARALLEL processing, *VIRTUAL machine systems, MULTICORE processors, HETEROGENEITY, AMDAHL'S law

Associative and Parallel Processors.

Autoren: Thurber, Kenneth J. Wald, Leon D.

Quelle: ACM Computing Surveys. Dec75, Vol. 7 Issue 4, p215-255. 41p.

Schlagwörter: *COMPUTER architecture, *COMPUTER software, *PARALLEL processing, *COMPUTER systems, ARRAY processors, ILLIAC computer

Can Traditional Programming Bridge the Ninja Performance Gap for Parallel Computing Applications?

Autoren: Satish, Nadathur Kim, Changkyu Chhugani, Jatin et al.

Quelle: Communications of the ACM. May2015, Vol. 58 Issue 5, p77-86. 10p. 2 Diagrams, 1 Chart, 9 Graphs.

Schlagwörter: *PARALLEL programming, *C++, PERFORMANCE, PARALLEL programs (Computer programs), MULTICORE processors, SIMD (Computer architecture)

Parallel Computation for Distributed Parameter System form Vector Processor to ADENA Computer / 分布定数系の並列演算

Autoren: Tatsuo NOGI 野木 達夫

Quelle: 計測と制御 / Journal of The Society of Instrument and Control Engineers. 1983, 22(4):340

A Low-Cost Continuous-Flow Parallel Memory-Based FFT Processor for UWB Applications

Autoren: Chin-Long WEY Chun-Ming HUANG Hsu-Sheng WANG et al.

Quelle: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. 2011, E94.A(1):315

Design of a Parallel VLSI Processor for Road Extraction Based on Logic-in-Memory Architecture

Autoren: Michitaka KAMEYAMA Takahiro HANYU Takao KUDOH

Quelle: Transactions of the Society of Instrument and Control Engineers. 2000, 36(11):1009

The Memorism Processor: Towards a Memory-Based Artificially Intelligence Complementing the von Neumann Architecture

Autoren: Cong-Kha PHAM Katsumi INOUE

Quelle: SICE Journal of Control, Measurement, and System Integration. 2017, 10(6):544

Integration Architecture of Content Addressable Memory and Massive-Parallel Memory-Embedded SIMD Matrix for Versatile Multimedia Processor

Autoren: Hans Jürgen MATTAUSCH Hideyuki NODA Katsumi DOSAKA et al.

Quelle: IEICE Transactions on Electronics. 2008, E91.C(9):1409

The Connection Machine model CM-1 architecture.

Autoren: Kahle, B.A. Hillis, W.D.

Quelle: IEEE Transactions on Systems, Man & Cybernetics. 1989, Vol. 19 Issue 4, p707-713. 7p.

Adaptation of an acoustic propagation model to the parallel architecture of a graphics processor

Autoren: Ey, Emanuel Felisberto, P. Sapientia

Weitere Verfasser: Ey, Emanuel Felisberto, P. Sapientia

Quelle: urn:tid:202485617

Schlagwörter: Underwater acoustics, Acoustic propagation modeling, High-performance computing, Open CL, Parallel computing

Dateibeschreibung: application/pdf

Verfügbarkeit: http://hdl.handle.net/10400.1/4990

A hierarchical and parallel SoC architecture for vision procesor

Autoren: Bin Zhang Chenyang Ge Kuizhi Mei

Quelle: IEICE Electronics Express. 2009, 6(19):1380

Associate Processor Architecture -- A Survey.

Autoren: S. S. Yau, Gordon J. H. S. Fung, Gordon J.

Quelle: ACM Computing Surveys. Mar77, Vol. 9 Issue 1, p3-27. 25p.

Schlagwörter: *MULTIPROCESSORS, *INTEGRATED circuits, *PARALLEL processing, *COMPUTERS, *COMPUTER architecture, *DISTRIBUTED computing

A Novel Algorithm for Large-Scale Fock Matrix Generation with Small Local Distributed Memory Parallel Architecture. - Relation to the Integral Cutoff - / 分散メモリ型並列計算機に適した新しい大規模フォック行列生成アルゴリズム

Quelle: Journal of Chemical Software. 2000, 6(3):85

Superconductor Processor Architecture / 超伝導プロセッサ・アーキテクチャ

Autoren: Koji INOUE Koki ISHIDA Masamitsu TANAKA et al.

Quelle: 低温工学 / TEION KOGAKU (Journal of Cryogenics and Superconductivity Society of Japan). 2021, 56(2):87

The STAMPede Approach to Thread-Level Speculation.

Autoren: Steffan, J. Gregory Colohan, Christopher Zhai, Antonia et al.

Quelle: ACM Transactions on Computer Systems. Aug2005, Vol. 23 Issue 3, p253-300. 48p.

Schlagwörter: *COMPUTER architecture, *MULTIPROCESSORS, *MULTIMEDIA systems, *COMPUTERS, *COMPUTER systems, ELECTRONIC systems

High Speed Processing Method for A SIMD Parallel Computer

Autoren: Akira IWASE Hiroyuki MIYATA Hisao Koizumi et al.

Quelle: IEEJ Transactions on Electronics, Information and Systems. 2002, 122(5):878

A B-tree parallel processor for information retrieval.

Autoren: Hurson, A R Miller, L L

Quelle: International Journal of Mini & Microcomputers. 1987, Vol. 9 Issue 1, p6-10. 5p.

Schlagwörter: *Information retrieval, *Personal computers, Architecture