Search Results - acm: c.: computer system organizacia/c.1: process architectures/c.1.4: parallel architectures~

Modelling parallel programs and multiprocessor architectures with AXE

Authors: Yan, Jerry C Fineman, Charles E

Subject Terms: Computer Systems

Access URL: https://ntrs.nasa.gov/citations/19910015479

Swarm Processor System: hardware process scheduler based energy efficient multi-core system

Authors: Sang-Min Lee Seung Hun Kim Won Seob Jeong et al.

Source: IEICE Electronics Express. 2014, 11(14):20140424

Parallel Computer Architectures for the SPMD Programming Model

Authors: 北島宏之 [著]

File Description: image/jp2

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I3177822

Degree: 博士 (情報科学) -- 東北大学

Study on architectures for parallel opto-electronic computer

Authors: 林森茂 [著]

File Description: image/jp2

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I3116433

Degree: 博士 (工学) -- 東京工業大学

Commissioning Experience With the ATLAS Level-1 Calorimeter Trigger System.

Authors: Achenbach, R. Adragna, P. Andrei, V. et al.

Source: IEEE Transactions on Nuclear Science. Feb2008 Part 1 of 3, Vol. 55 Issue 1, p99-105. 7p. 6 Diagrams, 1 Chart, 1 Graph.

Subject Terms: *COMPUTER architecture, *COMPUTER input-output equipment, PARALLEL computers, DATA pipelining, REAL-time programming, TRIGGER circuits, CALORIMETERS

Um processo de gera??o autom?tica de c?digo paralelo para arquiteturas h?bridas com afinidade de mem?ria

An automatic parallel code generation process for hybrid architectures using memory affinity

Authors: Raeder, Mateus

Thesis Advisors: Fernandes, Luiz Gustavo Le?o

Source: Biblioteca Digital de Teses e Dissertações da PUC_RSPontifícia Universidade Católica do Rio Grande do SulPUC_RS.

Subject Terms: Programa??o H?brida, Afinidade de Mem?ria, Cluster de NUMA, CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO

File Description: application/pdf

Relation: 1974996533081274470; 600; -3008542510401149144; 3671711205811204509

Availability: http://tede2.pucrs.br/tede2/handle/tede/7390

Playable Serious Games for Studying and Programming Computational STEM and Informatics Applications of Distributed and Parallel Computer Architectures

Authors: Amenyo, John-Thones

Source: Journal of Educational Computing Research. 2012 47(4):351-370.

Peer Reviewed: Y

Page Count: 20

Descriptors: Educational Games, Computer Games, Computer Uses in Education, Programming, Information Science, Computer Science Education, Computer System Design, STEM Education, Professional Personnel, Training Methods, Instructional Materials, Educational Strategies, Computer Simulation, College Instruction

Access URL: https://baywood.metapress.com/link.asp?target=contribution&id=C382164612W4M379

Parallel architectures for computing cyclic convolutions

Authors: Yeh, C.-S Reed, I. S Truong, T. K

Source: IEE Proceedings, Part F - Communications, Radar and Signal Processing. 130(5 Au)

Subject Terms: Computer Operations And Hardware

Access URL: https://ntrs.nasa.gov/citations/19830062461

Parallel architectures for an industrial computer tomography system

Authors: Kingswood, N.

Subject Terms: 621.3994, Image reconstruction

Availability: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.234888

Cyclical processor and computer architectures for highly parallel applications

Authors: Wong, Fut-Suan

Availability: http://hdl.handle.net/2429/25646

Parallel Architectures.

Authors: Flynn, Michael J. Rudd, Kevin W.

Source: ACM Computing Surveys. Mar96, Vol. 28 Issue 1, p67-70. 4p.

Subject Terms: *COMPUTERS, *MULTIPROCESSORS, *COMPUTER systems, MATHEMATICAL combinations, ENGINEERING models, SYSTOLIC array circuits

Program structures and computer architectures for parallel processing

Authors: Montagne, Euripides.

Subject Terms: Parallel programming (Computer science), Computer architecture., Computer engineering., Vivaldi II (Computer system)

Subject Geographic: Master of Science (School of Computer Science.)

File Description: application/pdf

Relation: alephsysno: 000242043; proquestno: AAIML31188; Theses scanned by UMI/ProQuest.

Availability: http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=65949

Parallel algorithms and architectures for LDPC Decoding

Authors: Fernandes, Gabriel Falcão Paiva

Source: FERNANDES, Gabriel Falcão Paiva - Parallel algorithms and architectures for LDPC decoding [em linha]. Coimbra : [s.n], 2010. [Consult. Dia Mês Ano]. Tese de doutoramento. Disponível na WWW:<http://hdl.handle.net/10316/14583>

Subject Terms: Computação paralela, Arquitectura de computadores

Availability: https://hdl.handle.net/10316/14583

Platform-Based Design From Parallel C Specifications.

Authors: Augé, Ivan Pétrot, Frédéric Donnet, François et al.

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Dec2005, Vol. 24 Issue 12, p1811-1826. 16p.

Subject Terms: *COMPUTER operating systems, *INTEGRATED circuits, *SYSTEMS design, *COMPUTER software, MIMD computers, ELECTRONIC systems

Parallel algorithms and architectures for solving elliptic partial differential equations

Authors: Kuo, C.-C. Jay (Chung-Chieh Jay)

Thesis Advisors: Bernard C. Levy and Bruce R. Musicus., Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.

Subject Terms: Electrical Engineering and Computer Science.

File Description: 114 leaves; 6971569 bytes; 6971325 bytes; application/pdf

Availability: http://hdl.handle.net/1721.1/15133

Parallel VLSI Architectures for Multi-Gbps MIMO Communication Systems

Thesis Advisors: Cavallaro, Joseph R.

Subject Terms: Applied sciences, Parallel architectures, VLSI, MIMO, Turbo decoders, Low-density parity-check codes, Computer Engineering, Electrical engineering

File Description: 240 p.; application/pdf

Availability: http://hdl.handle.net/1911/70461

High-performance computer system architectures for embedded computing

Authors: Lee, Dongwon

Subject Terms: Turbo decoding, GPU architecture, SDF graph, DRAM system, Embedded computer systems, High performance computing, Electronic data processing, Parallel processing (Electronic computers)

Availability: http://hdl.handle.net/1853/42766

Parallel memory system architectures for packet processing in network virtualization

Authors: 郡川, 智洋 Korikawa, Tomohiro

File Description: application/pdf

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I11689792

Degree: 博士(情報学) -- 京都大学

Using a Global Name Space for Parallel Execution of UNIX Tools.

Authors: McGregor, John D. Riehl, Arthur M. Fleckenstein, Charles J. et al.

Source: Communications of the ACM. Sep89, Vol. 32 Issue 9, p1085-1090. 6p. 1 Graph.

Subject Terms: *COMPUTER network architectures, *COMPUTER networks, *DISTRIBUTED computing, *PARALLEL programming, *MICROCOMPUTER workstations (Computers), LINDA (Computer system)

Ternary Sparse Matrix Representation for Volumetric Mesh Subdivision and Processing on GPUs.

Authors: Mueller‐Roemer, J. S. Altenhofen, C. Stork, A.

Source: Computer Graphics Forum. Aug2017, Vol. 36 Issue 5, p59-69. 11p.

Subject Terms: *MESH networks, SPARSE matrix software, VOLUMETRIC analysis, GRAPHICS processing units, TERNARY system