Search Results - acm: c.: computer system organización/c.1: process architectural/c.1.4: parallel architectural

The HARNESS Platform: A Hardware-and Network-Enhanced Software System for Cloud Computing

Authors: Coutinho, Jose, G F Stillwell, Mark Argyraki, Katerina et al.

Contributors: Coutinho, Jose, G F Stillwell, Mark Argyraki, Katerina et al.

Source: Software Architecture for Big Data and the Cloud ; https://inria.hal.science/hal-01507344 ; Ivan Mistrik; Rami Bahsoon; Nour Ali; Maritta Heisel; Bruce Maxim. Software Architecture for Big Data and the Cloud, Morgan Kaufmann, 2017, 9780128054673

Subject Terms: ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-OS]Computer Science [cs]/Operating Systems [cs.OS], [INFO.INFO-PF]Computer Science [cs]/Performance [cs.PF], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: info:eu-repo/grantAgreement/EC/FP7/318521/EU/Hardware- and Network-Enhanced Software Systems for Cloud Computing/HARNESS

Availability: https://inria.hal.science/hal-01507344
https://inria.hal.science/hal-01507344v1/document
https://inria.hal.science/hal-01507344v1/file/harness.pdf

Appears in ACM Transactions on Computer System. Efficient Reuse Distance Analysis of Multicore Scaling for Loop-based Parallel Programs

Contributors: The Pennsylvania State University CiteSeerX Archives

Source: http://maggini.eng.umd.edu/pub/sca-tr-2012.pdf.

File Description: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.258.3002

Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.258.3002
http://maggini.eng.umd.edu/pub/sca-tr-2012.pdf

The Influence of Parallel Computer Architectural Parameters on Parallel Logic Programming Systems

Authors: Marcio G. Silva Inês C. Dutra Ricardo G. Bianchini et al.

Contributors: Marcio G. Silva Inês C. Dutra Ricardo G. Bianchini et al.

Source: ftp://www.cos.ufrj.br/pub/tech_reps/es47798.ps.gz

Subject Terms: DSM architectures, performance evaluation, logic programming

File Description: application/postscript

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.35.9618

Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.35.9618

High-performance software for designing complex Cyber-Physical Systems on the parallel computers

Authors: Klushyn, Yuriy Lviv Polytechnic National University

Contributors: Klushyn, Yuriy Lviv Polytechnic National University

Subject Terms: Cyber-Physical Systems, parallel computing systems, a set of interrelated works, multilevel stochastic modeling, Markov process, distribution function of a random variable

Subject Geographic: Львів

File Description: 26-32; application/pdf; image/png

Relation: Advances in Cyber-Physical Systems, 1 (3), 2018; 1. Tsvetkov V. Ya., Alpatov A. N. Problems of distributed systems // Prospects of science and education – 2014. – No. 6. – P. 31–36.; 2. Khaitan et al., “Design Techniques and Applications of Cyber Physical Systems: A Survey”, IEEE Systems Journal, 2014.; 3. Rad, Ciprian-Radu; Hancu, Olimpiu; Takacs, Ioana-Alexandra; Olteanu, Gheorghe (2015). “Smart Monitoring of Potato Crop: A Cyber-Physical System Architecture Model in the Field of Precision Agriculture”. Conference Agriculture for Life, Life for Agriculture. 6: 73–79.; 4. Bocharov P. L., Ignatushchenko V. V. Mathematical models and methods for evaluating the effectiveness of parallel computing systems on complexes of interrelated jobs // Tez. report international conf, “High-Performance Computing Systems in Management and Scientific Research,” Alma-Ata, 1991, p. 6.; 5. Ignatushchenko V. V., Klushin Y. S. Prediction of the implementation of complex software systems on parallel computers: direct stochastic modeling // Automation and Remote Control. 1994. No. 12, p. 142–157.; 6. Khritankov A. S. Mathematical model of performance characteristics of distributed computing systems. Computer science, management, economics. JOBS OF MIPT. – 2010. – Vol. 2, No. 1 (5), p. 110–115.; 7. Ivutin A. N., Larkin E. V. Prediction of the execution time of the algorithm. Magazine. News of TSU. Technical science. Issue number 3/2013 C 301–315.; 8. Ivanov N. N. Mathematical prediction of reliable execution of sets of tasks with symmetric runtime distributions. Journal of Open Education, Issue No. 2–2 / 2011, p. 52–55.; 9. Kulagin V. P., Problems of parallel computing systems Perspectives of Science & Education. 2016. 1 (19) International Scientific Electronic Journal ISSN 2307–2334 (Online); 11. Salibekyan S. M., Panfilov P. B. Questions of automaton-network modeling of computer systems with data flow control // Information technologies and computer systems. 2015. No. 1. P. 3–9.; 12. Kulikov, I., Chernykh, I., Glinsky, B., Weins, D., Shmelev, A. Astrophysics simulation on RSC massively parallel architecture // Proc. 2015 IEEE/ACM 15th Int. Symposium on Cluster, Cloud, and Grid Computing, CCGrid 2015. IEEE Press, 2015.1131–1134.; 13. Boccara N. Modeling Complex Systems. NY: Springer, 2004. 397 p.; 14. Lublinsky B. Defining SOA as an architectural style. 9 January 2007. [Electronic resource]: .; 15. Ivanov S.V., Identification of Parametrically Connected Models of Complex Systems, Nauch.-tekhnich. we know SPSU ITMO. Highperformance computing and computer modeling technologies. 2008. Vol. 54. pp. 100–107.; 16. Ivanov N. N., Ignatushchenko V. V., Mikhailov A. Y., Static prediction of the execution time of complexes of interrelated jobs in multiprocessor computing systems, Avtomat. and Telemekh., 2005, issue 6, 89–103.; 17. Ignatushchenko V. V., Klushin Y. S. Prediction of the implementation of complex software systems on parallel computers: direct stochastic modeling // Automation and Remote Control. 1994. N12, p. 142–157.; 18. Klushin, Y. S. Improving the accuracy of estimating the execution time of folding software systems in multiprocessor computer systems for belt stochastic modeling. Bulletin of NU “Lviv; 19. Klushin Y. S. reducing the number of states of the Markov process when executing complex software systems on parallel computers. Scientific Bulletin of Chernivtsi University. Computer systems and components. 2016. T. 7. Vol. 2, pp. 53–62.; 20. Reibman A. L., Trivedi K. S. Numerical transient analysis of Markov models // Computers and Operations Research. 1988. Vol. 15. No. 1. P. 19–36.; 21. Preidunov Y. V. Development of mathematical models and methods for predicting the implementation of complex software systems on parallel computing systems. PhD thesis. M.: Inst. Of Problems of Management RAS, 1992.; 1. Tsvetkov V. Ya., Alpatov A. N. Problems of distributed systems, Prospects of science and education – 2014, No. 6, P. 31–36.; 2. Khaitan et al., "Design Techniques and Applications of Cyber Physical Systems: A Survey", IEEE Systems Journal, 2014.; 3. Rad, Ciprian-Radu; Hancu, Olimpiu; Takacs, Ioana-Alexandra; Olteanu, Gheorghe (2015). "Smart Monitoring of Potato Crop: A Cyber-Physical System Architecture Model in the Field of Precision Agriculture". Conference Agriculture for Life, Life for Agriculture. 6: 73–79.; 4. Bocharov P. L., Ignatushchenko V. V. Mathematical models and methods for evaluating the effectiveness of parallel computing systems on complexes of interrelated jobs, Tez. report international conf, "High-Performance Computing Systems in Management and Scientific Research," Alma-Ata, 1991, p. 6.; 5. Ignatushchenko V. V., Klushin Y. S. Prediction of the implementation of complex software systems on parallel computers: direct stochastic modeling, Automation and Remote Control. 1994. No. 12, p. 142–157.; 6. Khritankov A. S. Mathematical model of performance characteristics of distributed computing systems. Computer science, management, economics. JOBS OF MIPT, 2010, Vol. 2, No. 1 (5), p. 110–115.; 7. Ivutin A. N., Larkin E. V. Prediction of the execution time of the algorithm. Magazine. News of TSU. Technical science. Issue number 3/2013 P. 301–315.; 8. Ivanov N. N. Mathematical prediction of reliable execution of sets of tasks with symmetric runtime distributions. Journal of Open Education, Issue No. 2–2, 2011, p. 52–55.; 11. Salibekyan S. M., Panfilov P. B. Questions of automaton-network modeling of computer systems with data flow control, Information technologies and computer systems. 2015. No. 1. P. 3–9.; 12. Kulikov, I., Chernykh, I., Glinsky, B., Weins, D., Shmelev, A. Astrophysics simulation on RSC massively parallel architecture, Proc. 2015 IEEE/ACM 15th Int. Symposium on Cluster, Cloud, and Grid Computing, CCGrid 2015. IEEE Press, 2015.1131–1134.; 17. Ignatushchenko V. V., Klushin Y. S. Prediction of the implementation of complex software systems on parallel computers: direct stochastic modeling, Automation and Remote Control. 1994. N12, p. 142–157.; 18. Klushin, Y. S. Improving the accuracy of estimating the execution time of folding software systems in multiprocessor computer systems for belt stochastic modeling. Bulletin of NU "Lviv; 20. Reibman A. L., Trivedi K. S. Numerical transient analysis of Markov models, Computers and Operations Research. 1988. Vol. 15. No. 1. P. 19–36.; 21. Preidunov Y. V. Development of mathematical models and methods for predicting the implementation of complex software systems on parallel computing systems. PhD thesis. M., Inst. Of Problems of Management RAS, 1992.; Klushyn Y. High-performance software for designing complex Cyber-Physical Systems on the parallel computers / Yuriy Klushyn // Advances in Cyber-Physical Systems. — Lviv : Lviv Politechnic Publishing House, 2018. — Vol 3. — No 1. — P. 26–32.; https://ena.lpnu.ua/handle/ntb/45679; Klushyn Y. High-performance software for designing complex Cyber-Physical Systems on the parallel computers / Yuriy Klushyn // Advances in Cyber-Physical Systems. — Lviv Politechnic Publishing House, 2018. — Vol 3. — No 1. — P. 26–32.

Availability: https://ena.lpnu.ua/handle/ntb/45679

Micro-architectural simulation of embedded core heterogeneity with gem5 and McPAT

Authors: Endo, F.A. Couroussé, Damien Charles, H.-P. et al.

Contributors: Endo, F.A. Couroussé, Damien Charles, H.-P. et al.

Source: RAPIDO '15 Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools ; https://cea.hal.science/cea-01818887 ; RAPIDO '15 Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, Jan 2015, Amsterdam, Netherlands. ⟨10.1145/2693433.2693440⟩

Subject Terms: ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.7: Simulation Support Systems, ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.7: Simulation Support Systems/I.6.7.0: Environments, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures, [INFO]Computer Science [cs]

Subject Geographic: Amsterdam, Netherlands

Availability: https://cea.hal.science/cea-01818887
https://doi.org/10.1145/2693433.2693440

省電式晶片網路設計之計算機結構層共同合成演算法 ; An Architectural Co-Synthesis Algorithm for Energy-Aware Network-on-Chip Design

Authors: 張延聖 Chang, Yen-Sheng 楊佳玲 et al.

Contributors: 張延聖 Chang, Yen-Sheng 楊佳玲 et al.

Subject Terms: 合成演算法, 晶片網路, 計算機結構, synthesis, architectural, NoC, Network-on-Chip

File Description: 5270259 bytes; application/pdf

Relation: Bibliography [1] A. Hemani, A. Jantsch, S. Kumar, A. Postula, J. Oberg, M. Millberg, and D. Lindqvist, “Network on a chip: An architecture for billion transistor era,” Proc. of the IEEE NorChip Conference, November 2000. [2] Luca Benini and Giovanni De Micheli, “Network on chips: A new soc paradigm,” IEEE Computers, pp. 70-78, January 2002. [3] Wayne H. Wolf, “Hardware-software codesign of embedded systems,” Proc. IEEE, July 1994. [4] Jingcao Hu and Radu Marculescu, “Energy-aware communication and task scheduling for network-on-chip architecture under real-time constraints,” IEEE Design, Automation and Test in Europe Conference and Exhibition (DATE), 2004. [5] Jingcao Hu and Radu Marculescu,”Energy-aware mapping for tile-based noc architectures under performance constraints,” IEEE ASP-DAC, 2003. [6] Wayne H. Wolf, “An architectural co-synthesis algorithm for distributed, embedded computing systems,” IEEE Transaction on Very Large Scale Integration (VLSI) Systems, vol. 5, June 1997. [7] William J. Dally and Brian Towles, “Route packets, not wires: On-chip interconnection networks,” Proc. Design Automation Conference (DAC), pp. 684-689, June 2001. [8] Shashi Kumar et. al., “A network on chip architecture and design methodology,” IEEE Computer Society Annual Symposium on VLSI, pp. 117-124, April 2002. [9] Terry Tao Ye, Luca Benini, and Giovanni De Micheli, “Analysis of power consumption on switch fabrics in network routers,” Proc. Design Automation Conference (DAC), June 2002. [10] Terry Tao Ye, Luca Benini, and Giovanni De Micheli, “Packetized on-chip interconnect communication analysis for mpsoc,” Proceedings of Design Automation and Test in Europe (DATE), pp. 344-349, March 2003. [11] Vincent Nollet, Thµeodore Marescaux, and Diederik Verkest, “Operating-system controlled network-on-chip,” Proceedings of the 41st Annual Conference on Design Automation (DAC), pp. 256-259, June 2004. [12] Srinivasan Murali and Giovanni De Micheli, “Bandwidth-constrained mapping of cores onto noc architectures,” Proceedings of the Design, Automation and Test in Europe Conference (DATE), vol. 2, February 2004. [13] Dongkun Shin and Jihong Kim, “Power-aware communication optimization for network-on-chips with voltage scalable links,” ACM CODES+ISSS, 2004. [14] Gilbert C. Sih and Edward A. Lee, “A compile-time scheduling heuristic for interconnection-constrained heterogeneous processor architectures,” IEEE Transactions on Parallel and Distributed Systems, vol. 4, no. 2, pp. 175-187, February 1993. [15] Bita Gorjiara, Nader Bagherzadeh, and Pai Chou, “An efficient voltage scaling algorithm for complex socs with few number of voltage modes,” Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), pp. 381-386, August 2004. [16] Ireneusz Karkowski and Henk Corporaal, “Design space exploration algorithm for heterogeneous multi-processor embedded system design,” Proceedings of the 35st Annual Conference on Design Automation (DAC), June 1998. [17] Marco DiNatale and John A. Stankovic, “Applicability of simulated annealing methods to real-time scheduling and jitter control,” IEEE Real-Time Systems Symposium (RTSS), pp. 190-199, 1995. [18] Anantha P. Chandrakasan, Samuel Sheng, and Robert W. Brodersen, “Low-power cmos digital design,” IEEE Journal of Solid-State Circuit, vol. 27, no. 4, April 1992. [19] Graham R. L., “Bounds for certain multiprocessing anomalies,” Bell Syst. Tech. J., pp. 1563-1581, November 1966. [20] Manacher G. K., “Production and stabilization of real-time task schedulers,” J. ACM, pp. 439-465, July 1967. [21] T. Adam, K. Chandy, and J. Dickson., “A comparison of list schedules for parallel processing systems,” Commun. ACM, vol. 17, no. 12, pp. 685-690, December 1974. [22] Martin Grajcar, “Strengths and weaknesses of genetic list scheduling for heterogeneous systems,” Proceedings of the Second International Conference on Application of Concurrency to System Design (ACSD), pp. 123-132, June 2001. [23] T. C. Hu, “Parallel sequencing and assembly line problem,” Oper. Res, vol. 9, no. 6, pp. 841-848, November 1961. [24] Christopher J. Glass and Lionel M. Ni, “The turn model for adaptive routing,” Proceedings., The 19th Annual International Symposium on Computer Architecture (ISCA), pp. 278-287, May 1992. [25] S. Kirkpatrick, C. D. Gelatt, Jr., and M.P. Vecchi, “Optimization by simulated annealing,” Science, vol. 220, no. 4598, pp. 671-680, May 1983. [26] Emile Aarts and Jan Korst, Simulated Annealing and Boltzmann Machines, Wiley and Sons, 1989. [27] Robert P. Dick, David L. Rhodes, and Wayne H. Wolf, “Tgff: Task graphs for free," Proc. Intl. Workshop on Hardware/Software Codesign, March 1998.

Availability: http://ntur.lib.ntu.edu.tw/handle/246246/53661
http://ntur.lib.ntu.edu.tw/bitstream/246246/53661/1/ntu-94-R92922043-1.pdf

Architectural and Protocol Exploration for 3D Optical Network-on-Chip ; Exploration architecturale et protocolaire pour un réseaux 3D optique sur puce

Authors: Luo, Jiating Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources (CAIRN) Inria Rennes – Bretagne Atlantique et al.

Contributors: Luo, Jiating Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources (CAIRN) Inria Rennes – Bretagne Atlantique et al.

Source: https://inria.hal.science/tel-01956255 ; Hardware Architecture [cs.AR]. Université de Rennes 1 [UR1], 2018. English. ⟨NNT : ⟩.

Subject Terms: Network on chip NoC, Réseau sur puce NoC, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.1: Network Architecture and Design, ACM: D.: Software/D.4: OPERATING SYSTEMS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ET]Computer Science [cs]/Emerging Technologies [cs.ET]

Availability: https://inria.hal.science/tel-01956255
https://inria.hal.science/tel-01956255v1/document
https://inria.hal.science/tel-01956255v1/file/These_Jiating_fin.pdf

Weaving system-level properties with architectural decomposition for mechatronic co-design

Authors: Cornelis, Milan Vanommeslaeghe, Yon Van Acker, Bert et al.

Source: 2023 ACM/IEEE International Conference on Model Driven Engineering Languages and Systems Companion (MODELS-C), 1-6 October, 2023, Västerås, Sweden ; 979-83-503-2498-3

Subject Terms: Engineering sciences. Technology, Computer. Automation

Relation: info:eu-repo/semantics/altIdentifier/isi/001137051500068

Availability: https://hdl.handle.net/10067/2018730151162165141
https://repository.uantwerpen.be/docstore/d:irua:22210

DaeMon: Architectural Support for Efficient Data Movement in Disaggregated Systems

Authors: Giannoula, Christina Huang, Kailong Tang, Jonathan et al.

Subject Terms: Computer Science - Hardware Architecture, Computer Science - Distributed, Parallel, and Cluster Computing, Computer Science - Performance, archi, info

Relation: http://arxiv.org/abs/2301.00414

Availability: http://arxiv.org/abs/2301.00414

Process Affinity, Metrics and Impact on Performance: an Empirical Study

Authors: Bordage, Cyril Jeannot, Emmanuel Topology-Aware System-Scale Data Management for High-Performance Computing (TADAAM) et al.

Contributors: Bordage, Cyril Jeannot, Emmanuel Topology-Aware System-Scale Data Management for High-Performance Computing (TADAAM) et al.

Source: 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (IEEE/ACM CCGrid)
https://hal.inria.fr/hal-01901988
18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (IEEE/ACM CCGrid), May 2018, Washington DC, United States

Subject Terms: [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC]

Subject Geographic: Washington DC, United States

Time: Washington DC, United States

Relation: hal-01901988; https://hal.inria.fr/hal-01901988; https://hal.inria.fr/hal-01901988/document; https://hal.inria.fr/hal-01901988/file/article.pdf

Availability: https://hal.inria.fr/hal-01901988
https://hal.inria.fr/hal-01901988/document
https://hal.inria.fr/hal-01901988/file/article.pdf

Diseño Generativo Realimentado (DGR) como soporte en los procesos de creación de productos ; Feedback Generative Design (FGD) as Support in Product Creation Processes

Authors: Restrepo Mendoza, Jhoan Sebastian Cordoba Nieto, Ernesto Grupo de Investigación: Grupo de trabajo en nuevas tecnologías de diseño y manufactura-automatización DIMA-UN

Contributors: Restrepo Mendoza, Jhoan Sebastian Cordoba Nieto, Ernesto Grupo de Investigación: Grupo de trabajo en nuevas tecnologías de diseño y manufactura-automatización DIMA-UN

Subject Terms: 670 - Manufactura, 620 - Ingeniería y operaciones afines, 680 - Manufactura para usos específicos, 600 - Tecnología (Ciencias aplicadas), Diseño industrial, Automatización, Productos nuevos, Diseños de productos, Desarrollo de nuevos productos, Design, industrial, Automation, New products, New product development, Diseño generativo realimentado, Diseño generativo, Optimización multiobjetivo, Diseño paramétrico, Grafos direccionales, Frentes de Pareto, Programación paralela, Feedback-based generative design, Feedback generative design, Generative design, Multi-objective optimization, Parametric design, Directed graphs, Pareto fronts, parallel programming

File Description: xxiii, 206 páginas; application/pdf

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Teo, “Progress and challenges in generative product design: A review of systems,” 12 2020.; Z. Jiang, H. Wen, F. Han, Y. Tang, and Y. Xiong, “Data-driven generative design for mass customization: A case study,” Advanced Engineering Informatics, vol. 54, 10 2022.; P. Wolniak, B. Sauthoff, D. Kloock-Schreiber, and R. Lachmayer, “AUTOMATED PRODUCT FUNCTIONALITY and DESIGN OPTIMIZATION INSTANCING A PRODUCT-SERVICE SYSTEM,” in Proceedings of the Design Society: DESIGN Conference, vol. 1, pp. 1405–1414, Cambridge University Press, 2020.; M. A. S. Al-Shamsi, “Review of Korean Imitation and Innovation in the Last 60 Years,” 3 2022.; B. Bartikowski, F. Fastoso, and H. Gierl, “Luxury cars Made-in-China: Consequences for brand positioning,” Journal of Business Research, vol. 102, pp. 288–297, 9 2019; K. D. Thoben, S. A. Wiesner, and T. Wuest, “Industrie 4.0 and smart manufacturing-a review of research issues and application examples,” 2017.; D. G. Ullman, The Mechanical Design Process, vol. 1. 2010.; A. M. Farid and N. P. Suh, Axiomatic Design in Large Systems. 2016.; R. L. Norton, Dise˜no de m´aquinas. Un enfoque integrado. Pearson Educaci´on, cuarta edi ed., 2011.; S. BuHamdan, A. Alwisy, and A. Bouferguene, “Generative systems in the architecture, engineering and construction industry: A systematic review and analysis,” International Journal of Architectural Computing, 2020.; D. Nagaraj and D. Werth, “Towards a Generalized System for Generative Engineering,” in ACM International Conference Proceeding Series, Association for Computing Machinery, 1 2020.; S. Fox, “A preliminary methodology for generative production systems,” Journal of Manufacturing Technology Management, vol. 22, no. 3, pp. 348–364, 2011.; A. N. Pilagatti, G. Vecchi, E. Atzeni, L. Iuliano, and A. Salmi, “Generative Design and new designers’ role in the manufacturing industry,” in Procedia CIRP, vol. 112, pp. 364–369, Elsevier B.V., 2022.; C. Hyunjin, “A Study on Application of Generative Design System in Manufacturing Process,” in IOP Conference Series: Materials Science and Engineering, vol. 727, Institute of Physics Publishing, 1 2020.; J.Wu, M. Li, Z. Chen, W. Chen, X.Wu, and Y. Xi, “Generative Design of the Roller Seat of the Wind Turbine Blade Turnover Machine Based on Cloud Computing,” ICMAE 2020 - 2020 11th International Conference on Mechanical and Aerospace Engineering, pp. 212–217, 2020.; H. Li and R. Lachmayer, “Automated exploration of design solution space applying the generative design approach,” in Proceedings of the International Conference on Engineering Design, ICED, vol. 2019-August, pp. 1085–1094, Cambridge University Press, 2019.; S. Khan and M. J. Awan, “A generative design technique for exploring shape variations,” Advanced Engineering Informatics, vol. 38, no. October, pp. 712–724, 2018.; S. Khan, E. Gunpinar, and B. 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Scratchpad memories vs locked caches in hard real-time systems: a qualitative and quantitative comparison

Authors: Puaut, Isabelle Pais, Christophe Compilation, parallel architectures and system (CAPS) et al.

Contributors: Puaut, Isabelle Pais, Christophe Compilation, parallel architectures and system (CAPS) et al.

Source: https://inria.hal.science/inria-00105010 ; [Research Report] PI 1818, 2006, pp.22.

Subject Terms: Wcet, hard real-time system, compilation, software, hardware, memory, cache, ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS, ACM: D.: Software/D.4: OPERATING SYSTEMS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: Report N°: PI 1818

Availability: https://inria.hal.science/inria-00105010
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Process algebra semantics & reachability analysis for micro-architectural models of communication fabrics

Authors: Wouda, Sanne Joosten, Sebastiaan J.C. Schmaltz, Julien

Source: Wouda, S, Joosten, S J C & Schmaltz, J 2015, Process algebra semantics & reachability analysis for micro-architectural models of communication fabrics. in 2015 ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2015., 7340487, Institute of Electrical and Electronics Engineers, pp. 198-207, ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2015), Austin, United States, 21/09/15. https://doi.org/10.1109/MEMCOD.2015.7340487

Subject Terms: Algebra, Computational modeling, Fabrics, Ports (Computers), Reachability analysis, Semantics, System recovery

Relation: info:eu-repo/semantics/altIdentifier/isbn/9781509002375; urn:ISBN:9781509002375

Availability: https://research.tue.nl/en/publications/1cba3f2b-3cc8-4cef-8ffc-d38ee1d6a7d8
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A Type System for the Automatic Distribution of Higher-order Synchronous Dataflow Programs

Authors: Delaval, Gwenaël Girault, Alain Pouzet, Marc et al.

Contributors: Delaval, Gwenaël Girault, Alain Pouzet, Marc et al.

Source: LCTES - ACM International Conference on Languages, Compilers, and Tools for Embedded Systems ; https://inria.hal.science/hal-00750870 ; LCTES - ACM International Conference on Languages, Compilers, and Tools for Embedded Systems, Jun 2008, Tucson, United States. pp.101-110, ⟨10.1145/1375657.1375672⟩

Subject Terms: synchronous programming, distribution, type systems, functional programming, ACM: D.: Software/D.1: PROGRAMMING TECHNIQUES/D.1.3: Concurrent Programming/D.1.3.0: Distributed programming, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.2: Language Classifications/D.3.2.1: Concurrent, distributed, and parallel languages, [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL]

Subject Geographic: Tucson, United States

Relation: info:eu-repo/semantics/altIdentifier/arxiv/1211.2776; ARXIV: 1211.2776

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https://doi.org/10.1145/1375657.1375672

Implementing multidestination worms in switch-based parallel systems ; architectural alternatives and their impact

Authors: Stunkel, Craig B. Sivaram, Rajeev Panda, Dhabaleswar K.

Source: ACM SIGARCH Computer Architecture News ; volume 25, issue 2, page 50-61 ; ISSN 0163-5964

Availability: https://doi.org/10.1145/384286.264129
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Providing architectural support for expert systems

Authors: Graham, Peter C. J.

Source: ACM SIGARCH Computer Architecture News ; volume 12, issue 5, page 12-18 ; ISSN 0163-5964

Availability: https://doi.org/10.1145/859576.859578
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Design of Fault Tolerant Embedded Systems using Approximate Computing Techniques. ; Diseño de sistemas embebidos tolerantes a fallos usando técnicas de computación aproximada.

Authors: Aponte Moreno, John Alexander Restrepo Calle, Felipe Pedraza Bonilla, Cesar Augusto et al.

Contributors: Aponte Moreno, John Alexander Restrepo Calle, Felipe Pedraza Bonilla, Cesar Augusto et al.

Subject Terms: 000 - Ciencias de la computación, información y obras generales::003 - Sistemas, 620 - Ingeniería y operaciones afines::629 - Otras ramas de la ingeniería, Radiation, Radiación, Métodos orientados a objetos (computadores), Object-oriented methods (computer), Diagnosis computer assisted, Diagnóstico por computación, Fault Tolerance, Approximate Computing, Reliability, Soft Errors, Tolerancia a fallos, Computación aproximada, Confiabilidad

File Description: xviii, 135 páginas; application/pdf

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Enhancing the Architectural Characterization of Parallel Proto

Authors: Pease, Daniel J. SYRACUSE UNIV NY DEPT OF ELECTRICAL AND COMPUTER ENGINEERING

Contributors: Pease, Daniel J. SYRACUSE UNIV NY DEPT OF ELECTRICAL AND COMPUTER ENGINEERING

Source: DTIC AND NTIS

Subject Terms: Computer Programming and Software, Computer Systems, DATA BASES, SOFTWARE ENGINEERING, INTEGRATION, PARALLEL PROCESSING, REQUIREMENTS, ENVIRONMENTS, DISTRIBUTED DATA PROCESSING, PROTOTYPES, WINDOWS, BENEFITS, LIFE CYCLES, LABORATORIES, MACHINES, FEASIBILITY STUDIES, PHASE, PREDICTIONS, TOOLS, COMPUTERS, COMPARISON, COMPUTER ARCHITECTURE, PAWS(PARALLEL ASSESSMENT WINDOW SYSTEM), PPROTO(PARALLEL PROTO), PE63728F, WURL252703PA

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A strategy based on model-to-model transformations to evolve service-oriented architectures to microservices architectures ; Una estrategia basada en transformaciones modelo a modelo para evolucionar arquitecturas orientadas a servicios a arquitecturas de microservicios

Authors: Berrio Charry, Eduardo Fabio Vergara Vargas, Jeisson Andrés Umaña Acosta, Henry Roberto et al.

Contributors: Berrio Charry, Eduardo Fabio Vergara Vargas, Jeisson Andrés Umaña Acosta, Henry Roberto et al.

Subject Terms: 000 - Ciencias de la computación, información y obras generales, Software Architecture, Architectures Evolution, Service-Oriented Architectures, Microservices Architectures, Architectural Style, Architectural View, Architecture Description Language, Model-Driven Engineering, Arquitectura de Software, Evolución de Arquitecturas, Arquitecturas Orientadas a Servicios, Arquitecturas de Microservicios, Estilo Arquitectónico, Vista Arquitectónica, Lenguaje de Descripción de Arquitecturas, Ingeniería de Software Dirigida por Modelos, Procesamiento de datos, Data processing, Programación informática, Computer programming

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Demonstration and architectural analysis of complementary metal-oxide semiconductor/multiple-quantum-well smart-pixel array cellular logic processors for single-instruction multiple-data parallel-pipeline processing

Authors: Wu JM Kuznia CB Hoanca B et al.

Contributors: Wu JM Kuznia CB Hoanca B et al.

Subject Terms: MQW MODULATORS, COMPUTER VISION, SILICON CMOS, IMPLEMENTATION, SYSTEMS, ISSUES

Time: 45

Relation: Applied Optics, Optical Society of America, Volume 38, Issue 11,1999, Pages 2270-2281; http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/71858

Availability: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/71858