Search Results - acm: c.: computer system organisation/c.1: processor architektura
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Source: Bibliogr. przy poszczególnych referatach.
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Alternate Title: Stack matrix architecture for parallel processing using reverse Polish notation. (English)
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Source: Przegląd Elektrotechniczny; 2025, Issue 10, p82-89, 8p
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Authors: Feldman, Julian
Source: Communications of the ACM. 5(9)
Subject Terms: Information and Computing Sciences, Information Systems, Information and computing sciences
File Description: application/pdf
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Subject Terms: simulátor, emulátor, počítačový systém, procesor, instrukce, mikroinstrukce, mikroprocesor, architektura, simulator, emulator, computer system, processor, instruction, microinstruction, microprocessor, architecture
File Description: application/pdf; application/zip; text/html
Relation: FRIML, D. Výukový simulátor počítačového systému [online]. Brno: Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. 2018.; 111121; http://hdl.handle.net/11012/81995
Availability: http://hdl.handle.net/11012/81995
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Authors: et al.
Contributors: et al.
Source: Bibliogr. przy rozdz.
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Alternate Title: Information Architecture in Foreign Literature 1982–2018. Quantitative Analysis. (English)
Authors: Matysek, Anna
Source: Zagadnienia Informacji Naukowej; 2018, Vol. 112 Issue 2, p88-111, 24p
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Source: Bibliogr. przy ref. Indeks.
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Alternate Title: WYMAGANIA I ARCHITEKTURA SYSTEMU PŁATNOŚCI W INTERNECIE PRZYSZŁOŚCI. (Polish)
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Source: Business Informatics / Informatyka Ekonomiczna; 2012, Vol. 2 Issue 24, p91-103, 13p
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Subject Terms: procesor, čipová sada, inovace, architektura, otázky, technologie, Moodle, processor, chipset, innovation, architecture, questions, technology
File Description: 4772132 bytes; application/pdf
Relation: OSD002; http://hdl.handle.net/10084/88411; S2723; KAP098_FS_B2341_3902R001_2011
Availability: http://hdl.handle.net/10084/88411
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Subject Terms: klasifikace procesorů, architektura procesorů, jazyk pro popis architektur, ADL, procesor, mikrokontrolér, MCS51, zřetězené zpracování, hazard, modelování, simulace, Codasip, CodAL, processor classification, processor architecture, architecture description languages, processor, microcontroller, pipeline, modeling, simulation
Time: 8051
File Description: application/pdf; text/html
Relation: KRŮPA, T. Vytvoření modelu procesoru 8051 [online]. Brno: Vysoké učení technické v Brně. Fakulta informačních technologií. 2014.; 79794; http://hdl.handle.net/11012/56513
Availability: http://hdl.handle.net/11012/56513
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Authors: et al.
Source: DTIC AND NTIS
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Alternate Title: Energooszczędna architektura sieci dla rozwoju inteligentnych miast. (Polish)
Authors: et al.
Source: Przegląd Elektrotechniczny; 2023, Vol. 2023 Issue 9, p135-140, 6p
Subject Terms: URBAN growth, 6G networks, SMART cities, MIXED integer linear programming, PROCESS capability, SOFTWARE architecture, COMPUTER networking equipment
Reviews & Products: SUSTAINABLE Development Goals (United Nations)
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Authors: Watson, Bradley C.
Subjects: SGML (Document markup language), Electronic publishing., Text processing (Computer science), Word processing operations., Word processing., SGML (Langage de balisage), Édition électronique., Traitement de texte., electronic publishing., Word processing operations, Word processing, Electronic publishing, SGML (Document markup language), Text processing (Computer science)
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Source: Investor's Business Daily (Los Angeles, CA), August 25, 2004 NATIONAL, 19pp
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Authors: By:SALLY LOANE
Source: Sydney Morning Herald, The (Australia), May 8, 1993 Spectrum Late, p. 46 5pp
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Authors: By:KATHY LAUER-WILLIAMS, The Morning Call
Source: Morning Call, The (Allentown, PA), November 17, 1997 LOCAL/REGION FIRST, 3pp
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Subject Terms: Computer, Počítač, Procesor, Predikce skoků, Paměť cache, Architecture, Branch prediction, Pipelining, Architektura, Cache memory, Processor, Instruction, Instrukce
File Description: application/pdf; text/html
Access URL: http://hdl.handle.net/11012/187521
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Authors: et al.
Source: Museology & Cultural Heritage / Muzeologia a Kulturne Dedicstvo; 2025, Vol. 13 Issue 1, p113-137, 25p
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Source: Sensors (14248220); 1/15/2020, Vol. 20 Issue 2, p1-20, 20p
Subject Terms: MICROPROCESSORS, GLOBAL Positioning System, BASEBAND, MICROCONTROLLERS, GATE array circuits, FLASH memory
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Authors: By:CHELSEA CLARK
Source: Daily Telegraph (Sydney, Australia), May 20, 2002 Features 1 - State, p. 060 1pp
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