Search Results - acm: c.: computer system organisation/c.1: processor architectures~

A Framework for Task Scheduling and Memory Partitioning for Multi-Processor System-on-Chip

Authors: Salamy, Hassan Ramanujam, J. Department of Electrical and Computer Engineering - Louisiana State University (ECE) et al.

Contributors: Salamy, Hassan Ramanujam, J. Department of Electrical and Computer Engineering - Louisiana State University (ECE) et al.

Source: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00446288 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_20⟩

Subject Terms: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Subject Geographic: Paphos, Cyprus

Relation: inria-00446288; https://hal.inria.fr/inria-00446288

Availability: https://hal.inria.fr/inria-00446288
https://doi.org/10.1007/978-3-540-92990-1_20

TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA

Authors: Corre, Youenn Diguet, Jean-Philippe Heller, Dominique et al.

Contributors: Corre, Youenn Diguet, Jean-Philippe Heller, Dominique et al.

Source: ACM Transactions on Embedded Computing Systems. 15:1-27

Subject Terms: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, 13. Climate action, Electronic System Level, 0202 electrical engineering, electronic engineering, information engineering, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION, Multiprocessor, 02 engineering and technology, High-Level Synthesis, ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.2: Design Tools and Techniques, System-on-Chip

Access URL: https://hal.archives-ouvertes.fr/hal-01172103/document
https://dblp.uni-trier.de/db/journals/tecs/tecs15.html#CorreDHBL16
https://hal.archives-ouvertes.fr/hal-01172103
https://dl.acm.org/doi/10.1145/2816817
https://doi.org/10.1145/2816817

Real-time scheduling on heterogeneous system-on-chip architectures using an optimised artificial neural network

Authors: Chillet, Daniel Eiche, Antoine Pillement, Sébastien et al.

Contributors: Chillet, Daniel Eiche, Antoine Pillement, Sébastien et al.

Source: ISSN: 1383-7621 ; Journal of Systems Architecture ; https://inria.hal.science/hal-00650650 ; Journal of Systems Architecture, 2011, 57, pp.340-353. ⟨10.1016/j.sysarc.2011.01.004⟩.

Subject Terms: Artificial neural network, Heterogeneous multi-processor architecture, Hopfield model, Inhibitor neurons, Task scheduling, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.7: Neural nets

Availability: https://inria.hal.science/hal-00650650
https://doi.org/10.1016/j.sysarc.2011.01.004

MLP-Aware Runahead Threads in a Simultaneous Multithreading Processor

Authors: Van Craeynest, Kenzo Eyerman, Stijn Eeckhout, Lieven et al.

Contributors: Van Craeynest, Kenzo Eyerman, Stijn Eeckhout, Lieven et al.

Source: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00445500 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_10⟩

Subject Terms: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Subject Geographic: Paphos, Cyprus

Relation: inria-00445500; https://hal.inria.fr/inria-00445500

Availability: https://hal.inria.fr/inria-00445500
https://doi.org/10.1007/978-3-540-92990-1_10

ACM: An Efficient Approach for Managing Shared Caches in Chip Multiprocessors

Authors: Hammoud, Mohammad Cho, Sangyeun Melhem, Rami et al.

Contributors: Hammoud, Mohammad Cho, Sangyeun Melhem, Rami et al.

Source: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00446343 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_26⟩

Subject Terms: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, manag, lang

Subject Geographic: Paphos, Cyprus

Relation: https://hal.inria.fr/inria-00446343

Availability: https://hal.inria.fr/inria-00446343

Predictive Runtime Code Scheduling for Heterogeneous Architectures

Authors: Jiménez, Victor J. Vilanova, Llu'Is Gelado, Isaac et al.

Contributors: Jiménez, Victor J. Vilanova, Llu'Is Gelado, Isaac et al.

Source: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://inria.hal.science/inria-00445304 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_4⟩

Subject Terms: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Subject Geographic: Paphos, Cyprus

Availability: https://inria.hal.science/inria-00445304
https://doi.org/10.1007/978-3-540-92990-1_4

SSI-OSCAR: a Cluster Distribution for High Performance Computing Using a Single System Image

Authors: Vallée, Geoffroy Scott, Stephen, L. Morin, Christine et al.

Contributors: Vallée, Geoffroy Scott, Stephen, L. Morin, Christine et al.

Source: https://inria.hal.science/inria-00000469 ; [Research Report] PI 1704, 2005, pp.13.

Subject Terms: Cluster management, distributed system, operating system, single system image, OSCAR, Kerrighed \\ Administration de grappes, systèmes distribués, système d'exploitation, système à image unique, Kerrighed, ACM: D.: Software/D.4: OPERATING SYSTEMS, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-OS]Computer Science [cs]/Operating Systems [cs.OS]

Relation: Report N°: PI 1704

Availability: https://inria.hal.science/inria-00000469
https://inria.hal.science/inria-00000469/document
https://inria.hal.science/inria-00000469/file/PI-1704.pdf

Design and Implementation of the CloudMdsQL Multistore System

Authors: Kolev, Boyan Bondiombouy, Carlyna Levchenko, Oleksandra et al.

Contributors: Kolev, Boyan Bondiombouy, Carlyna Levchenko, Oleksandra et al.

Source: 6th International Conference on Cloud Computing and Services Science
CLOSER: Cloud Computing and Services Science
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01341172
CLOSER: Cloud Computing and Services Science, Apr 2016, Roma, Italy. pp.352-359, ⟨10.5220/0005923803520359⟩
http://closer.scitevents.org/DataDiversityConvergence.aspx?y=2016

Subject Terms: SQL and NoSQL Integration, Heterogeneous Data Stores, Multistore System, Cloud, ACM: H.: Information Systems/H.2: DATABASE MANAGEMENT/H.2.5: Heterogeneous Databases, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, [INFO.INFO-DB]Computer Science [cs]/Databases [cs.DB]

Subject Geographic: Roma, Italy

Relation: info:eu-repo/grantAgreement//611068/EU/A Coherent and Rich PaaS with a Common Programming Model/CoherentPaaS

Availability: https://hal-lirmm.ccsd.cnrs.fr/lirmm-01341172
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01341172v1/document
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01341172v1/file/closer2016.pdf
https://doi.org/10.5220/0005923803520359

Synchronous byzantine agreement with nearly a cubic number of communication bits

Authors: Kowalski, Dariusz R. Mostefaoui, Achour Department of Computer Science Liverpool et al.

Contributors: Kowalski, Dariusz R. Mostefaoui, Achour Department of Computer Science Liverpool et al.

Source: ACM symposium on Principles of distributed computing (PODC'13) ; https://hal.science/hal-01151136 ; ACM symposium on Principles of distributed computing (PODC'13), Jul 2013, New-York, United States. pp.84-91, ⟨10.1145/2484239.2484271⟩

Subject Terms: Agreement problem, Synchronous distributed system, Byzantine process, Message-passing model, Round-based protocol, EIG, Consensus, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.7: Organization and Design/D.4.7.1: Distributed systems, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.5: Reliability/D.4.5.2: Fault-tolerance, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.1: Process Management/D.4.1.0: Concurrency, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.1: Process Management/D.4.1.5: Synchronization, [INFO]Computer Science [cs], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS]

Subject Geographic: New-York, United States

Availability: https://hal.science/hal-01151136
https://hal.science/hal-01151136v1/document
https://hal.science/hal-01151136v1/file/podc%20final.pdf
https://doi.org/10.1145/2484239.2484271

Survey of Models and Architectures to Ensure Linked Data Access

Authors: Toure, Mahamadou Gandon, Fabien Guidedi, Kaladzavi et al.

Contributors: Toure, Mahamadou Gandon, Fabien Guidedi, Kaladzavi et al.

Source: https://inria.hal.science/hal-03956456 ; Inria & Université Côte d'Azur, CNRS, I3S. 2023, pp.23.

Subject Terms: Web of Data, Gossip protocol, graph replication, limited connectivity, semantic overlay, mobile contributor, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.4: Knowledge Representation Formalisms and Methods, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS]

Availability: https://inria.hal.science/hal-03956456
https://inria.hal.science/hal-03956456v1/document
https://inria.hal.science/hal-03956456v1/file/MahamadouToureSurvey.pdf

Smart Vision Chip for colon exploration ; Smart Vision Chip pour l’exploration du colon

Authors: Chuquimia, Orlando Systèmes Electroniques (SYEL) LIP6 et al.

Contributors: Chuquimia, Orlando Systèmes Electroniques (SYEL) LIP6 et al.

Source: https://tel.archives-ouvertes.fr/tel-02494557 ; Imagerie médicale. Sorbonne Université, 2019. Français.

Subject Terms: Automatic polyp detection, intelligent endoscopic capsule, Hough transform, fuzzy trees, fuzzy forest, artificial vision and hardware accelerator, vision artificielle et accélérateur matériel, Détection automatique des polypes, capsule endoscopique intelligente, transformée d’Hough, arbres flous, forets floues, ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.3: Design Aids, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: C.: Computer Systems Organization/C.5: COMPUTER SYSTEM IMPLEMENTATION, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.6: Learning, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.9: Robotics, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.10: Vision and Scene Understanding, ACM: I.: Computing Methodologies/I.4: IMAGE PROCESSING AND COMPUTER VISION/I.4.7: Feature Measurement/I.4.7.5: Texture, ACM: I.: Computing Methodologies/I.4: IMAGE PROCESSING AND COMPUTER VISION/I.4.0: General/I.4.0.1: Image processing software, [INFO.INFO-IM]Computer Science [cs]/Medical Imaging, [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO]

Relation: tel-02494557; https://tel.archives-ouvertes.fr/tel-02494557; https://tel.archives-ouvertes.fr/tel-02494557/document; https://tel.archives-ouvertes.fr/tel-02494557/file/thhese_archivage__N%C2%B0dossier.pdf

Availability: https://tel.archives-ouvertes.fr/tel-02494557
https://tel.archives-ouvertes.fr/tel-02494557/document
https://tel.archives-ouvertes.fr/tel-02494557/file/thhese_archivage__N%C2%B0dossier.pdf

Ghost Process: a Sound Basis to Implement Process Duplication, Migration and Checkpoint/Restart in Linux Clusters

Authors: Vallée, Geoffroy Lottiaux, Renaud Margery, David et al.

Contributors: Vallée, Geoffroy Lottiaux, Renaud Margery, David et al.

Source: https://inria.hal.science/inria-00000471 ; [Research Report] PI 1755, 2005, pp.16.

Subject Terms: Linux cluster, distributed system, operating system, single system image, process virtualization \\ Grappe de calculateurs Linux, système distribué, système à image unique, système d`exploitation, virtualisation de processus, ACM: D.: Software/D.4: OPERATING SYSTEMS, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-OS]Computer Science [cs]/Operating Systems [cs.OS]

Relation: Report N°: PI 1755

Availability: https://inria.hal.science/inria-00000471
https://inria.hal.science/inria-00000471/document
https://inria.hal.science/inria-00000471/file/PI-1755.pdf

Distributed Architecture for Resource Management in Large Scale Grids

Authors: Jeanvoine, Emmanuel Rilling, Louis Morin, Christine et al.

Contributors: Jeanvoine, Emmanuel Rilling, Louis Morin, Christine et al.

Source: https://inria.hal.science/inria-00001066 ; [Research Report] PI 1775, 2006, pp.13.

Subject Terms: Grid computing, distributed system, peer-to-peer overlay networks, resource allocation, self-healing \\ Grille de calcul, système distribué, réseaux logiques pair-à-pair, allocation de ressources, auto-réparation, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH]

Relation: Report N°: PI 1775

Availability: https://inria.hal.science/inria-00001066
https://inria.hal.science/inria-00001066v1/document
https://inria.hal.science/inria-00001066v1/file/PI-1775.pdf

Concurrency in Transactional Memory

Authors: Gramoli, Vincent The University of Sydney Data61 Canberra (CSIRO) et al.

Contributors: Gramoli, Vincent The University of Sydney Data61 Canberra (CSIRO) et al.

Source: https://hal.archives-ouvertes.fr/tel-01522826 ; Distributed, Parallel, and Cluster Computing [cs.DC]. UPMC - Sorbonne University, 2015.

Subject Terms: Software transactional memory, multicore, manycore, transaction polymorphism, elastic transactions, Mémoire transactionnelle, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.3: Language Constructs and Features, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, ACM: D.: Software/D.1: PROGRAMMING TECHNIQUES/D.1.3: Concurrent Programming, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC]

Relation: tel-01522826; https://hal.archives-ouvertes.fr/tel-01522826; https://hal.archives-ouvertes.fr/tel-01522826/document; https://hal.archives-ouvertes.fr/tel-01522826/file/hdr-v4.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/chronology%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/chronology.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/cmp.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/complexity%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/complexity.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/composition2%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/composition2.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/histories%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/histories.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/histories2%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/histories2.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/lf-vs-pstm-16384%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/lf-vs-pstm-16384.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/lf-vs-stm-16384%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/lf-vs-stm-16384.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/multiprocessor.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/skiplist_diagram%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/skiplist_diagram.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/tree1%20%281%29.pdf; https://hal.archives-ouvertes.fr/tel-01522826/file/tree1.pdf

Availability: https://hal.archives-ouvertes.fr/tel-01522826
https://hal.archives-ouvertes.fr/tel-01522826/document
https://hal.archives-ouvertes.fr/tel-01522826/file/hdr-v4.pdf
https://hal.archives-ouvertes.fr/tel-01522826/file/chronology%20%281%29.pdf
https://hal.archives-ouvertes.fr/tel-01522826/file/chronology.pdf
https://hal.archives-ouvertes.fr/tel-01522826/file/cmp.pdf
https://hal.archives-ouvertes.fr/tel-01522826/file/complexity%20%281%29.pdf
https://hal.archives-ouvertes.fr/tel-01522826/file/complexity.pdf
https://hal.archives-ouvertes.fr/tel-01522826/file/composition2%20%281%29.pdf
https://hal.archives-ouvertes.fr/tel-01522826/file/composition2.pdf

The Multiplicative Power of Consensus Numbers

Authors: Imbs, Damien Raynal, Michel As Scalable As Possible: foundations of large scale dynamic distributed systems (ASAP) et al.

Contributors: Imbs, Damien Raynal, Michel As Scalable As Possible: foundations of large scale dynamic distributed systems (ASAP) et al.

Source: https://inria.hal.science/inria-00454399 ; [Research Report] PI 1949, 2010, pp.17.

Subject Terms: Asynchronous processes, BG simulation, Consensus number, Distributed computability, Fault-Tolerance, Process crash failure, Reduction algorithm, t-Resilience, k-Set agreement, Shared memory system, Synchronization power, System model, Waitfreedom, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-OS]Computer Science [cs]/Operating Systems [cs.OS]

Relation: Report N°: PI 1949

Availability: https://inria.hal.science/inria-00454399
https://inria.hal.science/inria-00454399v2/document
https://inria.hal.science/inria-00454399v2/file/PI-1949.pdf

Multi-Objective Scheduling of Scientific Workflows in Multisite Clouds

Authors: Liu, Ji Pacitti, Esther Valduriez, Patrick et al.

Contributors: Liu, Ji Pacitti, Esther Valduriez, Patrick et al.

Source: ISSN: 0167-739X ; Future Generation Computer Systems ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-01342203 ; Future Generation Computer Systems, 2016, 63, pp.76-95. ⟨10.1016/j.future.2016.04.014⟩.

Subject Terms: multisite cloud, parallel execution, multi-objective scheduling, Scientific workflow, scientific workflow management system, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, [INFO.INFO-DB]Computer Science [cs]/Databases [cs.DB]

Relation: info:eu-repo/grantAgreement//689772/EU/HPC for Energy/HPC4E

Availability: https://hal-lirmm.ccsd.cnrs.fr/lirmm-01342203
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01342203v1/document
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01342203v1/file/FGCS-2016.pdf
https://doi.org/10.1016/j.future.2016.04.014

Predictive Thermal Management for Chip Multiprocessors Using Co-designed Virtual Machines

Authors: Khan, Omer Kundu, Sandip Department of Electrical and Computer Engineering - University of Massachusetts (ECE) et al.

Contributors: Khan, Omer Kundu, Sandip Department of Electrical and Computer Engineering - University of Massachusetts (ECE) et al.

Source: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00446303 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_22⟩

Subject Terms: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Subject Geographic: Paphos, Cyprus

Relation: inria-00446303; https://hal.inria.fr/inria-00446303

Availability: https://hal.inria.fr/inria-00446303
https://doi.org/10.1007/978-3-540-92990-1_22

Architectures of Flexible Symmetric Key Crypto Engines-A Survey: From Hardware Coprocessor to Multi-Crypto-Processor System on Chip.

Authors: BOSSUET, LILIAN GRAND, MICHAEL GASPAR, LUBOS et al.

Source: ACM Computing Surveys; Aug2013, Vol. 45 Issue 4, p41-41:32, 32p, 9 Diagrams, 3 Charts, 2 Graphs

Subject Terms: CRYPTOGRAPHY research, COMPUTER network security, COMPUTER architecture, FAULT-tolerant computing, FAULT tolerance (Engineering), RELIABILITY in engineering

Scientific Workflow Scheduling with Provenance Support in Multisite Cloud

Authors: Liu, Ji Pacitti, Esther Valduriez, Patrick et al.

Contributors: Liu, Ji Pacitti, Esther Valduriez, Patrick et al.

Source: 12th International Conference on Vector and Parallel Processing
VECPAR: Vector and Parallel Processing
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01342190
VECPAR: Vector and Parallel Processing, Faculty of Engineering of the University of Porto, Portugal, Jun 2016, Porto, Portugal. pp.206-219, ⟨10.1007/978-3-319-61982-8_19⟩
http://vecpar.fe.up.pt/2016/

Subject Terms: Scientific workflow, Scientific workflow management system, Parallel execution, Multisite cloud, Scheduling, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, [INFO.INFO-DB]Computer Science [cs]/Databases [cs.DB]

Subject Geographic: Porto, Portugal

Time: Porto, Portugal

Relation: info:eu-repo/grantAgreement//689772/EU/HPC for Energy/HPC4E

Availability: https://hal-lirmm.ccsd.cnrs.fr/lirmm-01342190
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01342190v1/document
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01342190v1/file/VECPAR.pdf
https://doi.org/10.1007/978-3-319-61982-8_19

MPSoC Design Using Application-Specific Architecturally Visible Communication

Authors: Kluter, Theo Brisk, Philip Charbon, Edoardo et al.

Contributors: Kluter, Theo Brisk, Philip Charbon, Edoardo et al.

Source: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00445970 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_15⟩

Subject Terms: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Subject Geographic: Paphos, Cyprus

Relation: inria-00445970; https://hal.inria.fr/inria-00445970

Availability: https://hal.inria.fr/inria-00445970
https://doi.org/10.1007/978-3-540-92990-1_15