Výsledky vyhledávání - acm: b.: hardware/b.7: integrated circuits/b.7.2: design ad
-
1
Autoři: a další
Přispěvatelé: a další
Zdroj: https://inria.hal.science/inria-00482035 ; [Research Report] RR-7281, INRIA. 2010, pp.19.
Témata: High-level synthesis, hardware accelerators, DDR-SDRAM, optimized communications, program transformation, reconfigurable architectures, FPGA, ACM: B.: Hardware/B.4: INPUT/OUTPUT AND DATA COMMUNICATIONS/B.4.1: Data Communications Devices/B.4.1.0: Processors, ACM: B.: Hardware/B.4: INPUT/OUTPUT AND DATA COMMUNICATIONS/B.4.2: Input/Output Devices/B.4.2.0: Channels and controllers, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.1: Types and Design Styles/B.7.1.1: Algorithms implemented in hardware, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.1: Types and Design Styles/B.7.1.3: Input/output circuits, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.0: Adaptable architectures, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL]
-
2
Autoři:
Zdroj: Proceedings of the IEEE; Aug2014, Vol. 102 Issue 8, p1283-1295, 13p
-
3
Autoři: a další
Zdroj: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; Apr2016, Vol. 35 Issue 4, p521-534, 14p
-
4
Autoři: a další
Zdroj: IETE Journal of Research; Mar/Apr2013, Vol. 59 Issue 2, p132-140, 9p
-
5
Autoři: a další
Přispěvatelé: a další
Zdroj: ISSN: 2199-2002 ; Leibniz Transactions on Embedded Systems ; https://hal.inria.fr/hal-02303635 ; Leibniz Transactions on Embedded Systems, European Design and Automation Association (EDAA) \ EMbedded Systems Special Interest Group (EMSIG) and Schloss Dagstuhl -- Leibniz-Zentrum für Informatik GmbH, Dagstuhl Publishing., 2018.
Témata: ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.3: Reliability and Testing/B.7.3.2: Redundant design, ACM: F.: Theory of Computation/F.3: LOGICS AND MEANINGS OF PROGRAMS/F.3.2: Semantics of Programming Languages/F.3.2.5: Program analysis, [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]
Relation: hal-02303635; https://hal.inria.fr/hal-02303635
Dostupnost: https://hal.inria.fr/hal-02303635
-
6
Autoři: a další
Přispěvatelé: a další
Zdroj: https://inria.hal.science/inria-00381644 ; [Research Report] RR-6919, INRIA. 2009, pp.19.
Témata: FIFO sizing, Buffer sizing, Throughput, Latency-Insensitive Design, Marked Graphs, ACM: F.: Theory of Computation/F.1: COMPUTATION BY ABSTRACT DEVICES/F.1.1: Models of Computation, ACM: B.: Hardware/B.6: LOGIC DESIGN, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS, [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]
-
7
Autoři:
Zdroj: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Apr2004, Vol. 12 Issue 4, p408-419, 12p, 2 Black and White Photographs, 8 Diagrams, 5 Charts
-
8
Autoři: a další
Zdroj: Computer (00189162); Jul2011, Vol. 44 Issue 7, p66-74, 0p
-
9
Autoři: a další
Zdroj: ACM Transactions on Embedded Computing Systems; May2013 Supplement 2, Vol. 12, p1-26, 26p
-
10
Autoři: Das, Sunil R.
Zdroj: IEEE Transactions on Instrumentation & Measurement; Jun2005, Vol. 54 Issue 3, p941-955, 15p
-
11
Autoři: a další
Zdroj: Electronics Letters (Wiley-Blackwell); Mar2022, Vol. 58 Issue 5, p197-199, 3p
-
12
Autoři: a další
Zdroj: Journal of Computer Science & Technology (10009000); Sep2014, Vol. 29 Issue 5, p918-928, 11p
-
13
Autoři:
Zdroj: Computer (00189162); Dec2015, Vol. 48 Issue 12, p72-79, 8p
-
14
Autoři: a další
Přispěvatelé: a další
Zdroj: ISSN: 1943-0663 ; IEEE Embedded Systems Letters ; https://hal.science/hal-01083270 ; IEEE Embedded Systems Letters, 2015, 7 (1), pp.DOI:10.1109/LES.2014.2384744.
Témata: Network On Chip, Security, Channel leakage, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.3: Interconnection architectures (e.g., common bus, multiport memory, crossbar switch), ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.1: Types and Design Styles/B.7.1.7: VLSI (very large scale integration), [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]
Dostupnost: https://hal.science/hal-01083270
-
15
Autoři: a další
Přispěvatelé: a další
Zdroj: https://hal.science/hal-02732902 ; 2020.
Témata: ACM: B.: Hardware/B.6: LOGIC DESIGN, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
-
16
Autoři:
Zdroj: ACM Transactions on Embedded Computing Systems; Feb2013 Supplement, p87:1-87:23, 23p
-
17
Autoři: a další
Zdroj: ACM Journal on Emerging Technologies in Computing Systems; Mar2022, Vol. 18 Issue 3, p1-25, 25p
-
18
Autoři: a další
Zdroj: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Dec2019, Vol. 27 Issue 12, p2872-2883, 12p
-
19
Autoři: a další
Přispěvatelé: a další
Zdroj: 2019 IEEE International Symposium on Circuits and Systems (ISCAS)
https://hal.sorbonne-universite.fr/hal-02145589
2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019, Sapporo, Japan. ⟨10.1109/ISCAS.2019.8702147⟩Témata: Multi-stage amplifiers, Feed-forward compensation, sigma-delta modulators, bandpass, continuous-time, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.1: Types and Design Styles/B.7.1.7: VLSI (very large scale integration), [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [SPI.TRON]Engineering Sciences [physics]/Electronics
-
20
Autoři: a další
Zdroj: Computer Graphics Forum; Mar2007, Vol. 26 Issue 1, p80-113, 34p, 5 Color Photographs, 7 Diagrams, 3 Graphs
Nájsť tento článok vo Web of Science
Full Text Finder