Search Results - acm: b.: hardware/b.6: logic design/b.6.3: design cad/b.6.3.0: automatización synthesis
-
1
Authors:
Contributors:
Subject Terms: logic CAD, logic design, microcontrollers, real-time systems, software tools, Chinook hardware/software co-synthesis system, design time constraints, computer-aided design tools, error-prone tasks, embedded controller design, interface hardware, interface software, system components integration, function migration, microprocessors, custom logic, design co-simulation
Time: 2
File Description: 819791 bytes; application/pdf
-
2
Authors: Palangpour, Parviz
Source: Graduate Theses and Dissertations
Subject Terms: Applied sciences, ASIC, Asynchronous logic, Low-power, Sleep convention logic, Digital Circuits, VLSI and Circuits, Embedded and Hardware Systems
File Description: application/pdf
Relation: https://scholarworks.uark.edu/etd/755; https://scholarworks.uark.edu/context/etd/article/1754/viewcontent/Palangpour_uark_0011A_10806.pdf
-
3
Authors:
Contributors:
Subject Terms: Categories and Subject Descriptors, B.6.3 [Logic Design, Design Aids—Automatic synthesis, B.7.2 [Inte- grated Circuits, Design Aids—Placement and routing, C.1.3 [Processor Architectures, Other Archi- tecture Styles—Adaptable architectures General Terms, Algorithms, Design Additional Key Words and Phrases, FPGA, CAD, architecture modeling ACM Reference Format
File Description: application/pdf
Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.636.4534; http://www.eecg.utoronto.ca/~vaughn/papers/trets2014_vtr.pdf
-
4
Authors: Yazdanshenas, Amir Ali
Source: Electronic Theses and Dissertations
File Description: application/pdf
Relation: https://scholar.uwindsor.ca/etd/7121; https://scholar.uwindsor.ca/context/etd/article/8123/viewcontent/MR42312.pdf
-
5
Authors: et al.
Contributors: et al.
Subject Terms: B.6[Logic Design] [B.6.1 Design Styles, B.6.3 Design Aids, Computer-aided design (CAD, Automatic synthesis, Optimization, Switching theory General Terms, Hardware, Theory of Computation Additional Key Words and Phrases, quantum computing, reversible logic synthesis, circuit optimization 42
File Description: application/pdf
-
6
Authors: et al.
Subject Terms: Computer Science - Cryptography and Security, Computer Science - Hardware Architecture, Computer Science - Logic in Computer Science, socio, phil
Relation: http://arxiv.org/abs/2207.05413
Availability: http://arxiv.org/abs/2207.05413
-
7
Authors: et al.
Contributors: et al.
Subject Terms: Categories and Subject Descriptors, B.6.3 [Hardware, Logic Design- Design Aids, J.6 [Computer Applications, Computer- aided Engineering (CAD). General Terms, Algorithms, Design, Experimentation. Keywords, Binding, Temperature, Switching, Leakage
File Description: application/pdf
-
8
Authors: et al.
Subject Terms: Soporte físico-hardware, Sistemas CAD-CAM, Controladores difusos, Simulación, Lenguajes algorítmicos, Circuito integrado gran escala, Sistemas de tiempo real
Relation: http://hdl.handle.net/10261/2239
Availability: http://hdl.handle.net/10261/2239
-
9
Authors:
Subject Terms: Circuit CAD, data handling, discrete cosine transforms high level synthesis, logic arrays, system-on-chip, systolic arrays, video signal processing, 2D DCT algorithm, component designs, compositional technique, computation phases, data flow alignment, hardware component design, high-level design method, high-throughput embedded systems, multi-phase regular array synthesis, reflection transformations, regular array synthesis techniques, rotation transformations, separately evolved component designs, similarity transformations, systolic array synthesis techniques, translation transformations, unified global design, video communications applications
Relation: https://doi.org/10.1109/ASAP.2002.1030700; Manjunathaiah, M. and Megson, G.M. 2002. Compositional technique for synthesising multi-phase regular arrays. in: IEEE international conference on application-specific systems, architectures and processors: proceedings IEEE . pp. 7-16
-
10
Authors:
Contributors:
Subject Terms: High-Level Synthesis, Rule-based IKBS, Hardware Compiler, Logic Programming, VHDL, VLSI, E-CAD
File Description: application/pdf
-
11
Contributors: The Pennsylvania State University CiteSeerX Archives
File Description: application/postscript
Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.79.7304; http://www.ece.umd.edu/~ankurs/PAPERS/date01.ps
-
12
Authors: et al.
Source: Jelodari Mamaghani, M, Garside, J D, Toms, W B & Edwards, D 2014, Optimised Synthesis of Asynchronous Elastic Dataflows by Leveraging Clocked EDA. in Digital System Design (DSD), 2014 17th Euromicro Conference on. IEE, USA, pp. 604-617, Euromicro Conference on Digital System Design (DSD), Verona, Italy, 27/08/14. https://doi.org/10.1109/DSD.2014.98
Subject Terms: data flow analysis, electronic design automation, EDA tools, asynchronous dataflow network, asynchronous dataflow realisation, asynchronous elastic dataflows, behavioural analysis, clock cycles, data flow, electronic design automation tools, hardware, leveraging clocked EDA, optimised synthesis, synchronous circuit, synchronous elastic implementation, Clocks, Concurrent computing, Elasticity, Protocols, Synchronization, System-on-chip, Asynchronous Dataflow, CAD tools, Synchronous Elastic Systems, Teak Dataflow Networks
File Description: application/pdf
-
13
Authors:
Source: The International Journal of Advanced Manufacturing Technology, vol 49, iss 5
Subject Terms: Engineering, Computer-Aided Engineering (CAD, CAE) and Design, Mechanical Engineering, Production/Logistics, Industrial and Production Engineering, Programmable logic controller, Ladder diagram, Very high-speed circuit design hard description language, Field programmable gate array, Condensed simultaneity graph, Finite state machine
File Description: application/pdf
Relation: qt2v64b6tc; https://escholarship.org/uc/item/2v64b6tc; https://escholarship.org/content/qt2v64b6tc/qt2v64b6tc.pdf
-
14
Authors: et al.
Contributors: et al.
Source: the RISC-V Week ; https://hal.sorbonne-universite.fr/hal-02316711 ; the RISC-V Week, Oct 2019, Paris, France
Subject Terms: ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION/B.5.2: Design Aids, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.2: Design Aids, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.1: Types and Design Styles/B.7.1.5: Microprocessors and microcomputers, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.2: Design Aids/B.7.2.2: Placement and routing, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [SPI.TRON]Engineering Sciences [physics]/Electronics, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Availability: https://hal.sorbonne-universite.fr/hal-02316711
-
15
Authors:
Contributors:
Source: DTIC AND NTIS
Subject Terms: Electrical and Electronic Equipment, Computer Programming and Software, Computer Hardware, Solid State Physics, COMPUTER AIDED DESIGN, GALLIUM ARSENIDES, CHIPS(ELECTRONICS), INTEGRATED CIRCUITS, CIRCUIT INTERCONNECTIONS, PACKAGING, LOGIC CIRCUITS, COMPUTER PROGRAMS, ENVIRONMENTS, SPECIFICATIONS, EXPERIMENTAL DESIGN, HIGH VELOCITY, PROTOTYPES, CHARGE CARRIERS, TRANSMISSION LINES, PROCESSING EQUIPMENT, CERAMIC MATERIALS, DIGITAL COMPUTERS, WIRE WINDING MACHINES, Computer aided manufacturing, ECL(Emitter Coupled Logic), Leadless carriers, Wire wrap technology, Dual inline packages, Subnanosecond logic, Ceramic carriers
Availability: http://www.dtic.mil/docs/citations/ADA126156
-
16
Authors:
Source: ACM Transactions on Design Automation of Electronic Systems ; volume 29, issue 5, page 1-23 ; ISSN 1084-4309 1557-7309
Availability: https://doi.org/10.1145/3663477
https://dl.acm.org/doi/10.1145/3663477
https://dl.acm.org/doi/pdf/10.1145/3663477 -
17
Authors:
Contributors:
Source: DTIC AND NTIS
Subject Terms: Electrical and Electronic Equipment, Computer Programming and Software, INTEGRATED CIRCUITS, COMPUTERIZED SIMULATION, COMPUTER AIDED DESIGN, COMPUTER ARCHITECTURE, SYNTHESIS, STRUCTURAL PROPERTIES, COMPUTER PROGRAMMING, ARRAYS, CHIPS(ELECTRONICS), TEST EQUIPMENT, TIME, LANGUAGE, BEHAVIOR, SYNCHRONISM, SPECIFICATIONS, LOW COSTS, ASYNCHRONOUS SYSTEMS, LOGIC, OPTIMIZATION, VLSI(VERY LARGE SCALE INTEGRATION)
File Description: text/html
-
18
Authors:
Contributors:
Subject Terms: Categories and Subject Descriptors, D.2.5 [Software Engineering, Testing and Debugging— Testing tools, B.6.0 [Logic Design, General General Terms, Algorithms, Design, Experimentation, Measurement, Reliability, Verification Additional Key Words and Phrases, Automated development tools, design automation, graph algorithms, hardware-supporting software, place and route, testing ACM Reference Format
File Description: application/pdf
-
19
Authors:
Contributors:
Subject Terms: Key Words, Fuzzy Logic Hardware, VLSI/WSI, VHDL, Product CAD, Standardization, Corporate Computing
File Description: application/postscript
-
20
Authors:
Contributors:
Source: DTIC
Subject Terms: Electrical and Electronic Equipment, Electrooptical and Optoelectronic Devices, Computer Hardware, VERY LARGE SCALE INTEGRATION, ELECTROOPTICS, COMPLEMENTARY METAL OXIDE SEMICONDUCTORS, THESES, INTEGRATED CIRCUITS, LIGHT PULSES, SILICON, EMPLACEMENT, PACKAGING, LOGIC CIRCUITS, ROUTING, OPTICAL CIRCUITS, TRANSISTORS, MULTICHIP MODULES, SYNTHESIS, OPTICAL INTERCONNECTIONS, AUTOMATION, COMPUTER AIDED DESIGN, FSOI(FREE SPACE OPTICAL INTERCONNECTS), CHIP-TO-CHIP COMMUNICATIONS, HDL(HARDWARE DESCRIPTION LANGUAGES), APR(AUTOMATED PLACEMENT AND ROUTING), CIRCUIT ARCHITECTURE, CIRCUIT DESIGN, LASER PULSES, PARTITIONING, SOURCE CODE
File Description: text/html
Nájsť tento článok vo Web of Science