Search Results - acm: b.: hardware/b.6: logic design/b.6.3: design art/b.6.3.0: automation synthesis

SMatch: Structural Matching for Fast Resynthesis in FPGAs.

Authors: Trapani Possignolo, Rafael Renau, Jose

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2019, Issue 56, p1027-1032, 6p

Subject Terms: FIELD programmable gate arrays, ELECTRONIC design automation, LOGIC circuit synthesis (Electronic design), AGILE software development, SOFTWARE engineering

Automated Synthesis of Digital Hardware.

Authors: Hafer Parker

Source: IEEE Transactions on Computers; 1982, Vol. C-31 Issue 2, p93-109, 17p

Evaluating Large Language Models for Automatic Register Transfer Logic Generation for Combinational Circuits via High-Level Synthesis.

Authors: Swaroopa, Sneha Mukherjee, Rijoy Debnath, Anushka et al.

Source: Foundations & Trends in Electronic Design Automation; 2024, Vol. 14 Issue 4, p315-337, 23p

Subject Terms: LANGUAGE models, COMBINATIONAL circuits, INTEGRATED circuit verification, C++, GRAPES

Are We There Yet? A Study on the State of High-Level Synthesis.

Authors: Lahti, Sakari Sjovall, Panu Vanne, Jarno et al.

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; May2019, Vol. 38 Issue 5, p898-911, 14p

Subject Terms: FIELD programmable gate arrays, COMPUTER hardware description languages, ELECTRONIC design automation, VERY large scale circuit integration, COMPUTER input-output equipment design & construction

SlackHammer: Logic Synthesis for Graceful Errors Under Frequency Scaling.

Authors: Alan, Tanfer Henkel, Jorg

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; Nov2018, Vol. 37 Issue 11, p2802-2811, 10p

Subject Terms: LOGIC circuit synthesis (Electronic design), CRITICAL path analysis, ERROR rates, APPROXIMATION theory, CROSS layer optimization, ELECTRONIC design automation, REAL-time computing

Don't-Care-Based Node Minimization for Threshold Logic Networks.

Authors: Yung-Chih Chen Hao-Ju Chang Li-Cheng Zheng

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2020, Issue 57, p1100-1105, 6p

Subject Terms: THRESHOLD logic, LINEAR programming, AUTOMATION, DEEP learning, MATHEMATICAL optimization

Challenges and Opportunities of Security-Aware EDA.

Authors: FELDTKELLER, JAKOB SASDRICH, PASCAL GÜNEYSU, TIM

Source: ACM Transactions on Embedded Computing Systems; May2023, Vol. 22 Issue 3, p1-34, 34p

Subject Terms: ELECTRONIC design automation, COMMUNITIES, RESEARCH questions, COMPUTER-aided design

Lockit: A Logic Locking Automation Software.

Authors: Kajtez, Nemanja Zhang, Yue Halak, Basel

Source: Electronics (2079-9292); Nov2021, Vol. 10 Issue 22, p2817, 1p

Subject Terms: INTEGRATED circuits manufacturing, PYTHON programming language, DIGITAL technology, INTEGRATED circuit design, LOGIC, AUTOMATION software, ALGORITHMS

Hardware Trojan Detection Using Machine Learning: A Tutorial.

Authors: GUBBI, KEVIN IMMANUEL LATIBARI, BANAFSHEH SABER SRIKANTH, ANIRUDH et al.

Source: ACM Transactions on Embedded Computing Systems; May2023, Vol. 22 Issue 3, p1-26, 26p

Subject Terms: MACHINE learning, ELECTRONIC design automation, WIRELESS power transmission, INTEGRATED circuit design, TRANSIENT analysis

Bandwidth Optimization Through On-Chip Memory Restructuring for HLS.

Authors: Jason Cong Peng Wei Cody Hao Yu et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2017, Issue 54, p493-498, 6p

Subject Terms: COMPUTER hardware description languages, COMPUTER engineering -- Computer-aided design, HIGH level synthesis (Electronic design), ELECTRONIC design automation, DATA transmission systems

Development of an All-SFQ Superconducting Field-Programmable Gate Array.

Authors: Maree, Calvin Christopher Fourie, Coenrad Johann

Source: IEEE Transactions on Applied Superconductivity; Jun2019, Vol. 29 Issue 4, p1-12, 12p

Subject Terms: GATE array circuits, VERILOG (Computer hardware description language), ELECTRONIC design automation, FIELD programmable gate arrays, ELECTRIC lines

Company/Entity: MASSACHUSETTS Institute of Technology

Improving Power of DSP and CNN Hardware Accelerators Using Approximate Floating-point Multipliers.

Authors: LEON, VASILEIOS PAPAROUNI, THEODORA PETRONGONAS, EVANGELOS et al.

Source: ACM Transactions on Embedded Computing Systems; Sep2021, Vol. 20 Issue 5, p1-21, 21p

Subject Terms: CONVOLUTIONAL neural networks, IMAGE processing, HARDWARE, PARETO analysis, MULTIPLICATION, LOGIC, QUALITY of service, MULTIPLIERS (Mathematical analysis)

Designing an Asynchronous Microcontroller Using Pipefitter.

Authors: Blunno, Ivan Lavagno, Luciano

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Jul2004, Vol. 12 Issue 7, p696-700, 5p, 3 Charts

Subject Terms: ASYNCHRONOUS circuits, COMPUTER hardware description languages, DIGITAL electronics, VERILOG (Computer hardware description language), INTEGRATED circuits, ELECTRONIC circuits

MixLock: Securing Mixed-Signal Circuits via Logic Locking

Authors: Leonhard, Julian Yasin, Muhammad Turk, Shadi et al.

Contributors: Leonhard, Julian Yasin, Muhammad Turk, Shadi et al.

Source: Design, Automation and Test in Europe (DATE 2019) ; https://hal.sorbonne-universite.fr/hal-02094516 ; Design, Automation and Test in Europe (DATE 2019), Mar 2019, Florence, Italy. pp.84-89

Subject Terms: ACM: B.: Hardware, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [SPI.TRON]Engineering Sciences [physics]/Electronics, [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR]

Subject Geographic: Florence, Italy

Time: Florence, Italy

Availability: https://hal.sorbonne-universite.fr/hal-02094516
https://hal.sorbonne-universite.fr/hal-02094516v1/document
https://hal.sorbonne-universite.fr/hal-02094516v1/file/212_OutputPaper.pdf

Learning automata based energy-efficient AI hardware design for IoT applications.

Authors: Wheeldon, Adrian Shafik, Rishad Rahman, Tousif et al.

Source: Philosophical Transactions of the Royal Society A: Mathematical, Physical & Engineering Sciences; 10/16/2020, Vol. 378 Issue 2182, p1-18, 18p

Subject Terms: ARTIFICIAL intelligence, MACHINE learning, INTEGRATED circuits, ENERGY consumption, INTERNET of things, AUTOMATION software

A survey on design and synthesis techniques for photonic integrated circuits.

Authors: Sharma, Sumit Roy, Sudip

Source: Journal of Supercomputing; May2021, Vol. 77 Issue 5, p4332-4374, 43p

Subject Terms: INTEGRATED circuits, DESIGN techniques, LOGIC circuit design, ELECTRONIC design automation, ELECTRONIC circuits

FPGA Design Automation: A Survey.

Authors: Chen, Deming Cong, Jason Pan, Peichen

Source: Foundations & Trends in Electronic Design Automation; 2006, Vol. 1 Issue 3, p195-330, 137p

Subject Terms: COMPUTER-aided design, COMPUTER-aided engineering, ARCHITECTURE & technology, FIELD programmable gate arrays, PROGRAMMABLE logic devices, AUTOMATION, AUTOMATIC identification, CONTROL theory (Engineering)

PROCEEDINGS OF THE 2019 56TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC).

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2019, Issue 56, p1320-1354, 35p

Subject Terms: ELECTRONIC design automation, EMBEDDED computer systems, SYSTEMS on a chip, COMPUTING platforms, LOGIC circuits

Las Vegas to Host 23rd ACM/IEEE Design Automation Conference.

Source: IEEE Design & Test of Computers; 1986, Vol. 3 Issue 3, p6-13, 8p

An Introduction to High-Level Synthesis.

Authors: Coussy, Philippe Meredith, Michael Gajski, Daniel D. et al.

Source: IEEE Design & Test of Computers; Jul/Aug2009, Vol. 26 Issue 4, p8-17, 10p

Subject Terms: SPECTRAL synthesis (Mathematics), ELECTRONICS, SOFTWARE productivity, ELECTRONICS engineers, PROGRAMMING languages, VERIFICATION of computer systems, AUTOMATION