Suchergebnisse - acm: b.: hardware/b.6: logic design/b.6.3: design art/b.6.3.0: automatic synthesis
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1
Autoren: et al.
Weitere Verfasser: et al.
Quelle: https://inria.hal.science/tel-02151877 ; Hardware Architecture [cs.AR]. ENS de Lyon, 2019.
Schlagwörter: High-Level Synthesis, Compilation Techniques, Automatic Parallelization, Compilation, Parallélisation automatique, Synthèse haut-niveau, FPGA, ACM: B.: Hardware, ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.3: Design Aids/B.6.3.0: Automatic synthesis, ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.3: Design Aids/B.6.3.2: Optimization, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.1: Compilers, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL]
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2
Autoren: et al.
Weitere Verfasser: et al.
Quelle: https://inria.hal.science/inria-00311300 ; [Research Report] RR-6615, INRIA. 2008, pp.46.
Schlagwörter: ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.3: Design Aids/B.6.3.0: Automatic synthesis, ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.1: Design Styles/B.6.1.5: Parallel circuits, ACM: B.: Hardware/B.8: PERFORMANCE AND RELIABILITY/B.8.2: Performance Analysis and Design Aids, ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.5: Model Development/I.6.5.0: Modeling methodologies, ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS/C.3.2: Real-time and embedded systems, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]
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Autoren: et al.
Quelle: Foundations & Trends in Electronic Design Automation; 2024, Vol. 14 Issue 4, p315-337, 23p
Schlagwörter: LANGUAGE models, COMBINATIONAL circuits, INTEGRATED circuit verification, C++, GRAPES
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Autoren: et al.
Weitere Verfasser: et al.
Quelle: 2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)
https://inria.hal.science/hal-01253111
2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), Jun 2015, Montreal, Canada. ⟨10.1109/AHS.2015.7231164⟩Schlagwörter: digital circuits, fault tolerance, time redundancy, circuit transformation, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION/B.5.3: Reliability and Testing/B.5.3.2: Redundant design, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION/B.5.2: Design Aids/B.5.2.0: Automatic synthesis, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-PF]Computer Science [cs]/Performance [cs.PF]
Geographisches Schlagwort: Montreal
Time: Montreal, Canada
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Autoren: et al.
Weitere Verfasser: et al.
Quelle: https://inria.hal.science/inria-00606977 ; [Research Report] RR-7674, INRIA. 2011, pp.33.
Schlagwörter: High-Level Synthesis, Compiler, ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES/B.2.4: High-Speed Arithmetic, ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.3: Design Aids, ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS/C.3.3: Signal processing systems, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL], [INFO.INFO-IA]Computer Science [cs]/Computer Aided Engineering, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems
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The Ubimus Plugging Framework: Deploying FPGA-Based Prototypes for Ubiquitous Music Hardware Design.
Autoren:
Quelle: Computers (2073-431X); Apr2025, Vol. 14 Issue 4, p155, 24p
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Autoren:
Quelle: IEEE Transactions on Computers; 1982, Vol. C-31 Issue 2, p93-109, 17p
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Autoren:
Quelle: Journal on Satisfiability, Boolean Modeling & Computation; 2009, Vol. 5, p57-82, 26p, 15 Diagrams, 5 Charts
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Autoren: et al.
Quelle: ACM Transactions on Embedded Computing Systems; 2017 Special Issue, Vol. 16 Issue 5s, p1-22, 22p
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Autoren:
Quelle: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Aug2021, Vol. 29 Issue 8, p1529-1542, 14p
Schlagwörter: LOGIC, SEMICONDUCTOR industry, INTELLECTUAL property, SCIENTIFIC community, IP networks
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11
Autoren: et al.
Weitere Verfasser: et al.
Quelle: 23rd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA'15
https://inria.hal.science/hal-01095747
23rd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA'15, Feb 2015, Monterey, United States. ⟨10.1145/2684746.2689058⟩Schlagwörter: ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION/B.5.3: Reliability and Testing, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION/B.5.2: Design Aids/B.5.2.0: Automatic synthesis, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION/B.5.2: Design Aids/B.5.2.4: Verification, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-PF]Computer Science [cs]/Performance [cs.PF]
Geographisches Schlagwort: Monterey, United States
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12
Autoren: et al.
Weitere Verfasser: et al.
Quelle: https://tel.archives-ouvertes.fr/tel-02494557 ; Imagerie médicale. Sorbonne Université, 2019. Français.
Schlagwörter: Automatic polyp detection, intelligent endoscopic capsule, Hough transform, fuzzy trees, fuzzy forest, artificial vision and hardware accelerator, vision artificielle et accélérateur matériel, Détection automatique des polypes, capsule endoscopique intelligente, transformée d’Hough, arbres flous, forets floues, ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.3: Design Aids, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: C.: Computer Systems Organization/C.5: COMPUTER SYSTEM IMPLEMENTATION, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.6: Learning, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.9: Robotics, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.10: Vision and Scene Understanding, ACM: I.: Computing Methodologies/I.4: IMAGE PROCESSING AND COMPUTER VISION/I.4.7: Feature Measurement/I.4.7.5: Texture, ACM: I.: Computing Methodologies/I.4: IMAGE PROCESSING AND COMPUTER VISION/I.4.0: General/I.4.0.1: Image processing software, [INFO.INFO-IM]Computer Science [cs]/Medical Imaging, [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO]
Relation: tel-02494557; https://tel.archives-ouvertes.fr/tel-02494557; https://tel.archives-ouvertes.fr/tel-02494557/document; https://tel.archives-ouvertes.fr/tel-02494557/file/thhese_archivage__N%C2%B0dossier.pdf
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Autoren:
Quelle: IEEE Embedded Systems Letters; Sep2024, Vol. 16 Issue 3, p279-282, 4p
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14
Autoren:
Quelle: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Nov2019, Vol. 27 Issue 11, p2655-2667, 13p
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15
Autoren: et al.
Quelle: ACM Computing Surveys; 2022 Suppl 11, Vol. 54, p1-33, 33p
Schlagwörter: INTEGRATED circuit verification, DEBUGGING, ELECTRONIC systems
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Autoren: et al.
Quelle: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; Feb2004, Vol. 23 Issue 2, p216-228, 13p
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17
Autoren:
Quelle: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Feb2009, Vol. 17 Issue 2, p248-261, 14p, 3 Black and White Photographs, 6 Charts
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18
Autoren:
Quelle: Annals of the University Dunarea de Jos of Galati Fascicle III: Electrotechnics, Electronics, Automatic Control & Informatics; 2021, Vol. 44 Issue 1, p23-28, 6p
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Autoren: et al.
Quelle: DAC: Annual ACM/IEEE Design Automation Conference; Jun2011, p633-638, 6p, 2 Diagrams, 4 Charts, 5 Graphs
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Autoren:
Quelle: DAC: Annual ACM/IEEE Design Automation Conference; Jun2016, p815-820, 6p
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