Search Results - acm: b.: hardware/b.6: logic design/b.6.1: design style/b.6.1.5: parallel circuits~
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1
Authors: et al.
Contributors: et al.
Source: https://inria.hal.science/tel-02151877 ; Hardware Architecture [cs.AR]. ENS de Lyon, 2019.
Subject Terms: High-Level Synthesis, Compilation Techniques, Automatic Parallelization, Compilation, Parallélisation automatique, Synthèse haut-niveau, FPGA, ACM: B.: Hardware, ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.3: Design Aids/B.6.3.0: Automatic synthesis, ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.3: Design Aids/B.6.3.2: Optimization, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.1: Compilers, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL]
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2
Authors: et al.
Source: Circuits, Systems & Signal Processing; Jun2020, Vol. 39 Issue 6, p2822-2840, 19p
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3
The Ubimus Plugging Framework: Deploying FPGA-Based Prototypes for Ubiquitous Music Hardware Design.
Authors:
Source: Computers (2073-431X); Apr2025, Vol. 14 Issue 4, p155, 24p
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4
Authors: et al.
Source: Electronics (2079-9292); Feb2023, Vol. 12 Issue 4, p902, 14p
Subject Terms: MAGNETIC tunnelling, COMPLEMENTARY metal oxide semiconductors, LOGIC circuits, MAGNETIC devices, HARDWARE
Company/Entity: TAIWAN Semiconductor Manufacturing Co. Ltd.
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5
Authors: et al.
Contributors: et al.
Source: https://inria.hal.science/inria-00311300 ; [Research Report] RR-6615, INRIA. 2008, pp.46.
Subject Terms: ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.3: Design Aids/B.6.3.0: Automatic synthesis, ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.1: Design Styles/B.6.1.5: Parallel circuits, ACM: B.: Hardware/B.8: PERFORMANCE AND RELIABILITY/B.8.2: Performance Analysis and Design Aids, ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.5: Model Development/I.6.5.0: Modeling methodologies, ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS/C.3.2: Real-time and embedded systems, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]
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6
Authors:
Source: Journal of Low Power Electronics & Applications; Dec2024, Vol. 14 Issue 4, p57, 25p
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7
Authors: et al.
Source: Electronics (2079-9292); Jan2024, Vol. 13 Issue 1, p59, 20p
Subject Terms: DIAGNOSIS, MACHINE learning, PARALLEL algorithms, INTEGRATED circuits, HARDWARE
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8
Authors:
Source: Applied Sciences (2076-3417); Oct2024, Vol. 14 Issue 20, p9385, 24p
Subject Terms: LOGIC circuits, LOGIC, ACHIEVEMENT
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9
Authors: Damaj, Issam
Source: International Journal of Parallel Programming; Dec2007, Vol. 35 Issue 6, p529-572, 44p, 16 Diagrams, 4 Charts
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10
Authors: et al.
Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; Oct2017, Vol. 36 Issue 10, p1647-1659, 13p
Subject Terms: LOGIC circuits, REVERSE engineering, COMBINATIONAL circuits, ALGORITHMS, INTEGRATED circuit design
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11
Authors: Adam, George K.
Source: Computers (2073-431X); May2022, Vol. 11 Issue 5, p76-N.PAG, 13p
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12
Generating Direct Logic Circuit Implementations of Deeply Quantized Neural Networks Using Chisel4ml.
Authors:
Source: Electronics (2079-9292); Mar2025, Vol. 14 Issue 5, p849, 21p
Subject Terms: POLYNOMIAL time algorithms, MACHINE learning, LOGIC circuits, TIME management
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13
Authors: et al.
Source: Journal of Low Power Electronics & Applications; Mar2024, Vol. 14 Issue 1, p5, 24p
Subject Terms: ASYNCHRONOUS circuits, LOGIC circuits, SOFT errors, CIRCUIT complexity, ELECTROMAGNETIC interference
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14
Authors: et al.
Contributors: et al.
Source: https://hal.science/hal-01432133 ; [Research Report] Université de Lille 1, Sciences et Technologies; CRIStAL UMR 9189. 2017.
Subject Terms: simulation, neuromorphic architecture, SNN, SPiking neural networks, ACM: B.: Hardware/B.6: LOGIC DESIGN/B.6.3: Design Aids/B.6.3.3: Simulation, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.7: Neural nets, [INFO.INFO-NE]Computer Science [cs]/Neural and Evolutionary Computing [cs.NE], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ET]Computer Science [cs]/Emerging Technologies [cs.ET], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC]
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15
Authors:
Source: Computation; Dec2023, Vol. 11 Issue 12, p237, 15p
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16
Authors:
Source: IEEE Transactions on Evolutionary Computation; Aug2007, Vol. 11 Issue 4, p503-520, 18p
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17
Authors:
Source: Information; Oct2022, Vol. 13 Issue 10, p451-N.PAG, 15p
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18
Authors:
Source: Sensors (14248220); Dec2021, Vol. 21 Issue 23, p8126, 1p
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19
Authors: et al.
Source: Information; Dec2023, Vol. 14 Issue 12, p656, 15p
Subject Terms: REVERSE engineering, LOGIC circuits, ELECTRONIC design automation, INTEGRATED circuits, MACHINE learning, INTELLECTUAL property
Geographic Terms: CONGO (Democratic Republic)
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20
Authors:
Source: Journal of Embedded Computing; 2006, Vol. 2 Issue 2, p191-205, 15p, 1 Black and White Photograph, 8 Diagrams, 2 Charts, 4 Graphs
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