Výsledky vyhľadávania - acm: b.: hardware/b.3: memory structures/b.3.2: design style/b.3.2.1: cache memories

Hardware-Based Implementation of Algorithms for Data Replacement in Cache Memory of Processor Cores.

Autori: Titarenko, Larysa Kharchenko, Vyacheslav Puidenko, Vadym a ďalší

Zdroj: Computers (2073-431X); Jul2024, Vol. 13 Issue 7, p166, 22p

Predmety: COMPUTER systems, ALGORITHMS, POSSIBILITY, HARDWARE, CACHE memory

Optimised memory allocation for less false abortion and better performance in hardware transactional memory.

Autori: Li, Xiuhong Gulila, Altenbek

Zdroj: International Journal of Parallel, Emergent & Distributed Systems; Aug2020, Vol. 35 Issue 4, p483-491, 9p

Predmety: ABORTION, MEMORY, PERFORMANCES, COMPUTER memory management, TRANSACTION systems (Computer systems), HARDWARE

Cache-Oblivious Databases: Limitations and Opportunities.

Autori: Bingsheng He Qiong Luo

Zdroj: ACM Transactions on Database Systems; Jun2008, Vol. 33 Issue 2, p1-42, 42p, 1 Black and White Photograph, 5 Diagrams, 11 Charts, 10 Graphs

Predmety: DATABASES, CACHE memory, MEMORY hierarchy (Computer science), ALGORITHMS, COST control, MEASUREMENT

ARES: Persistently Secure Non-Volatile Memory with Processor-transparent and Hardware-friendly Integrity Verification and Metadata Recovery.

Autori: YU ZOU ZUBAIR, KAZI ABU ALWADI, MAZEN a ďalší

Zdroj: ACM Transactions on Embedded Computing Systems; Jan2022, Vol. 21 Issue 1, p1-32, 32p

Predmety: RECURSIVE functions, CACHE memory, METADATA, HETEROGENEOUS computing, ELECTRIC power failures, MEMORY

Sharing non‐cache‐coherent memory with bounded incoherence.

Autori: Ren, Yuxin Parmer, Gabriel Milojicic, Dejan

Zdroj: Concurrency & Computation: Practice & Experience; 1/25/2022, Vol. 34 Issue 2, p1-19, 19p

Predmety: CACHE memory, MEMORY, MODERN architecture, COMPUTER architecture, INFORMATION sharing, MANAGEMENT controls

Hardware Design of DRAM Memory Prefetching Engine for General-Purpose GPUs.

Autori: Gabbay, Freddy Salomon, Benjamin Golan, Idan a ďalší

Zdroj: Technologies (2227-7080); Oct2025, Vol. 13 Issue 10, p455, 31p

Predmety: RANDOM access memory, GRAPHICS processing units, HARDWARE design & construction, MATHEMATICAL optimization, PATTERN perception, COMPUTER memory management, ALGORITHMS

Efficient Eager Management of Conflicts for Scalable Hardware Transactional Memory.

Autori: Titos-Gil, Rubén Acacio, Manuel E. García, José M.

Zdroj: IEEE Transactions on Parallel & Distributed Systems; Jan2013, Vol. 24 Issue 1, p59-71, 13p

Predmety: COMPUTER input-output equipment, COMPUTER storage devices, CACHE memory, PARALLEL programming, COMPUTER architecture, INTERNET protocols, COMPUTER memory management, NETWORK routers

Polymorphic Memory: A Hybrid Approach for Utilizing On-Chip Memory in Manycore Systems.

Autori: Lim, Seung-Ho Seok, Hyunchul Park, Ki-Woong

Zdroj: Electronics (2079-9292); Dec2020, Vol. 9 Issue 12, p2061, 1p

Predmety: CACHE memory, DYNAMIC random access memory, MEMORY

Rethinking the Interactivity of OS and Device Layers in Memory Management.

Autori: TSE-YUAN WANG CHUN-FENG WU CHE-WEI TSAO a ďalší

Zdroj: ACM Transactions on Embedded Computing Systems; Aug2022, Vol. 21 Issue 4, p1-21, 21p

Predmety: DYNAMIC random access memory, COMPUTER storage devices, CACHE memory, ENERGY consumption, BIG data

ON-CHIP MEMORY SYSTEM OPTIMIZATION DESIGN FOR THE FT64 SCIENTIFIC STREAM ACCELERATOR.

Autori: Mei Wen Nan Wu Chunyuan Zhang a ďalší

Zdroj: IEEE Micro; Jul/Aug2008, Vol. 28 Issue 4, p51-70, 20p

Predmety: COMPUTER architecture, PROGRAM transformation, CACHE memory, COMPUTER software, COMPUTER input-output equipment, MAGNETIC memory (Computers)

An efficient labeled memory system for learned indexes.

Autori: Yuxuan Mo Jingnan Jia Pengfei Li a ďalší

Zdroj: Fundamental Research; May2024, Vol. 4 Issue 3, p651-659, 9p

Predmety: COMPUTER storage devices, CACHE memory, DATA warehousing, INFORMATION retrieval, BANDWIDTH allocation

LSTM-CRP: Algorithm-Hardware Co-Design and Implementation of Cache Replacement Policy Using Long Short-Term Memory.

Autori: Wang, Yizhou Meng, Yishuo Wang, Jiaxing a ďalší

Zdroj: Big Data & Cognitive Computing; Oct2024, Vol. 8 Issue 10, p140, 28p

Predmety: ARTIFICIAL neural networks, DEEP learning, GLIDERS (Aeronautics), ALGORITHMS, PARTICIPATORY design, MOTIVATION (Psychology)

Hardware-Software Co-Design of an In-Memory Transformer Network Accelerator.

Autori: Laguna, Ann Franchesca Sharifi, Mohammed Mehdi Kazemi, Arman a ďalší

Zdroj: Frontiers in Electronics; 4/11/2022, p1-21, 21p

Predmety: TRANSFORMER models, RECURRENT neural networks, CONVOLUTIONAL neural networks, CACHE memory, PARTICIPATORY design

Hercules: Enabling Atomic Durability for Persistent Memory with Transient Persistence Domain.

Autori: Ye, Chongnan Chen, Meng Jiang, Qisheng a ďalší

Zdroj: ACM Transactions on Embedded Computing Systems; Nov2024, Vol. 23 Issue 6, p1-34, 34p

Predmety: RESEARCH personnel, METADATA, DURABILITY, MEMORY, HARDWARE, CACHE memory

Q-Selector-Based Prefetching Method for DRAM/NVM Hybrid Main Memory System.

Autori: Kim, Jeong-Geun Kim, Shin-Dug Yoon, Su-Kyung

Zdroj: Electronics (2079-9292); Dec2020, Vol. 9 Issue 12, p2158, 1p

Predmety: DYNAMIC random access memory, REINFORCEMENT learning, PATTERN matching, PHASE change memory, MACHINE learning, MEMORY

Hardware Trojan Atack in Embedded Memory.

Autori: XINMU WANG HOQUE, TAMZIDUL BASAK, ABHISHEK a ďalší

Zdroj: ACM Journal on Emerging Technologies in Computing Systems; Oct2020, Vol. 17 Issue 1, p1-28, 28p

Predmety: STATIC random access memory, FIELD programmable gate arrays, LOGIC circuit design, CACHE memory, INTEGRATED circuits

Cache Efficient Functional Algorithms.

Autori: Blelloch, Guy E. Harper, Robert

Zdroj: Communications of the ACM; Jul2015, Vol. 58 Issue 7, p101-108, 8p, 11 Diagrams

Predmety: ALGORITHM research, CACHE memory, COST analysis, COMPUTER storage devices, RANDOM access memory, COMPUTER science research

A Software-Only Scheme for Managing Heap Data on Limited Local Memory(LLM) Multicore Processors.

Autori: KE BAI SHRIVASTAVA, AVIRAL

Zdroj: ACM Transactions on Embedded Computing Systems; Aug2013, Vol. 13 Issue 1, p1-18, 18p

Predmety: COMPUTER software, MULTICORE processors, COMPUTER architecture, CACHE memory, DEBUGGING, COMPUTER interfaces, PERFORMANCE evaluation

A NEW HARDWARE MONITOR DESIGN TO MEASURE DATA STRUCTURE-SPECIFIC CACHE EVICTION INFORMATION.

Autori: Buck, B. R. Hollingsworth, J. K.

Zdroj: International Journal of High Performance Computing Applications; Fall2006, Vol. 20 Issue 3, p353-363, 11p

Predmety: COMPUTERS, CACHE memory, DATA structures, COMPUTER monitors, COMPUTER programming, INDUSTRIAL efficiency, SOFTWARE support, COMPUTER storage devices, ELECTRONIC data processing

Breaking the Memory Wall in MonetDB.

Autori: Boncz, Peter A. Kersten, Martin L. Manegold, Stefan

Zdroj: Communications of the ACM; Dec2008, Vol. 51 Issue 12, p77-85, 9p, 3 Diagrams, 2 Charts, 5 Graphs

Predmety: DATABASE design, CENTRAL processing units, ELECTRONIC data processing, INFORMATION storage & retrieval systems, DATABASE management, MANAGEMENT