Search Results - Types and Design Styles – Gate arrays General Terms Algorithms

Real-Time Multi-Channel Epileptic Seizure Detection Exploiting an Ultra-Low-Complexity Algorithm–Hardware Co-Design Approach.

Authors: Vittimberga, Andrea Nicolini, Giovanni Scotti, Giuseppe

Source: Sensors (14248220); Nov2025, Vol. 25 Issue 22, p6889, 22p

Subject Terms: SEIZURES (Medicine), ALGORITHMS, MULTICHANNEL communication, FIELD programmable gate arrays, SIGNAL processing, SYSTEMS design, ELECTROENCEPHALOGRAPHY, REAL-time computing

FPGA Chip Design of Sensors for Emotion Detection Based on Consecutive Facial Images by Combining CNN and LSTM.

Authors: Pan, Shing-Tai Wu, Han-Jui

Source: Electronics (2079-9292); Aug2025, Vol. 14 Issue 16, p3250, 27p

Subject Terms: EMOTION recognition, CONVOLUTIONAL neural networks, FACE perception, ARTIFICIAL neural networks, FIELD programmable gate arrays, CLASSIFICATION algorithms, LONG short-term memory, REAL-time computing

Convolutional Neural Network Acceleration Techniques Based on FPGA Platforms: Principles, Methods, and Challenges.

Authors: Gao, Li Luo, Zhongqiang Wang, Lin

Source: Information; Oct2025, Vol. 16 Issue 10, p914, 59p

Subject Terms: CONVOLUTIONAL neural networks, FIELD programmable gate arrays, MATHEMATICAL optimization, SCALABILITY, PARALLEL processing, BENCHMARK problems (Computer science)

Contextual Real-Time Optimization on FPGA by Dynamic Selection of Chaotic Maps and Adaptive Metaheuristics.

Authors: Ouchker, Rabab Tahiri, Hamza Mchichou, Ismail et al.

Source: Applied Sciences (2076-3417); Oct2025, Vol. 15 Issue 19, p10695, 35p

Subject Terms: FIELD programmable gate arrays, METAHEURISTIC algorithms, MATHEMATICAL optimization, PROBLEM solving, DYNAMIC programming, ARTIFICIAL intelligence

Application of FPGA Devices in Network Security: A Survey.

Authors: Abdulsamad, Abdulmunem A. Répás, Sándor R.

Source: Electronics (2079-9292); Oct2025, Vol. 14 Issue 19, p3894, 36p

Subject Terms: FIELD programmable gate arrays, COMPUTER network security, INTRUSION detection systems (Computer security), FIREWALLS (Computer security), RESEARCH evaluation, ARTIFICIAL intelligence, CRYPTOGRAPHY

Domain-Specific Acceleration of Gravity Forward Modeling via Hardware–Software Co-Design.

Authors: Yang, Yong Sun, Daying Ma, Zhiyuan et al.

Source: Micromachines; Nov2025, Vol. 16 Issue 11, p1215, 23p

Subject Terms: GEOPHYSICS, FIELD programmable gate arrays, OPTIMIZATION algorithms, REDUCED instruction set computers, MATHEMATICAL optimization, PARALLEL processing, PARALLEL computers, BOREHOLE gravimetry

Company/Entity: ADVANCED Micro Devices Inc.

Design of a Low-Latency Video Encoder for Reconfigurable Hardware on an FPGA.

Authors: Perez-Tirador, Pablo Aranda, Jose Javier Alarcon Granero, Manuel et al.

Source: Technologies (2227-7080); Oct2025, Vol. 13 Issue 10, p433, 19p

Subject Terms: FIELD programmable gate arrays, VIDEO coding, REAL-time computing, LIVE streaming, DATA compression, EMBEDDED computer systems, ELECTRIC power consumption, ADAPTIVE computing systems

Design and Implementation of a YOLOv2 Accelerator on a Zynq-7000 FPGA.

Authors: Kim, Huimin Kim, Tae-Kyoung

Source: Sensors (14248220); Oct2025, Vol. 25 Issue 20, p6359, 23p

Subject Terms: OBJECT recognition (Computer vision), FIELD programmable gate arrays, SIGNAL quantization, SYSTEMS on a chip, MECHANICAL efficiency

Optimizing SPHINCS+ for Low-Power Devices.

Authors: Magyari, Alexander Chen, Yuhua

Source: Electronics (2079-9292); Sep2025, Vol. 14 Issue 17, p3460, 25p

Subject Terms: ENERGY consumption, FIELD programmable gate arrays, MATHEMATICAL optimization, EMBEDDED computer systems, DIGITAL signatures

Systematic HLS Co-Design: Achieving Scalable and Fully-Pipelined NTT Acceleration on FPGAs.

Authors: Hong, Jinfa Zhang, Bohao Mao, Gaoyu et al.

Source: Electronics (2079-9292); Oct2025, Vol. 14 Issue 19, p3922, 29p

Subject Terms: CRYPTOGRAPHY, PARALLEL processing, PROGRAMMABLE logic devices, MULTIDISCIPLINARY design optimization, COMPUTER memory management

A Memory-Efficient Compensation Algorithm for Vertical Crosstalk in 8K LCD Panels.

Authors: Lee, Yongwoo Choi, Kiwon Park, Hyeryoung et al.

Source: Electronics (2079-9292); Oct2025, Vol. 14 Issue 19, p3965, 12p

Subject Terms: LIQUID crystal displays, ALGORITHMS, COMPUTER memory management, IMAGE quality analysis, FIELD programmable gate arrays

Quantized convolutional neural networks: a hardware perspective.

Authors: Zhang, Li Krestinskaya, Olga Fouda, Mohammed E. et al.

Source: Frontiers in Electronics; 2025, p1-27, 27p

Subject Terms: CONVOLUTIONAL neural networks, HARDWARE, FIELD programmable gate arrays, MACHINE learning, INTERNET of things, SIGNAL quantization, EDGE computing, ARTIFICIAL neural networks

Comprehensive RTL-to-GDSII Workflow for Custom Embedded FPGA Architectures Using Open-Source Tools.

Authors: Baungarten-Leon, Emilio Isaac Ortega-Cisneros, Susana Leyva, Gerardo et al.

Source: Electronics (2079-9292); Oct2025, Vol. 14 Issue 19, p3866, 26p

Subject Terms: FIELD programmable gate arrays, ELECTRONIC design automation, INTEGRATED circuits, DESIGN techniques, OPEN source software, COMPUTER hardware description languages

Implementation Efficiency of Falcon Digital Signature Scheme on Arty-7 XC7A35T Board.

Authors: Nguyen, Tat-Thang Nguyen, Duc-Duy Dao, Toan-Thanh et al.

Source: Electronics (2079-9292); Nov2025, Vol. 14 Issue 22, p4504, 21p

Subject Terms: DIGITAL signatures, FIELD programmable gate arrays, MICROSOFT .NET Framework, MATHEMATICAL optimization, EMBEDDED computer systems

ineuralFPGA: Implementation of an Optimized DNN Model for Real-Time Applications.

Authors: Jain, Vineet Sharma, Abhishek Jain, Prateek et al.

Source: Ingénierie des Systèmes d'Information; Apr2025, Vol. 30 Issue 4, p1101-1110, 10p

Subject Terms: REAL-time computing, ARTIFICIAL neural networks, VERILOG (Computer hardware description language), SYSTEMS design, FIELD programmable gate arrays

FPGA Spectral Clustering Receiver for Phase-Noise-Affected Channels.

Authors: Marquez-Viloria, David Solarte-Sanchez, Miguel Castro-Ospina, Andrés E. et al.

Source: Applied Sciences (2076-3417); Oct2025, Vol. 15 Issue 19, p10818, 16p

Subject Terms: OPTICAL communications, FIELD programmable gate arrays, BIT error rate, PARALLEL processing, CLUSTER analysis (Statistics), PHASE noise, EIGENANALYSIS, K-means clustering

Ascon on FPGA: Post-Quantum Safe Authenticated Encryption with Replay Protection for IoT.

Authors: Gladis Kurian, Meera Chen, Yuhua

Source: Electronics (2079-9292); Jul2025, Vol. 14 Issue 13, p2668, 26p

Subject Terms: INTERNET of things, DATA encryption, FIELD programmable gate arrays, CRYPTOGRAPHY

Company/Entity: XILINX Inc.

Optimized Implementation of YOLOv3-Tiny for Real-Time Image and Video Recognition on FPGA.

Authors: Calì, Riccardo Falaschetti, Laura Biagetti, Giorgio

Source: Electronics (2079-9292); Oct2025, Vol. 14 Issue 20, p3993, 40p

Subject Terms: FIELD programmable gate arrays, REAL-time computing, IMAGE processing, ARTIFICIAL neural networks, VIDEO processing, EMBEDDED computer systems

Improving the Fast Fourier Transform for Space and Edge Computing Applications with an Efficient In-Place Method.

Authors: Vasilakis, Christoforos Tsagkaropoulos, Alexandros Koutoulas, Ioannis et al.

Source: Software (2674-113X); Jun2025, Vol. 4 Issue 2, p11-N.PAG, 26p

Subject Terms: FIELD programmable gate arrays, FAST Fourier transforms, RASPBERRY Pi, ALGORITHMS, MEMORY

The Ubimus Plugging Framework: Deploying FPGA-Based Prototypes for Ubiquitous Music Hardware Design.

Authors: Keller, Damián Jagwani, Aman Lazzarini, Victor

Source: Computers (2073-431X); Apr2025, Vol. 14 Issue 4, p155, 24p

Subject Terms: COMPUTER hardware description languages, LEARNING curve, GATE array circuits, LOGIC circuits, INTEGRATED circuits