Search Results - Java bytecodes

Using dynamic analysis of Java bytecode for evolutionary object-oriented unit testing

Authors: Ribeiro, José Carlos Bregieiro Zenha-Rela, Mário Alberto Fernandéz de Vega, Francisco et al.

Contributors: Ribeiro, José Carlos Bregieiro Zenha-Rela, Mário Alberto Fernandéz de Vega, Francisco et al.

Subject Terms: Evolutionary testing

File Description: application/pdf

Relation: 85-766-0119-1

Availability: http://hdl.handle.net/10400.8/134

Performance Study of Kotlin and Java Programs with Bytecode Analysis

Authors: Hayataka Nakamura Atsuya Sonoyama Takeshi Kamiyama et al.

Source: Journal of Information Processing. 2024, 32:380-395

Platform Independent Timing of Java Virtual Machine Bytecode Instructions

Authors: Lambert, Jonathan Power, James F.

Source: Electronic Notes in Theoretical Computer Science. 220:97-113

Subject Terms: Bytecode Timing, Computer Science, 0202 electrical engineering, electronic engineering, information engineering, RDTSC, Computer software, Java Virtual Machine, 02 engineering and technology, Bytecode Sequences, Theoretical Computer Science, Computer Science(all)

File Description: text

Access URL: https://mural.maynoothuniversity.ie/id/eprint/6382/

A software tool for semi-automatic gridification of resource-intensive Java bytecodes and its application to ray tracing and sequence alignment

Authors: Mateos Diaz, Cristian Maximiliano Zunino Suarez, Alejandro Octavio Hirsch Jofré, Matías Eberardo et al.

Source: CONICET Digital (CONICET)
Consejo Nacional de Investigaciones Científicas y Técnicas

Subject Terms: RESOURCE-INTENSIVE APPLICATIONS, COMPUTATIONAL GRIDS, JAVA BYTECODE, 0202 electrical engineering, electronic engineering, information engineering, PARALLELIZATION HEURISTICS, 02 engineering and technology, AUTOMATIC PARALLELISM, GRIDIFICATION

File Description: application/pdf; application/zip

Access URL: http://hdl.handle.net/11336/95709

A Verifier for Region-Annotated Java Bytecodes

Authors: Cherem, Sigmund Rugina, Radu

Source: Electronic Notes in Theoretical Computer Science. 141:183-201

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, region-based memory management, bytecode verification, Theoretical Computer Science, Computer Science(all)

Annotating the Java bytecodes in support of optimization

Authors: Hummel, Joseph Azevedo, Ana Kolson, David et al.

File Description: application/pdf

Access URL: https://escholarship.org/uc/item/1n06p1c8
https://escholarship.org/content/qt1n06p1c8/qt1n06p1c8.pdf

Java bytecode to hardware made easy with bluespec system verilog

Authors: Flavius Gruian Mehmet Ali Arslan

Source: Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems. :80-87

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Modeling the Java Bytecode Verifier

Authors: Reynolds, Mark C.

Source: Science of Computer Programming. 78:327-342

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 0102 computer and information sciences, 02 engineering and technology, 01 natural sciences, Software

An instruction set extension for java bytecodes translation acceleration

Authors: Isidoros Sideris Kiamal Pekmestzi George Economakos

Source: 2008 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. :116-123

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Static Single Assignment Form for Java Bytecodes in CTOC

Authors: Ki-Tae Kim Weon-Hee Yoo

Source: The KIPS Transactions:PartD. :939-946

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Access URL: http://society.kisti.re.kr/sv/SV_svpsbs03V.do?method=download&cn1=JAKO200606141738300

Characterization of Java applications at bytecode and ultra-SPARC machine code levels

Authors: R. Radhakrishnan J. Rubio L.K. John

Source: Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040). :281-284

Subject Terms: 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 01 natural sciences

A Java processor architecture with bytecode folding and dynamic scheduling

Authors: M.W. El-Kharashi F. Elguibaly K.F. Li

Source: 2001 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (IEEE Cat. No.01CH37233). 1:307-310

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Adapting Tomasulo's algorithm for bytecode folding based Java processors

Authors: M. Watheq El-Kharashi Fayez Elguibaly Kin F. Li

Source: ACM SIGARCH Computer Architecture News. 29:1-8

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Towards an automatic path from Java/sup TM/ bytecodes to hardware through high-level synthesis

Authors: J.M.P. Cardoso H.C. Neto

Source: 1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196). 1:85-88

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Modular and Field-Sensitive Termination Analysis of Java Bytecode = Análisis de Terminación Modular y Sensible a los Campos de Código de Byte Java

Authors: Ramirez Deantes, Diana

Thesis Advisors: Puebla Sánchez, Alvaro Germán

Subject Terms: Informática

Access URL: http://hdl.handle.net/10803/452001

Optimizing Java bytecodes

Authors: Michał Cierniak Wei Li

Source: Concurrency: Practice and Experience. 9:427-444

Access URL: http://www.hpjava.org/pcrc/doc/rochester/rochester.pdf

Compiling standard ML to Java bytecodes

Authors: Nick Benton Andrew Kennedy George Russell

Source: ACM SIGPLAN Notices. 34:129-140

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Effiziente Mehrkernarchitektur für eingebettete Java-Bytecode-Prozessoren

Authors: Spallek, Rainer G. Tavangarian, Djamshid Technische Universität Dresden et al.

Index Terms: info:eu-repo/classification/ddc/004, ddc:004, Mehrkernprozessor; Java; Byte-Code; Eingebettetes System, Java-Bytecode-Prozessor, Mehrkernprozessor, Eingebettetes System, Java-Bytecode-Processor, Multi-Core, Embedded System, doc-type:doctoralThesis, info:eu-repo/semantics/doctoralThesis, doc-type:Text

URL: https://tud.qucosa.de/id/qucosa%3A24907
https://tud.qucosa.de/api/qucosa%3A24907/attachment/ATT-0/

Modular and Field-Sensitive Termination Analysis of Java Bytecode = Análisis de Terminación Modular y Sensible a los Campos de Código de Byte Java

Thesis Advisors: Puebla Sánchez, Alvaro Germán

Subject Terms: Informática

Access URL: http://oa.upm.es/6094/

Towards a java bytecodes compiler for nios II soft-core processor

Authors: Lima, Willian S. Lobato, Renata S. Manacero, Aleardo et al.

Contributors: Lima, Willian S. Lobato, Renata S. Manacero, Aleardo et al.

Subject Terms: Bytecodes, Control flows, Dependence graphs, Instruction set, Java bytecodes, NIOS II, Reconfigurable architecture, Reconfigurable computing, Reconfigurable devices, Research topics, Soft-core processors, Source codes, Building codes, Computer architecture, High level languages, Program compilers

File Description: 104-109

Relation: Proceedings - IEEE Symposium on Computers and Communications; 0,193; http://dx.doi.org/10.1109/ISCC.2009.5202253; Proceedings - IEEE Symposium on Computers and Communications, p. 104-109.; http://hdl.handle.net/11449/71241; WOS:000277119300017; 2-s2.0-70449513605; 5568681374094860; orcid:0000-0001-8248-0826

Availability: http://hdl.handle.net/11449/71241
https://doi.org/10.1109/ISCC.2009.5202253