Search Results - Hardware implementation of nonnumerical algorithms (VLSI algorithms, etc.)*

A new algorithm for the elimination of common subexpressions in hardware implementation of digital filters by using genetic programming

Authors: W.C. Miller Majid Ahmadi H. Safiri et al.

Source: Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors. :319-328

Subject Terms: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), digital filter, ASIC, Learning and adaptive systems in artificial intelligence, genetic algorithm, 0211 other engineering and technologies, 0202 electrical engineering, electronic engineering, information engineering, common subexpressions, 02 engineering and technology, integer multiplication

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Access URL: https://link.springer.com/article/10.1023/A:1015385120447
https://doi.org/10.1023/A:1015385120447
https://dblp.uni-trier.de/db/conf/asap/asap2000.html#SafiriAJM00
https://rd.springer.com/content/pdf/10.1023%2FA%3A1015385120447.pdf
https://ieeexplore.ieee.org/document/862402

Modular switched-resistor ANN chip for character recognition using novel parallel VLSI architecture

Authors: Rehan, Sameh E. Elmasry, Mohamed I.

Subject Terms: multi- layer perceptron, back-propagation learning algorithm, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), Pattern recognition, speech recognition, character recognition, Learning and adaptive systems in artificial intelligence, VLSI implementation, hardware implementation, VLSI circuits, Circuits, networks, switched-resistor circuits, artificial neural networks, sampled-data circuits

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Access URL: https://zbmath.org/529794

zbMATH Open Web Interface contents unavailable due to conflicting licenses.

Authors: zbMATH Open Web Interface contents unavailable due to conflicting licenses.

Subject Terms: Finite difference methods for boundary value problems involving PDEs, Iterative numerical methods for linear systems, Computational methods for sparse matrices, Laplace operator, Helmholtz equation (reduced wave equation), Poisson equation, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.)

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Access URL: https://zbmath.org/1428276

zbMATH Open Web Interface contents unavailable due to conflicting licenses.

Authors: zbMATH Open Web Interface contents unavailable due to conflicting licenses.

Subject Terms: Computer system organization, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), Learning and adaptive systems in artificial intelligence

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Access URL: https://zbmath.org/1127805

Beyond-Binary Arithmetic: Algorithms and VLSI Implementations: Beyond-binary arithmetic: Algorithms and VLSI implementations

Authors: Tatsuo Higuchi Takafumi Aoki

Source: Interdisciplinary Information Sciences. 6:75-98

Subject Terms: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, Mathematical problems of computer architecture, computer arithmetic algorithms

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Access URL: https://www.jstage.jst.go.jp/article/iis/6/1/6_1_75/_pdf
https://zbmath.org/1491723
https://doi.org/10.4036/iis.2000.75
http://ci.nii.ac.jp/naid/110000071715

A vector quantization algorithm suitable for VLSI implementation

Authors: Min Hao Zhou Ting Zhang Qian-Ling et al.

Source: 2nd International Conference on ASIC. :23-26

Subject Terms: 0508 media and communications, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), 05 social sciences, VLSI implementation, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, Image processing (compression, reconstruction, etc.) in information and communication theory

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Access URL: https://zbmath.org/1553672
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?isnumber=12233&arnumber=562741&count=115&index=7
http://ieeexplore.ieee.org/iel3/4267/12233/00562741.pdf

Basic hardware module for a nonlinear programming algorithm and applications

Authors: Shin-Yeu Lin

Source: Automatica. 33:1579-1586

Subject Terms: 0209 industrial biotechnology, 02 engineering and technology, nonlinear system, Control/observation systems involving computers (process control, etc.), VLSI-array processor architecture, optimal control, 0203 mechanical engineering, Nonlinear programming, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), discrete-time optimization, nonlinear programming, Nonlinear systems in control theory, control constraints, hardware module

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Access URL: https://www.sciencedirect.com/science/article/pii/S0005109897000538
https://ir.nctu.edu.tw:443/handle/11536/422
https://dblp.uni-trier.de/db/journals/automatica/automatica33.html#Lin97a
https://ir.nctu.edu.tw/bitstream/11536/422/1/A1997XU55600015.pdf

VLSI architecture of modified Euclidean algorithm for Reed–Solomon code: VLSI architecture of modified Euclidean algorithm for Reed-Solomon code.

Authors: Yaotsu Chang J.H. Jeng Trieu-Kien Truong

Source: Information Sciences. 155:139-150

Subject Terms: VLSI architecture, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), Decoding, Reed-Solomon code, 0202 electrical engineering, electronic engineering, information engineering, Error correcting code, Multiplicative structure, Euclidean algorithm, greatest common divisors, 02 engineering and technology, decoding algorithm, Reliability, testing and fault tolerance of networks and computer systems, Berlekamp's key equation

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Access URL: http://ecite.utas.edu.au/29917
https://www.sciencedirect.com/science/article/pii/S0020025503001543
http://ir.lib.isu.edu.tw/handle/987654321/9444
https://dblp.uni-trier.de/db/journals/isci/isci155.html#ChangTJ03

An Efficient In-Place VLSI Architecture for Viterbi Algorithm: An efficient in-place VLSI architecture for Viterbi algorithm

Authors: Yun-Nan Chang

Source: Journal of VLSI signal processing systems for signal, image and video technology. 33:317-324

Subject Terms: trace-back, 0508 media and communications, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), 05 social sciences, ACS unit, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, Viterbi decoder, register-exchange

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Access URL: https://zbmath.org/1970997
https://doi.org/10.1023/a:1022246815354
https://rd.springer.com/article/10.1023/A%3A1022246815354
https://link.springer.com/10.1023/A:1022246815354
https://link.springer.com/article/10.1023%2FA%3A1022246815354
https://dblp.uni-trier.de/db/journals/vlsisp/vlsisp33.html#Chang03

Efficient processor arrays for the implementationof the generalised predictive-control algorithm: Efficient processor arrays for the implementation of the generalised predictive-control algorithm

Authors: T. Chronopoulos N. Koussoulas Anthony Tzes et al.

Source: IEE Proceedings - Control Theory and Applications. 145:47-54

Subject Terms: generalized predictive control algorithm, 0209 industrial biotechnology, Design techniques (robust design, computer-aided design, etc.), Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), 0202 electrical engineering, electronic engineering, information engineering, parallel algorithms, processor array architectures, 02 engineering and technology, Control/observation systems involving computers (process control, etc.)

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Access URL: https://digital-library.theiet.org/content/journals/10.1049/ip-cta_19981637
https://nyuscholars.nyu.edu/en/publications/efficient-processor-arrays-for-the-implementation-of-the-generali

The differential CORDIC algorithm: Constant scale factor redundant implementation without correcting iterations: The differential CORDIC algorithm: Constant scale factor redundant implementation without correcting iterations.

Authors: Heinrich Meyr H. Dawid

Source: IEEE Transactions on Computers. 45:307-318

Subject Terms: VLSI architecture, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), reduncant number systems, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, Nonnumerical algorithms, Mathematical problems of computer architecture

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Access URL: https://core.ac.uk/display/36592121
https://ieeexplore.ieee.org/document/485569/
https://dblp.uni-trier.de/db/journals/tc/tc45.html#DawidM96
http://ieeexplore.ieee.org/document/485569/
https://doi.org/10.1109%2f12.485569
https://www.computer.org/csdl/journal/tc/1996/03/t0307/13rRUxD9h4i

Comparison of the VLSI cost/performance properties of two Reed–Solomon decoding algorithms: Comparison of the VLSI cost/performance properties of two Reed-Solomon decoding algorithms

Authors: Sylvia M. Jennings Joep L. W. Kessels

Source: Integration. 25:103-110

Subject Terms: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), Fitzpatrick's algorithm, tangram, 0202 electrical engineering, electronic engineering, information engineering, 0102 computer and information sciences, 02 engineering and technology, Reed-Solomon decoding, 01 natural sciences

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Access URL: https://dblp.uni-trier.de/db/journals/integration/integration25.html#JenningsK98
https://www.sciencedirect.com/science/article/pii/S0167926098000091

VLSI algorithms and architectures for complex householder transformation with applications to array processing: VLSI algorithms and architectures for complex Householder transformation with applications to array processing

Authors: K.J.R. Liu Kung Yao S.F. Hsieh et al.

Source: Journal of VLSI signal processing systems for signal, image and video technology. 4:53-68

Subject Terms: Numerical algorithms for specific classes of architectures, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

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Access URL: https://drum.lib.umd.edu/bitstream/1903/5131/1/TR_91-84.pdf
https://zbmath.org/644410
https://doi.org/10.1007/bf00930618
https://dblp.uni-trier.de/db/journals/vlsisp/vlsisp4.html#TangLHY92
https://doi.org/10.1007/BF00930618
https://link.springer.com/article/10.1007/BF00930618
https://drum.lib.umd.edu/handle/1903/5131
https://rd.springer.com/article/10.1007/BF00930618
https://drum.lib.umd.edu/bitstream/1903/5131/1/TR_91-84.pdf

An Efficient Algorithm and Parallel Implementations for Binary and Residue Number Systems: An efficient algorithm and parallel implementations for binary and residue number systems

Authors: C.N. Zhang D.Y.Y. Yun B. Shirazi

Source: Journal of Symbolic Computation. 15:451-462

Subject Terms: parallelism, Algebra and Number Theory, digital signal processing, 02 engineering and technology, symbolic computation, Computational Mathematics, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), Switching theory, application of Boolean algebra, Boolean functions, Computational number theory, 0202 electrical engineering, electronic engineering, information engineering, Distributed algorithms, residue number system, Congruences, primitive roots, residue systems, VLSI hardware design

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Access URL: https://dialnet.unirioja.es/servlet/articulo?codigo=345217
https://core.ac.uk/display/82573125
https://www.sciencedirect.com/science/article/pii/S0747717183710308
https://www.sciencedirect.com/science/article/abs/pii/S0747717183710308
https://dblp.uni-trier.de/db/journals/jsc/jsc15.html#ZhangSY93

A timing-driven placement algorithm with the Elmore delay model for row-based VLSIs

Authors: Tetsushi Koide Noriyoshi Yoshida Yutaka Nishimaru et al.

Source: Integration. 24:53-77

Subject Terms: Computer system organization, timing-driven layout design, interconnection delay, critical path, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), nonlinear programming, 0202 electrical engineering, electronic engineering, information engineering, timing constraint, 02 engineering and technology, hierarchical partitioning, VLSI CAD, Elmore delay

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Access URL: https://zbmath.org/1190115
https://doi.org/10.1016/s0167-9260(97)00025-4
https://www.sciencedirect.com/science/article/pii/S0167926097000254
https://dblp.uni-trier.de/db/journals/integration/integration24.html#KoideWONY97
https://doi.org/10.1016/S0167-9260(97)00025-4

Algorithm study for VLSI interconnections

Authors: Yang Zhao Yunyi Wang

Source: Science in China Series E: Technological Sciences. 41:237-241

Subject Terms: Technical applications of optics and electromagnetic theory, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), wave-front technique, finite element method, VLSI circuit, 0202 electrical engineering, electronic engineering, information engineering, Finite element, Rayleigh-Ritz and Galerkin methods for initial value and initial-boundary value problems involving PDEs, 02 engineering and technology, numerical experiments, PDEs in connection with optics and electromagnetic theory, VLSI interconnections

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Access URL: https://ui.adsabs.harvard.edu/abs/1998ScChE..41..237Z/abstract
https://link.springer.com/content/pdf/10.1007/BF02919433.pdf
https://link.springer.com/article/10.1007/BF02919433

A proof of the nonrestoring division algorithm and its implementation on an ALU

Authors: Diederik Verkest Luc Claesen H. De Man

Source: Formal Methods in System Design. 4:5-31

Subject Terms: correctness, Boyer- Moore theorem-proving system, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), ALU implementation, Switching theory, application of Boolean algebra, Boolean functions, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, Theorem proving (deduction, resolution, etc.), nonrestoring division algorithm

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A methodology for algorithm regularization and mapping into time-optimal VLSI arrays

Authors: Hassan Barada Ahmed El-Amawy

Source: Parallel Computing. 19:33-61

Subject Terms: systolic directed graph, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), algorithmic transformations, time-optimal VLSI arrays, 0202 electrical engineering, electronic engineering, information engineering, systolic implementation, 02 engineering and technology, systolic precedence diagram, mapping, graph methodology for regularizing data flow, systolic architecture, Mathematical problems of computer architecture

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Access URL: https://www.sciencedirect.com/science/article/pii/016781919390104S

A VLSI architecture for simplified arithmetic Fourier transform algorithm

Authors: M.-T. Shih E. Hendon Irving S. Reed et al.

Source: IEEE Transactions on Signal Processing. 40:1122-1133

Subject Terms: VLSI architecture, parallel processing, Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), arithmetic Fourier transform, 0202 electrical engineering, electronic engineering, information engineering, butterfly structure, 02 engineering and technology, data-flow methods, complexity, Numerical methods for discrete and fast Fourier transforms

File Description: application/xml

Access URL: https://zbmath.org/63077
https://doi.org/10.1109/78.134475
https://dblp.uni-trier.de/db/conf/asap/asap1990.html#ReedSHTT90
https://www.computer.org/csdl/proceedings-article/asap/1990/00145490/12OmNAi6vRb
https://ntrs.nasa.gov/search.jsp?R=19920057752
https://ieeexplore.ieee.org/document/134475/
http://ieeexplore.ieee.org/document/134475/
https://repository.exst.jaxa.jp/dspace/handle/a-is/326730
https://ui.adsabs.harvard.edu/abs/1992ITSP...40.1122R/abstract
https://dblp.uni-trier.de/db/journals/tsp/tsp40.html#ReedSTHT92

A VLSI algorithm for calculating the tree to tree distance

Authors: Xiaolin Liu Meirui Xu

Source: Journal of Computer Science and Technology. 8:68-76

Subject Terms: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.), tree-to-tree distance, Graph theory (including graph drawing) in computer science, Pattern recognition, speech recognition, 0202 electrical engineering, electronic engineering, information engineering, 0102 computer and information sciences, 02 engineering and technology, VLSI algorithm, 01 natural sciences

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Access URL: https://link.springer.com/article/10.1007%2FBF02946587