Výsledky vyhledávání - Hardware Integrated circuits Reconfigurable logic and FPGAs

Technology/System Co-Optimization for FPGA Using Emerging Reconfigurable Logic Device.

Autoři: Lu, Sheng Shang, Liuting Jung, Sungyong a další

Zdroj: ACM Journal on Emerging Technologies in Computing Systems; Jul2025, Vol. 21 Issue 3, p1-21, 21p

Témata: FIELD programmable gate arrays, PROGRAMMABLE logic devices, DESIGN techniques, MATHEMATICAL optimization, INTEGRATED circuits, BENCHMARK testing (Engineering)

An Overview of FPGA-inspired Obfuscation Techniques.

Autoři: Abideen, Zain Ul Gokulanathan, Sumathi J. Aljafar, Muayad a další

Zdroj: ACM Computing Surveys. Dec2024, Vol. 56 Issue 12, p1-35. 35p.

Témata: *APPLICATION-specific integrated circuits, *VERY large scale circuit integration, *STATIC random access memory, *SEQUENTIAL circuits, *EMBEDDED computer systems, *FIELD programmable gate arrays, *LOGIC circuits, *SATISFIABILITY (Computer science), *SERVER farms (Computer network management)

Energy proportional streaming spiking neural network in a reconfigurable system

Autoři: Galindo Sanchez, Felipe Nunez-Yanez, Jose

Zdroj: Galindo Sanchez , F & Nunez-Yanez , J 2017 , ' Energy proportional streaming spiking neural network in a reconfigurable system ' , Microprocessors and Microsystems , vol. 53 , pp. 57-67 . https://doi.org/10.1016/j.micpro.2017.06.018

Témata: Hardware, Hardware accelerators, Integrated circuits, Reconfigurable logic and FPGAs, Reconfigurable logic applications

Popis souboru: application/pdf

Dostupnost: https://hdl.handle.net/1983/b678c46a-3fd8-4d46-9be7-2fa359d8d47f
https://research-information.bris.ac.uk/en/publications/b678c46a-3fd8-4d46-9be7-2fa359d8d47f
https://doi.org/10.1016/j.micpro.2017.06.018
https://research-information.bris.ac.uk/ws/files/117900896/Jose_Nunez_Yanez_Energy_Proportional_Streaming_Spiking_Neural_Network_in_a_Reconfigurable_System.pdf
http://www.scopus.com/inward/record.url?scp=85024111403&partnerID=8YFLogxK

Hardware functional obfuscation with ferroelectric active interconnects.

Autoři: Yu, Tongguang Xu, Yixin Deng, Shan a další

Zdroj: Nature Communications; 4/25/2022, Vol. 13 Issue 1, p1-11, 11p

Témata: FIELD-effect transistors, THRESHOLD voltage, INTEGRATED circuits, REVERSE engineering, LOGIC programming

Performance Improvements from Partitioning Applications to FPGA Hardware in Embedded SoCs.

Autoři: Galanis, Michalis Dimitroulakos, Gregory Goutis, Costas

Zdroj: Journal of Supercomputing. Feb2006, Vol. 35 Issue 2, p185-199. 15p. 4 Diagrams, 3 Charts, 3 Graphs.

Témata: *FIELD programmable gate arrays, *INTEGRATED circuits, *LOGIC devices, *LOGIC programming, *EMBEDDED computer systems, *ALGORITHMS, *COMPUTER architecture, *COMPUTER software

Loopback strategy for in-vehicle network processing in automotive gateway network on chip

Autoři: González Mariño, Ángela Fons, Francesc Zhang, Haigang a další

Přispěvatelé: González Mariño, Ángela Fons, Francesc Zhang, Haigang a další

Témata: Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats, Automotive computers, Networks, Network components, Intermediate nodes, Bridges and switches, Hardware, Integrated circuits, Reconfigurable logic and FPGAs, Hardware accelerators, Very large scale integration design, Design reuse and communication-based design, Network on chip, Ordinadors de bord

Popis souboru: 7 p.; application/pdf

Relation: http://hdl.handle.net/2117/359133

Dostupnost: http://hdl.handle.net/2117/359133
https://doi.org/10.1145/3477231.3490429

Transparent In-Circuit Assertions for FPGAs

Autoři: Hung, E Todman, T Luk, W a další

Přispěvatelé: Hung, E Todman, T Luk, W a další

Zdroj: 1202 ; 1193

Témata: Science & Technology, Technology, Computer Science, Hardware & Architecture, Interdisciplinary Applications, Engineering, Electrical & Electronic, Circuits and systems, design automation, electronic design automation and methodology, field programmable gate arrays, integrated circuits, logic design, reconfigurable logic, 0906 Electrical And Electronic Engineering, 1006 Computer Hardware, Computer Hardware & Architecture

Relation: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems; http://hdl.handle.net/10044/1/41804; https://dx.doi.org/10.1109/TCAD.2016.2618862; EP/I012036/1; 287804; PO 1553380; 671653; 516075101 (EP/N031768/1)

Dostupnost: http://hdl.handle.net/10044/1/41804
https://doi.org/10.1109/TCAD.2016.2618862

Island-Style Monolithic Three-Dimensional CMOS-Nanoelectromechanical Logic Circuits.

Autoři: Kwon, Hyug Su Ko, Ji Wang Choi, Woo Young

Zdroj: IEEE Electron Device Letters; Aug2020, Vol. 41 Issue 8, p1257-1260, 4p

Témata: LOGIC circuits, CMOS logic circuits, LOW voltage integrated circuits, FIELD programmable gate arrays

Self-Parameterized Chaotic Map for Low-Cost Robust Chaos.

Autoři: Paul, Partha Sarathi Dhungel, Anurag Sadia, Maisha a další

Zdroj: Journal of Low Power Electronics & Applications; Mar2023, Vol. 13 Issue 1, p18, 23p

Témata: IMAGE encryption, RANDOM number generators, GATE array circuits, LYAPUNOV exponents, INTEGRATED circuits

Korporace: NATIONAL Institute of Standards & Technology (U.S.)

A Fine-Grain Dynamically Reconfigurable Architecture Aimed at Reducing the FPGA-ASIC Gaps.

Autoři: Lin, Ting-Jung Zhang, Wei Jha, Niraj K.

Zdroj: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Dec2014, Vol. 22 Issue 12, p2607-2620, 14p

Témata: ADAPTIVE computing systems, FIELD programmable gate arrays, APPLICATION-specific integrated circuits, SILICON, ENERGY consumption, COMPLEMENTARY metal oxide semiconductors

Programmable logic controller performance enhancement by field programmable gate array based design.

Autoři: Patel, Dhruv Bhatt, Jignesh Trivedi, Sanjay

Zdroj: ISA Transactions. Jan2015, Vol. 54, p156-168. 13p.

Témata: Programmable controllers, Field programmable gate arrays, Automation, Simulation methods & models, Logic circuits, Miniature electronic equipment

A study on the generation of silicon-based hardware Plc by means of the direct conversion of the ladder diagram to circuit design language

Autoři: Du, Daoshan Xu, Xiaodong Yamazaki, Kazuo

Zdroj: The International Journal of Advanced Manufacturing Technology. 49(5)

Témata: Engineering, Computer-Aided Engineering (CAD, CAE) and Design, Mechanical Engineering, Production/Logistics, Industrial and Production Engineering, Programmable logic controller, Ladder diagram, Very high-speed circuit design hard description language, Field programmable gate array, Condensed simultaneity graph, Finite state machine

Popis souboru: application/pdf

Přístupová URL adresa: https://escholarship.org/uc/item/2v64b6tc
https://escholarship.org/content/qt2v64b6tc/qt2v64b6tc.pdf

Custom Hardware Architectures for Deep Learning on Portable Devices: A Review.

Autoři: Zaman, Kh Shahriya Reaz, Mamun Bin Ibne Md Ali, Sawal Hamid a další

Zdroj: IEEE Transactions on Neural Networks & Learning Systems; Nov2022, Vol. 33 Issue 11, p6068-6088, 21p

Témata: DEEP learning, APPLICATION-specific integrated circuits, OBJECT recognition (Computer vision), ARTIFICIAL neural networks, GATE array circuits, IMAGE recognition (Computer vision)

Area efficient FIR filters for high speed FPGA implementation.

Autoři: Macpherson, K. N. Stewart, R. W.

Zdroj: IEE Proceedings -- Vision, Image & Signal Processing; Dec2006, Vol. 153 Issue 6, p711-720, 10p, 2 Diagrams, 2 Graphs

Témata: FIELD programmable gate arrays, PROGRAMMABLE logic devices, APPLICATION-specific integrated circuits, INFORMATION technology, SIGNAL processing, SIGNAL theory

Final Report for "Software Tools for Advanced Accelerator Control and Instrumentation Modules Using Programmable Logic"

Přispěvatelé: Messmer, Peter

Popis souboru: Medium: ED

Přístupová URL adresa: http://www.osti.gov/scitech/servlets/purl/918873

SPIHT Image Compression on FPGAs.

Autoři: Fry, Thomas W. Hauck, Scott A.

Zdroj: IEEE Transactions on Circuits & Systems for Video Technology; Sep2005, Vol. 15 Issue 9, p1138-1147, 10p

Témata: FIELD programmable gate arrays, GATE array circuits, DATA compression, IMAGE compression, ELECTRONIC circuits, INTEGRATED circuits

Iris Recognition Using Parallel and Sequential Logic in a Reconfigurable Logic Device

Autoři: NAVAL ACADEMY ANNAPOLIS MD Ulis, Bradley J

Zdroj: DTIC

Témata: Biomedical Instrumentation and Bioengineering, BIOMETRY, ALGORITHMS, FIELD PROGRAMMABLE GATE ARRAYS, INTEGRATED CIRCUITS, IRIS, LOGIC, PARALLEL PROCESSING, RECOGNITION, IRIS RECOGNITION, SYSTOLIC ARCHITECTURE, FINITE IMPULSE RESPONSE FILTERING, BINARY MORPHOLOGY, Text

URL: https://apps.dtic.mil/docs/citations/ADA549044

Towards the development of flexible, reliable, reconfigurable, and high-performance imaging systems

Autoři: Khalifat, Jalal Mohamed Arslan, Tughrul Hamilton, Alister

Přispěvatelé: Khalifat, Jalal Mohamed Arslan, Tughrul Hamilton, Alister

Témata: 621.39, FPGA, imaging systems

Přístupová URL adresa: https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.721151

Towards the development of a reliable reconfigurable real-time operating system on FPGAs

Autoři: Hong, Chuan Hamilton, Alister Arslan, Tughrul

Přispěvatelé: Hong, Chuan Hamilton, Alister Arslan, Tughrul

Témata: 621.39, Reconfigurable Computing, FPGAs, Field Programmable Gate Arrays, circuit design, embedded system, System on Chip, SoC, hardware/software co-design, High-performance computing

Přístupová URL adresa: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.615404

Scalable phylogeny reconstruction with disaggregated near-memory processing

Autoři: Alachiotis Nikolaos() Skrimponis Panagiotis() Πισσαδακης Εμμανουηλ(http://users.isc.tuc.gr/~epissadakis) a další

Témata: Phylogenetics, Hardware → Reconfigurable logic applications, Hardware → Integrated circuits, Hardware → Reconfigurable logic and FPGAs, Computer systems organization → Reconfigurable computing, dReDBox, Computer systems organization → Architectures, Disaggregated datacenter, Near-memory processing, RAxML

Popis souboru: application/pdf

Přístupová URL adresa: http://purl.tuc.gr/dl/dias/55F291BA-07D1-4EDD-80CE-14BA2CC2F080