Suchergebnisse - Hardware Hardware validation Functional verification

A Perspective on Software-in-the-Loop and Hardware-in-the-Loop Within Digital Twin Frameworks for Automotive Lighting Systems

Autoren: Balan, George Neninger, Philipp Ruiz Zúñiga, Enrique et al.

Quelle: “Boosting Ingenium for Excellence” (BI4E) project Applied Sciences. 15(15)

Schlagwörter: automotive, digital twin, hardware-in-the-loop, headlamps, software-in-the-loop, Data flow analysis, Embedded systems, Hardware-in-the-loop simulation, Headlights, Integration, Life cycle, Lighting fixtures, Regulatory compliance, Verification, Virtual reality, Automotive lighting system, Automotives, Functional performance, Hardware in the loops, Hardware-in-the-loop testing, Headlamp, Software in the loops, Structured integration, Validation strategies, Work-flows, Integration testing, Virtual Production Development (VPD)

Dateibeschreibung: electronic

Zugangs-URL: https://urn.kb.se/resolve?urn=urn:nbn:se:his:diva-25764
https://doi.org/10.3390/app15158445

Directed Test Generation for Hardware Validation: A Survey.

Autoren: Jayasena, Aruna Mishra, Prabhat

Quelle: ACM Computing Surveys. May2024, Vol. 56 Issue 5, p1-36. 36p.

Schlagwörter: *GRAPH neural networks, *COMPUTER hardware description languages, *SINGLE event effects, *SYMMETRIC-key algorithms, *PUBLIC key cryptography, *DEBUGGING

The AI Act and The Agile Safety Plan

Autoren: Myklebust, Thor Stålhane, Tor Vatn, Dorthea Mathilde Kristin

Schlagwörter: functional safety, software safety, safety-critical systems, software verification and validation, risk management, safety documents, Software Engineering, Computer security, Risk assessment, Network security, Computer hardware

Dateibeschreibung: application/pdf

Relation: SpringerBriefs in Computer Science

Zugangs-URL: https://library.oapen.org/handle/20.500.12657/98581

A Survey on Assertion-based Hardware Verification

Autoren: Witharana, Hasini Lyu, Yangdi Charles, Subodha et al.

Index Begriffe: Hardware verification, Article

URL: http://repository.hkust.edu.hk/ir/Record/1783.1-121162
https://doi.org/10.1145/3510578
http://lbdiscover.ust.hk/uresolver?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rfr_id=info:sid/HKUST:SPI&rft.genre=article&rft.issn=0360-0300&rft.volume=54&rft.issue=11s&rft.date=2022&rft.spage=1&rft.aulast=Witharana&rft.aufirst=Hasini&rft.atitle=A+Survey+on+Assertion-based+Hardware+Verification&rft.title=ACM+Computing+Surveys
http://gateway.isiknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=LinksAMR&SrcApp=PARTNER_APP&DestLinkType=FullRecord&DestApp=WOS&KeyUT=000886929000006
http://www.scopus.com/record/display.url?eid=2-s2.0-85150168199&origin=inward

Layered Verification Strategies for AI Accelerator Hardware: Matrix Engines and SRAM Buffers

Autoren: Kaushik Velapa Reddy

Quelle: Journal of Computer Science and Technology Studies; Vol. 7 No. 5; 786-795; 2709-104X

Index Begriffe: Ai Accelerator Verification, Layered Verification Methodology, Matrix Compute Engines, Sram Buffer Verification, Synchronization Bug Detection., info:eu-repo/semantics/article, info:eu-repo/semantics/publishedVersion

URL: https://al-kindipublisher.com/index.php/jcsts/article/view/9882
https://al-kindipublisher.com/index.php/jcsts/article/view/9882/8567
https://al-kindipublisher.com/index.php/jcsts/article/view/9882/8567

Assertion-Based Verification of I2C Module Using SystemVerilog.

Autoren: Moon, Dae-Won Pyo, Seung-Hyun Hong, Dae-Ki et al.

Quelle: Electronics (2079-9292); Apr2025, Vol. 14 Issue 8, p1687, 32p

Schlagwörter: FACE-to-face communication, OBJECT-oriented programming, SEMICONDUCTORS, SYNTAX (Grammar), HARDWARE

Pre-validation of SoC via hardware and software co-simulation

Autoren: Karmitsa, V. (Valtteri)

Index Begriffe: Sähkötekniikka, info:eu-repo/semantics/masterThesis, info:eu-repo/semantics/publishedVersion

URL: http://jultika.oulu.fi/Record/nbnfioulu-202311173240

Functional validation of mixed hardware/software systems based on specification, partitioning, and simulation of test cases

Autoren: Jantsch, Axel Notbauer, J. Albrecht, T.

Quelle: Design automation for embedded systems. 5(1):83-113

Schlagwörter: system validation, test case development, HW/SW codesign

Dateibeschreibung: print

Zugangs-URL: https://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-19581

Synchronization and hardware validation in electrically coupled Aihara networks.

Autoren: Li, Jiaxin Min, Fuhong Yang, Xilin

Quelle: European Physical Journal Plus; Sep2025, Vol. 140 Issue 9, p1-17, 17p

Evaluating LLMs for Hardware Design and Test

Autoren: Blocklove, Jason Garg, Siddharth Karri, Ramesh et al.

Index Begriffe: Computer Science - Hardware Architecture, Computer Science - Artificial Intelligence, Computer Science - Computation and Language, Computer Science - Machine Learning, Computer Science - Programming Languages, text

URL: http://arxiv.org/abs/2405.02326

Coverage Fulfillment Automation in Hardware Functional Verification Using Genetic Algorithms.

Autoren: Danciu, Gabriel Mihail Dinu, Alexandru

Quelle: Applied Sciences (2076-3417); Feb2022, Vol. 12 Issue 3, p1559, 23p

Schlagwörter: INTEGRATED circuit verification, GENETIC algorithms, INTEGRATED circuits manufacturing

TLM.open: a SystemC/TLM Frontend for the CADP Verification Toolbox

Autoren: Helmstetter, Claude

Quelle: Leibniz Transactions on Embedded Systems; Vol. 1 No. 1 (2014); 02:1-02:18 ; 2199-2002 ; 10.4230/LITES-v001-i001

Schlagwörter: Model checking, Verification, Simulation, SystemC, Transactional modeling, Hardware, Hardware validation, Functional verification, Transaction-level verification

Dateibeschreibung: application/pdf

Relation: https://ojs.dagstuhl.de/index.php/lites/article/view/LITES-v001-i001-a002/lites-v001-i001-a002-pdf

Verfügbarkeit: https://ojs.dagstuhl.de/index.php/lites/article/view/LITES-v001-i001-a002
https://doi.org/10.4230/LITES-v001-i001-a002

Artificial Intelligence Application in the Field of Functional Verification.

Autoren: Dranga, Diana Dumitrescu, Catalin

Quelle: Electronics (2079-9292); Jun2024, Vol. 13 Issue 12, p2361, 14p

Schlagwörter: ARTIFICIAL intelligence, CONVOLUTIONAL neural networks, INTEGRATED circuit verification, DATABASES, RESEARCH personnel

Sensor-Level Anomaly Detection in DC–DC Buck Converters with a Physics-Informed LSTM: DSP-Based Validation of Detection and a Simulation Study of CI-Guided Deception.

Autoren: Moon, Jeong-Hoon Kim, Jin-Hong Lee, Jung-Hwan

Quelle: Applied Sciences (2076-3417); Oct2025, Vol. 15 Issue 20, p11112, 34p

Schlagwörter: DC-to-DC converters, OUTLIER detection, SIMULATION methods & models, DIGITAL signal processing

Model of an Open-Source MicroPython Library for GSM NB-IoT.

Autoren: Lupandin, Antonii Kopieikin, Volodymyr Khruslov, Maksym et al.

Quelle: Sensors (14248220); Sep2025, Vol. 25 Issue 17, p5322, 20p

Schlagwörter: INTERNET of things, GSM communications, MACHINE-to-machine communications, PROGRAMMING languages, KNOWLEDGE base, OPEN source software, SINGLE-board computers

Portable gait-asymmetry detection using lowcost hardware and machine learning.

Autoren: Machado Carneiro, Victor Lange Chillón Geck, Carlos Kern, Thorsten A.

Quelle: Current Directions in Biomedical Engineering; Sep2025, Vol. 11 Issue 1, p540-543, 4p

CFIEE: An Open-Source Critical Metadata Extraction Tool for RISC-V Hardware-Based CFI Schemes.

Autoren: Li, Wenxin Wang, Weike Li, Senyang

Quelle: Electronics (2079-9292); May2024, Vol. 13 Issue 9, p1681, 20p

Schlagwörter: METADATA, FLOWGRAPHS

Advancing Goat Genomics Verification and Applying GBTS Liquid Chip for Precision Breeding.

Autoren: Aziz, Umar Rehman, Abdul Xu, Xiaolong et al.

Quelle: Journal of Veterinary Physiology & Pathology. 2025, Vol. 4 Issue 3, p20-30. 11p.

Functional Verification of Large-integers Circuits using a Cosimulation-based Approach.

Autoren: Alimi, Nejmeddine Lahbib, Younes Machhout, Mohsen et al.

Quelle: International Journal of Electrical & Computer Engineering (2088-8708); Aug2017, Vol. 7 Issue 4, p2192-2205, 14p

Schlagwörter: CRYPTOGRAPHY, RATIONAL numbers, COMPUTER hardware description languages, COMPUTATIONAL fluid dynamics, NUMERICAL solutions to functional equations

Reviews & Products: MATLAB (Computer software)

Fundamental Approaches to Software Engineering : 23rd International Conference, FASE 2020, Held As Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2020, Dublin, Ireland, April 25–30, 2020, Proceedings

Autoren: Heike Wehrheim Jordi Cabot

Resource Type: eBook.

Schlagworte: Software engineering--Congresses

Categories: COMPUTERS / Software Development & Engineering / General, COMPUTERS / Artificial Intelligence / General, COMPUTERS / Computer Architecture, COMPUTERS / Networking / General, COMPUTERS / Hardware / General