Search Results - Field Programming gate array

Accelerating many-core, heterogeneous, and distributed architectures with hardware runtimes and programming models

Authors: De Haro Ruiz, Juan Miguel

Contributors: University/Department: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors

Thesis Advisors: Álvarez Martínez, Carlos, Jiménez González, Daniel

Source: TDX (Tesis Doctorals en Xarxa)

Subject Terms: High Performance Computing (HPC), Field-Programmable Gate Array (PFGA), task scheduling, task-based programming models, computer architecture, CPU, MPI, High-Level Synthesis (HLS), energy efficiency, programmability, many-core architectures, FPGA clusters, hardware runtimes, hardware acceleration, ASIC, Implicit Message Passing (IMP), Àrees temàtiques de la UPC::Informàtica, 004 - Informàtica

File Description: application/pdf

Access URL: http://hdl.handle.net/10803/695347
https://dx.doi.org/10.5821/dissertation-2117-442722

Development of optical signal regeneration technique using ultrascale field programming gate array

Authors: Das, B. Abdullah, M.F.L.

Source: Journal of Fundamental and Applied Sciences; Vol 10, No 2 (2018)

Subject Terms: 0211 other engineering and technologies, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, Bit Error Rate (BER), Differential Phase Shift Keying (DPSK) signal, Optical Signal Regeneration, Field Programming Gate Array

File Description: application/pdf

Access URL: https://www.ajol.info/index.php/jfas/article/view/172078

Comparison of the Single Event Upset Characters of the First-In First-Out in the Virtex-5 Field Programming Gate Array

Authors: Eun Sup Sim Sung-Sae Lee Seung-Hun Lee et al.

Source: New Physics: Sae Mulli. 61:114-118

Access URL: http://www.npsm-kps.org/journal/DOIx.php?id=10.3938/NPSM.61.114

High Speed and Performance analysis of Multiplier in Field Programming Gate Array

Authors: Kehkeshan Jalall S M Gowthami K Kiruthika et al.

Source: IOP Conference Series: Materials Science and Engineering. 1084:012062

Subject Terms: 0103 physical sciences, 01 natural sciences

Access URL: https://iopscience.iop.org/article/10.1088/1757-899X/1084/1/012062/pdf
https://internal.iopscience.iop.org/article/10.1088/1757-899X/1084/1/012062
https://ui.adsabs.harvard.edu/abs/2021MS&E.1084a2062G/abstract
https://robots.iopscience.iop.org/article/10.1088/1757-899X/1084/1/012062/pdf
https://robots.iopscience.iop.org/article/10.1088/1757-899X/1084/1/012062

Field Programmable Gate Array Reliability Analysis Guidelines for Launch Vehicle Reliability Block Diagrams

Authors: Al Hassan, Mohammad Britton, Paul Hatfield, Glen Spencer et al.

Subject Terms: Launch Vehicles And Launch Operations, Computer Programming And Software

Relation: Field Programmable Gate Array Reliability Analysis Guidelines for Launch Vehicle Reliability Block Diagram

Access URL: https://ntrs.nasa.gov/citations/20170012468

FPGA-Based Smart Health Monitoring Systems for Wearable Devices

Authors: Muthukumaran Vaithianathan

Source: International Journal of Intelligent Systems and Applications in Engineering; Vol. 12 No. 4 (2024); 4154-4161

Subject Terms: Field Programming Gate Array (FPGA), Heart Rate Monitoring, Power Consumption, Sensor Integration, Wearable Technology

File Description: application/pdf

Access URL: https://www.ijisae.org/index.php/IJISAE/article/view/7011

Green Communication with Field-programmable Gate Array for Sustainable Development

Authors: Bishwajeet Pandey Keshav Kumar

Resource Type: eBook.

Subjects: Wireless communication systems--Energy conservation, Radio circuits--Equipment and supplies, Field programmable gate arrays

Categories: TECHNOLOGY & ENGINEERING / Telecommunications, TECHNOLOGY & ENGINEERING / Electrical, TECHNOLOGY & ENGINEERING / Electronics / General, TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI

Implementation of Carrier-Based Simple Boost Pulse Width Modulation (PWM) for Z-Source Inverter (ZSI) using Field Programming Gate Array (FPGA)

Authors: Auzani Jidin Musbahu Muhammad Zulhani Rasin

Source: IOP Conference Series: Materials Science and Engineering. 226:012141

Subject Terms: 03 medical and health sciences, 0302 clinical medicine, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 7. Clean energy

Access URL: http://ui.adsabs.harvard.edu/abs/2017MS&E..226a2141M/abstract
https://iopscience.iop.org/article/10.1088/1757-899X/226/1/012141/pdf
http://iopscience.iop.org/article/10.1088/1757-899X/226/1/012141/meta

An Efficient Low-Power Reconfigurable Model For CMOS-Based SRAM Using FPGA

Authors: Sathyanarayana, Rekha Ramaswamy , Nataraj Kanathur Ramaswamy, Rekha Kanathur

Source: International Journal of Intelligent Systems and Applications in Engineering; Vol. 12 No. 1 (2024); 500-515

Subject Terms: Configurable Logic Blocks (CLBs), Complex Programmable Logic Devices (CPLDs), Complementary metal oxide semiconductor (CMOS), static random-access memory (SRAM), logical elements (LEs), field programming gate array (FPGA)

File Description: application/pdf

Access URL: https://www.ijisae.org/index.php/IJISAE/article/view/3948

Field-Programmable Gate Array Computer in Structural Analysis: An Initial Exploration

Authors: Singleterry, Robert C., Jr Sobieszczanski-Sobieski, Jaroslaw Brown, Samuel

Subject Terms: Computer Programming And Software

Access URL: https://ntrs.nasa.gov/citations/20030003694

Design of CSD based bi-orthogonal wavelet filter bank for medical image retrieval

Authors: Aswini Kumar Samantaray Pradeep Gorre Prabodh Kumar Sahoo

Source: e-Prime: Advances in Electrical Engineering, Electronics and Energy, Vol 5, Iss , Pp 100242- (2023)

Subject Terms: Canonical signed digit, Bi-orthogonal wavelet, Field Programming gate array, Image retrieval, Electrical engineering. Electronics. Nuclear engineering, TK1-9971

File Description: electronic resource

Relation: http://www.sciencedirect.com/science/article/pii/S2772671123001377; https://doaj.org/toc/2772-6711

Access URL: https://doaj.org/article/968883eed26543c9809afa4d8b9c4b7d

A Hardware Implementation of a Genetic Programming System Using FPGAs and Handel-C: A hardware implementation of a genetic programming system using FPGAs and Handel-C

Authors: Peter Martin

Source: Genetic Programming and Evolvable Machines. 2:317-343

Subject Terms: Computer system organization, field programmable gate array, Other programming paradigms (object-oriented, sequential, concurrent, automatic, etc.), Learning and adaptive systems in artificial intelligence, 0202 electrical engineering, electronic engineering, information engineering, genetic programming, 02 engineering and technology, Nonnumerical algorithms

File Description: application/xml

Access URL: https://zbmath.org/1713981
https://doi.org/10.1023/a:1012942304464
https://link.springer.com/content/pdf/10.1023/A:1012942304464.pdf
https://link.springer.com/article/10.1023/A:1012942304464
https://dblp.uni-trier.de/db/journals/gpem/gpem2.html#Martin01

Fundamentals of VHDL for FPGA Programming Using Vivado

Authors: Majid Pakdel

Resource Type: eBook.

Subjects: Field programmable gate arrays, VHDL (Computer hardware description language)

Categories: COMPUTERS / Computer Architecture, COMPUTERS / Software Development & Engineering / Tools, TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated

Hardware implementation for fast convolution with a PN code using field programming gate array

Authors: Abdulqadir Alaqeeli Janusz Starzyk The Pennsylvania State University CiteSeerX Archives

Contributors: Abdulqadir Alaqeeli Janusz Starzyk The Pennsylvania State University CiteSeerX Archives

Source: http://www.ohio.edu/people/starzykj/network/Research/Papers/Recent conferences/Conv_FPGA_PN_code_SSST2001.pdf.

File Description: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.418.5404; http://www.ohio.edu/people/starzykj/network/Research/Papers/Recent conferences/Conv_FPGA_PN_code_SSST2001.pdf

Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.418.5404
http://www.ohio.edu/people/starzykj/network/Research/Papers/Recent conferences/Conv_FPGA_PN_code_SSST2001.pdf

Efficient Edge-AI Application Deployment for FPGAs †.

Authors: Kalapothas, Stavros Flamis, Georgios Kitsos, Paris

Source: Information. Jun2022, Vol. 13 Issue 6, p279. 12p.

Subject Terms: *Artificial neural networks, *Artificial intelligence, *Machine learning, Application-specific integrated circuits, Field programmable gate arrays, Microcontrollers, Python programming language

Survey on object detection in VLSI architecture through deep learning.

Authors: Francis, Neethu C. Mathana, J. M.

Source: AIP Conference Proceedings; 2024, Vol. 3044 Issue 1, p1-9, 9p

Subject Terms: OBJECT recognition (Computer vision), COMPUTER vision, GATE array circuits, VERY large scale circuit integration, ALGORITHMS, DEEP learning

An efficient reconfigurable code rate cooperative low-density parity check codes for gigabits wide code encoder/decoder operations

Authors: Divyashree Yamadur, Venkatesh orcid:0000-0001-5056- Komala, Mallikarjunaiah et al.

Subject Terms: Bit error rate, Field programming gate array, Frame error rate, Low-density-parity-check, Signal to noise ratio

Relation: https://zenodo.org/records/10435268; oai:zenodo.org:10435268

Availability: https://doi.org/10.11591/ijece.v13i6.pp6369-6377
https://zenodo.org/records/10435268

FPGA based fast integrated real-time multi coincidence counter using a time-to-digital converter

Authors: Arabul, Ekin Rarity, John Dahnoun, Naim et al.

Contributors: Arabul, Ekin Rarity, John Dahnoun, Naim et al.

Source: Arabul, E, Rarity, J & Dahnoun, N 2018, FPGA based fast integrated real-time multi coincidence counter using a time-to-digital converter . in L Jozwiak, B Lutovac, D Jurisic & R Stojanovic (eds), 2018 7th Mediterranean Conference on Embedded Computing (MECO 2018) : Proceedings of a meeting held 10-14 June 2018, Budva, Montenegro . Institute of Electrical and Electronics Engineers (IEEE), pp. 412-415, 7th Mediterranean Conference on Embedded Computing, MECO 2018, Budva, Montenegro, 10/06/18 . https://doi.org/10.1109/MECO.2018.8406094

Subject Terms: name=Photonics and Quantum, Coincidence Counting, 02 engineering and technology, name=QETLabs, 01 natural sciences, name=Bristol Quantum Information Institute, Avalanche Photo Diode, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Field Programming Gate Array, Coincidence Detection, Time-to-Digital Converter, Positron Emission Tomography

File Description: application/pdf

Access URL: https://research-information.bris.ac.uk/ws/files/154521937/Ekin_Arabul_FPGA_based_Fast_Integrated_Real_Time_Multi_Coincidence_Counter_Using_a_Time_to_Digital_Converter.pdf
https://research-information.bris.ac.uk/files/154521937/Ekin_Arabul_FPGA_based_Fast_Integrated_Real_Time_Multi_Coincidence_Counter_Using_a_Time_to_Digital_Converter.pdf
https://ieeexplore.ieee.org/document/8406094/
https://research-information.bris.ac.uk/en/publications/fpga-based-fast-integrated-real-time-multi-coincidence-counter-us
https://research-information.bris.ac.uk/en/publications/fpga-based-fast-integrated-realtime-multi-coincidence-counter-using-a-timetodigital-converter(e4476d42-bca3-4f6a-b900-620b18f1aa49).html
https://research-information.bristol.ac.uk/en/publications/fpga-based-fast-integrated-realtime-multi-coincidence-counter-using-a-timetodigital-converter(e4476d42-bca3-4f6a-b900-620b18f1aa49).html
https://hdl.handle.net/1983/e4476d42-bca3-4f6a-b900-620b18f1aa49
http://www.scopus.com/inward/record.url?scp=85050695979&partnerID=8YFLogxK

The Once-Only Principle

Contributors: Krimmer, Robert Prentza, Andriana Mamrot, Szymon

Subject Terms: Computer Applications, Special Purpose and Application-Based Systems, Programming Techniques, Software Engineering/Programming and Operating Systems, Computer Application in Administrative Data Processing, Computer and Information Systems Applications, Software Engineering, access control, communication systems, computer systems, cryptography, databases, Field Programmable Gate Array (FPGA), gateways (computer networks), information systems, internet protocols, network protocols, object-oriented design, object-oriented programming, object-oriented programming languages, signal processing, social networks, software architecture, software design, system architectures, Information technology: general issues, Expert systems / knowledge-based systems, Computer programming / software engineering, Operating systems, Information technology: general topics

File Description: application/pdf

Relation: Lecture Notes in Computer Science; Information Systems and Applications, incl. Internet/Web, and HCI

Access URL: https://library.oapen.org/handle/20.500.12657/50047

Implementation Of Carrier-Based Simple Boost Pulse Width Modulation (PWM) For Z-Source Inverter (ZSI) Using Field Programming Gate Array (FPGA)

Authors: Muhammad, M Rasin, Zulhani Jidin, Auzani

Subject Terms: T Technology (General), TK Electrical engineering. Electronics Nuclear engineering

File Description: text

Relation: http://eprints.utem.edu.my/id/eprint/20908/2/Muhammad_2017_IOP_Conf._Ser.__Mater._Sci._Eng._226_012141%281%29.pdf; Muhammad, M and Rasin, Zulhani and Jidin, Auzani (2017) Implementation Of Carrier-Based Simple Boost Pulse Width Modulation (PWM) For Z-Source Inverter (ZSI) Using Field Programming Gate Array (FPGA). IOP Conference Series: Materials Science And Engineering, 226. 012141. ISSN 1757-8981

Availability: http://eprints.utem.edu.my/id/eprint/20908/
http://eprints.utem.edu.my/id/eprint/20908/2/Muhammad_2017_IOP_Conf._Ser.__Mater._Sci._Eng._226_012141%281%29.pdf
http://iopscience.iop.org/article/10.1088/1757-899X/226/1/012141/meta