Search Results - ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.6: Optimization

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  1. 1

    The Tapenade Automatic Differentiation tool: principles, model, and specification

    Authors: Hascoet, Laurent Pascual, Valérie Program transformations for scientific computing (SCIPORT) et al.

    Contributors: Hascoet, Laurent Pascual, Valérie Program transformations for scientific computing (SCIPORT) et al.

    Source: ISSN: 0098-3500 ; ACM Transactions on Mathematical Software ; https://inria.hal.science/hal-00913983 ; ACM Transactions on Mathematical Software, 2013, 39 (3), ⟨10.1145/2450153.2450158⟩.

    Subject Terms: Adjoint compiler, Source transformation, Algorithmic Differentiation, ACM: G.: Mathematics of Computing/G.1: NUMERICAL ANALYSIS/G.1.4: Quadrature and Numerical Differentiation, ACM: D.: Software/D.1: PROGRAMMING TECHNIQUES/D.1.2: Automatic Programming, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, ACM: F.: Theory of Computation/F.3: LOGICS AND MEANINGS OF PROGRAMS/F.3.1: Specifying and Verifying and Reasoning about Programs, ACM: F.: Theory of Computation/F.3: LOGICS AND MEANINGS OF PROGRAMS/F.3.2: Semantics of Programming Languages, ACM: G.: Mathematics of Computing/G.1: NUMERICAL ANALYSIS/G.1.6: Optimization, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation

    Availability: https://inria.hal.science/hal-00913983
    https://inria.hal.science/hal-00913983v1/document
    https://inria.hal.science/hal-00913983v1/file/tapenadeRefV2.pdf
    https://doi.org/10.1145/2450153.2450158

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  2. 2

    Divergence Analysis

    Authors: Sampaio, Diogo de Souza, Rafael, Martins Collange, Caroline et al.

    Contributors: Sampaio, Diogo de Souza, Rafael, Martins Collange, Caroline et al.

    Source: ISSN: 0164-0925.

    Subject Terms: affine vector, scalarization, Static program analysis, divergence analysis, SIMD, graphics processing units, register allocation, scalarizing compiler, D34 [Software]: Programming Languages General Terms: Languages, Design, Algorithms, Performance Additional Key Words and Phrases: Static program analysis, high performance, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.1: Compilers, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.6: Optimization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.7: Single-instruction-stream, multiple-data-stream processors (SIMD), [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

    Availability: https://inria.hal.science/hal-00909072
    https://inria.hal.science/hal-00909072v3/document
    https://inria.hal.science/hal-00909072v3/file/Sampaio_DivergenceAnalysis_TOPLAS14.pdf
    https://doi.org/10.1145/2523815

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  3. 3

    An Optimization Framework for Embedded Processors with Auto-Addressing Mode.

    Authors: XIAOTONG ZHUANG PANDE, SANTOSH

    Source: ACM Transactions on Programming Languages & Systems; Apr2010, Vol. 32 Issue 4, p11-11.41, 41p, 10 Diagrams, 8 Charts, 9 Graphs

    Subject Terms: EMBEDDED computer systems, SERVICE-oriented architecture (Computer science), DIGITAL signal processing, PROGRAMMING languages, COMPUTER programming, COMPUTER software

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  4. 4

    Minimal Unroll Factor for Code Generation of Software Pipelining

    Authors: Bachir, Mounira Touati, Sid Frédéric, Brault et al.

    Contributors: Bachir, Mounira Touati, Sid Frédéric, Brault et al.

    Source: ISSN: 0885-7458.

    Subject Terms: Periodic register allocation, Software pipelining, Code generation, Instruction level parallelism, Embedded systems, Compilation, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.0: Code generation, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.1: Compilers, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.6: Optimization, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-PF]Computer Science [cs]/Performance [cs.PF]

    Availability: https://inria.hal.science/hal-00764521
    https://inria.hal.science/hal-00764521v1/document
    https://inria.hal.science/hal-00764521v1/file/mainSubmitMinPPCMJounal.pdf
    https://doi.org/10.1007/s10766-012-0203-z

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  5. 5

    Compiler Mitigations for Time Attacks on Modern x86 Processors

    Authors: Jeroen Van Cleemput Bart Coppens Bjorn De Sutter et al.

    Contributors: Jeroen Van Cleemput Bart Coppens Bjorn De Sutter et al.

    Source: http://users.elis.ugent.be/~brdsutte/research/publications/2012TACOvancleemput.pdf.

    Subject Terms: Categories and Subject Descriptors, D.2.0 [Software Engineering, General—Protection mechanisms, D.3.4 [Programming Languages, Processors—Code generation, compilers, optimization General Terms, Experimentation, Measurement, Security Additional Key Words and Phrases, Time-based side channels, x86 architecture, variable latency instructions ACM Reference Format

    File Description: application/pdf

    Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.306.7302; http://users.elis.ugent.be/~brdsutte/research/publications/2012TACOvancleemput.pdf

    Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.306.7302
    http://users.elis.ugent.be/~brdsutte/research/publications/2012TACOvancleemput.pdf

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  6. 6

    Speculatively Vectorized Bytecode

    Authors: Rohou, Erven Dyshel, Sergei Nuzman, Dorit et al.

    Contributors: Rohou, Erven Dyshel, Sergei Nuzman, Dorit et al.

    Source: International Conference on High-Performance and Embedded Architectures and Compilers ; https://inria.hal.science/inria-00525139 ; International Conference on High-Performance and Embedded Architectures and Compilers, Manolis Katevenis and Margaret Martonosi, Jan 2011, Heraklion, Greece

    Subject Terms: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.7: Single-instruction-stream, multiple-data-stream processors (SIMD), ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.13: Reusable Software, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.0: Code generation, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.1: Compilers, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.6: Optimization, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH]

    Subject Geographic: Heraklion, Greece

    Relation: info:eu-repo/grantAgreement//26535/EU/High-Performance Embedded Architectures and Compilers/HIPEAC

    Availability: https://inria.hal.science/inria-00525139
    https://inria.hal.science/inria-00525139/document
    https://inria.hal.science/inria-00525139/file/Rohou-HiPEAC11.pdf

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  7. 7

    Intermediate Representations for Explicitly Parallel Programs.

    Authors: SUSUNGI, ADILLA TADONKI, CLAUDE

    Source: ACM Computing Surveys; Jun2022, Vol. 54 Issue 5, p1-24, 24p

    Subject Terms: PROGRAMMING languages, MULTICORE processors, PARALLEL programming, COMPILERS (Computer programs)

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  8. 8

    OpenCL-Based FPGA-Platform for Stencil Computation and Its Optimization Methodology.

    Authors: Waidyasooriya, Hasitha Muthumala Takei, Yasuhiro Tatsumi, Shunsuke et al.

    Source: IEEE Transactions on Parallel & Distributed Systems; May2017, Vol. 28 Issue 5, p1390-1402, 13p

    Subject Terms: CENTRAL processing units, MULTICORE processors, PROGRAMMING languages, DEBUGGING, APPLICATION software

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  9. 9

    Halide: Decoupling Algorithms from Schedules for High-Performance Image Processing.

    Authors: Ragan-Kelley, Jonathan Adams, Andrew Sharlet, Dillon et al.

    Source: Communications of the ACM; Jan2018, Vol. 61 Issue 1, p106-115, 10p, 3 Diagrams, 1 Graph

    Subject Terms: MATHEMATICAL decoupling, ALGORITHMS, IMAGE processing, COMPUTER scheduling, HIGH performance processors, COMPUTER vision, PROGRAMMING languages, COMPUTATIONAL photography, MATHEMATICS

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  10. 10

    MAXIMUM PIPELINING OF ARRAY COMPUTATION: A PIPELINED CODE MAPPING SCHEME FOR DATAFLOW COMPUTERS.

    Authors: Gao, Guang R.

    Source: INFOR; May89, Vol. 27 Issue 2, p145-172, 28p

    Subject Terms: DATA flow computing, PIPELINE computers, ARRAY processors, CODING theory, COMPUTER programming, PROGRAMMING languages, COMPUTER software development, MATHEMATICAL optimization

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  11. 11

    Genetic Heuristics for Reducing Memory Energy Consumption in Embedded Systems

    Authors: Idrissi Aouad, Maha Schott, René Zendra, Olivier et al.

    Contributors: Idrissi Aouad, Maha Schott, René Zendra, Olivier et al.

    Source: ICSOFT 2010 - 5th International Conference on Software Engineering and Data Technologies ; https://inria.hal.science/inria-00516396 ; ICSOFT 2010 - 5th International Conference on Software Engineering and Data Technologies, Jul 2010, Athens, Greece. pp.394-402

    Subject Terms: optimizations, memory allocation management, Genetic heuristics, Energy consumption reduction, ACM: B.: Hardware/B.3: MEMORY STRUCTURES/B.3.2: Design Styles/B.3.2.1: Cache memories, ACM: B.: Hardware/B.3: MEMORY STRUCTURES/B.3.1: Semiconductor Memories/B.3.1.2: Static memory (SRAM), ACM: G.: Mathematics of Computing/G.2: DISCRETE MATHEMATICS/G.2.1: Combinatorics/G.2.1.0: Combinatorial algorithms, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.8: Problem Solving, Control Methods, and Search/I.2.8.3: Graph and tree search strategies, ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.8: Metrics/D.2.8.1: Performance measures, ACM: D.: Software/D.1: PROGRAMMING TECHNIQUES/D.1.0: General, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI], [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL], [MATH.MATH-OC]Mathematics [math]/Optimization and Control [math.OC], [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation

    Subject Geographic: Athens, Greece

    Availability: https://inria.hal.science/inria-00516396

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  12. 12

    Register allocation by graph coloring under full live-range splitting

    Authors: Blazy, Sandrine Robillard, Benoît Programming languages, types, compilation and proofs (GALLIUM) et al.

    Contributors: Blazy, Sandrine Robillard, Benoît Programming languages, types, compilation and proofs (GALLIUM) et al.

    Source: ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded systems (LCTES'2009) ; https://inria.hal.science/inria-00387749 ; ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded systems (LCTES'2009), ACM, Jun 2009, Dublin, Ireland

    Subject Terms: register allocation, coalescing, graph reduction, ACM: D.: Software, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, ACM: G.: Mathematics of Computing/G.2: DISCRETE MATHEMATICS, ACM: G.: Mathematics of Computing/G.2: DISCRETE MATHEMATICS/G.2.2: Graph Theory, [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL]

    Subject Geographic: Dublin, Ireland

    Availability: https://inria.hal.science/inria-00387749
    https://inria.hal.science/inria-00387749v1/document
    https://inria.hal.science/inria-00387749v1/file/LCTES09.pdf

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  13. 13

    Proceedings of the ACM Programming Languages and Pragmatics Conference.

    Authors: Forsythe, George E.

    Source: Communications of the ACM; Mar1966, Vol. 9 Issue 3, p137-138, 2p

    Subject Terms: CONFERENCES & conventions, COMPUTER software, PROGRAMMING languages, PRAGMATICS, COMMITTEES

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  14. 14

    Software Pipelining in Nested Loops with Prolog-Epilog Merging

    Authors: Fellahi, Mohammed Cohen, Albert Architectures, Languages and Compilers to Harness the End of Moore Years (ALCHEMY) et al.

    Contributors: Fellahi, Mohammed Cohen, Albert Architectures, Languages and Compilers to Harness the End of Moore Years (ALCHEMY) et al.

    Source: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://inria.hal.science/inria-00445489 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_8⟩

    Subject Terms: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

    Subject Geographic: Paphos, Cyprus

    Availability: https://inria.hal.science/inria-00445489
    https://doi.org/10.1007/978-3-540-92990-1_8

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  15. 15

    Efficient data race detection for async-finish parallelism.

    Authors: Raman, Raghavan Zhao, Jisheng Sarkar, Vivek et al.

    Source: Formal Methods in System Design; Dec2012, Vol. 41 Issue 3, p321-347, 27p

    Subject Terms: PARALLEL programming, RUN time systems (Computer science), MULTICORE processors, DEVELOPMENT of application software, PARALLEL algorithms, PROGRAMMING languages

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  16. 16

    PPMexe: Program Compression

    Authors: Milenko Drinić Darko Kirovski Hoi Vo et al.

    Contributors: Milenko Drinić Darko Kirovski Hoi Vo et al.

    Source: http://research.microsoft.com/users/darkok/papers/p1-drinic.pdf.

    Subject Terms: Categories and Subject Descriptors, D.2.7 [Software Engineering, Distribution, Maintenance, and Enhancement, D.3.4 [Programming Languages, Processors—Optimization, E.4 [Data, Coding and Information Theory—Data compaction and compression General Terms, Algorithms, Performance Additional Key Words and Phrases, Instruction scheduling, prediction by partial matching, random access compression, software compression, software distribution ACM Reference Format

    File Description: application/pdf

    Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.72.5522

    Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.72.5522
    http://research.microsoft.com/users/darkok/papers/p1-drinic.pdf

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  17. 17

    Efficient Utilization of SIMD Engines for General-Purpose Processors.

    Authors: Huang, Libo Wang, Zhiying Xiao, Nong et al.

    Source: Computer Journal; Aug2014, Vol. 57 Issue 8, p1141-1154, 14p

    Subject Terms: DATA, COMPUTER software, COMPUTERS, SEQUENTIAL codes, MATHEMATICAL optimization

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  18. 18

    Compilation of Stream Programs onto Scratchpad Memory Based Embedded Multicore Processors Through Retiming.

    Authors: Weijia Che Chatha, Karam

    Source: DAC: Annual ACM/IEEE Design Automation Conference; Jun2011, p122-127, 6p, 3 Diagrams, 2 Charts, 5 Graphs

    Subject Terms: STREAMING technology, MULTICORE processors, MICROPROCESSORS, SIGNAL processing, NETWORK processors, PROGRAMMING languages, BUFFER storage (Computer science)

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  19. 19

    Identifying Query Incompatibilities with Evolving XML Schemas

    Authors: Genevès, Pierre Layaïda, Nabil Quint, Vincent et al.

    Contributors: Genevès, Pierre Layaïda, Nabil Quint, Vincent et al.

    Source: Proceedings of the 2009 ACM SIGPLAN International Conference on Functional Programming ; ICFP'09 ; https://inria.hal.science/inria-00423058 ; ICFP'09, Aug 2009, Edinburgh, United Kingdom. pp.221-230, ⟨10.1145/1596550.1596583⟩

    Subject Terms: ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.4: Software/Program Verification, [INFO.INFO-DB]Computer Science [cs]/Databases [cs.DB], [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL], [INFO.INFO-WB]Computer Science [cs]/Web

    Subject Geographic: Edinburgh, United Kingdom

    Availability: https://inria.hal.science/inria-00423058
    https://inria.hal.science/inria-00423058/document
    https://inria.hal.science/inria-00423058/file/types-evolution.pdf
    https://doi.org/10.1145/1596550.1596583

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  20. 20

    Parallel Programming Patterns for Multi-Processor SoC: Application to Video Processing.

    Authors: PAULIN, PIERRE G. ÖZCAN, ALI ERDEM GAGNÉ, VINCENT et al.

    Source: ACM Transactions on Embedded Computing Systems; Jan2013, Vol. 12 Issue 1, p1-25, 25p

    Subject Terms: PARALLEL programming, SOFTWARE patterns, MULTIPROCESSORS, ITERATIVE methods (Mathematics), MULTICORE processors, MATHEMATICAL optimization

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