Výsledky vyhledávání - ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS

Optimizing DDR-SDRAM Communications at C-level for Automatically-Generated Hardware Accelerators. An Experience with the Altera C2H HLS Tool.

Autoři: Alias, Christophe Darte, Alain Plesco, Alexandru a další

Přispěvatelé: Alias, Christophe Darte, Alain Plesco, Alexandru a další

Zdroj: https://inria.hal.science/inria-00482035 ; [Research Report] RR-7281, INRIA. 2010, pp.19.

Témata: High-level synthesis, hardware accelerators, DDR-SDRAM, optimized communications, program transformation, reconfigurable architectures, FPGA, ACM: B.: Hardware/B.4: INPUT/OUTPUT AND DATA COMMUNICATIONS/B.4.1: Data Communications Devices/B.4.1.0: Processors, ACM: B.: Hardware/B.4: INPUT/OUTPUT AND DATA COMMUNICATIONS/B.4.2: Input/Output Devices/B.4.2.0: Channels and controllers, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.1: Types and Design Styles/B.7.1.1: Algorithms implemented in hardware, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.1: Types and Design Styles/B.7.1.3: Input/output circuits, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.0: Adaptable architectures, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL]

Dostupnost: https://inria.hal.science/inria-00482035
https://inria.hal.science/inria-00482035v1/document
https://inria.hal.science/inria-00482035v1/file/RR-7281.pdf

Dynamic Run-time Hardware/Software Scheduling For 3D Reconfigurable SoC

Autoři: Khuat, Quang Hai Chillet, Daniel Hubner, Michael a další

Přispěvatelé: Khuat, Quang Hai Chillet, Daniel Hubner, Michael a další

Zdroj: International Conference on Reconfigurable Computing and FPGAs (ReConFig 2014) ; https://inria.hal.science/hal-01097509 ; International Conference on Reconfigurable Computing and FPGAs (ReConFig 2014), Dec 2014, Cancun, Mexico

Témata: ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Cancun, Mexico

Dostupnost: https://inria.hal.science/hal-01097509

Circuits électroniques pour la génération de nombres aléatoires

Autoři: Tisserand, Arnaud Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources (CAIRN) Inria Rennes – Bretagne Atlantique a další

Přispěvatelé: Tisserand, Arnaud Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources (CAIRN) Inria Rennes – Bretagne Atlantique a další

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://inria.hal.science/hal-01061471 ; Techniques de l'Ingénieur, 2014, H5215.

Témata: ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://inria.hal.science/hal-01061471

A Static Analysis for the Minimization of Voters in Fault-Tolerant Circuits

Autoři: Burlyaev, Dmitry Fradet, Pascal Girault, Alain a další

Přispěvatelé: Burlyaev, Dmitry Fradet, Pascal Girault, Alain a další

Zdroj: ISSN: 2199-2002 ; Leibniz Transactions on Embedded Systems ; https://hal.inria.fr/hal-02303635 ; Leibniz Transactions on Embedded Systems, European Design and Automation Association (EDAA) \ EMbedded Systems Special Interest Group (EMSIG) and Schloss Dagstuhl -- Leibniz-Zentrum für Informatik GmbH, Dagstuhl Publishing., 2018.

Témata: ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.3: Reliability and Testing/B.7.3.2: Redundant design, ACM: F.: Theory of Computation/F.3: LOGICS AND MEANINGS OF PROGRAMS/F.3.2: Semantics of Programming Languages/F.3.2.5: Program analysis, [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: hal-02303635; https://hal.inria.fr/hal-02303635

Dostupnost: https://hal.inria.fr/hal-02303635

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits.

Autoři: Wu, Tony F. Ganesan, Karthik Hu, Yunqing Alexander a další

Zdroj: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; Apr2016, Vol. 35 Issue 4, p521-534, 14p

Témata: HARDWARE Trojans (Computers), INTEGRATED circuit protection, MALWARE, GATE array circuits, EMULATION software, SIMULATION methods & models

Architectures reconfigurables FPGA

Autoři: Sentieys, Olivier Tisserand, Arnaud Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources (CAIRN) a další

Přispěvatelé: Sentieys, Olivier Tisserand, Arnaud Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources (CAIRN) a další

Zdroj: Technologies logicielles Architectures des systèmes ; https://inria.hal.science/hal-00716772 ; Techniques de l'Ingénieur. Technologies logicielles Architectures des systèmes, H 1 196, Techniques de l'Ingénieur, pp.1-22, 2012

Témata: ACM: B.: Hardware/B.1: CONTROL STRUCTURES AND MICROPROGRAMMING, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics

Dostupnost: https://inria.hal.science/hal-00716772

NoC-Based Protection for SoC Time-Driven Attacks

Autoři: Sepulveda, Martha Johanna Diguet, Jean-Philippe Strum, Marius a další

Přispěvatelé: Sepulveda, Martha Johanna Diguet, Jean-Philippe Strum, Marius a další

Zdroj: IEEE Embedded Systems Letters. 7:7-10

Témata: ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Channel leakage, multiport memory, common bus, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.1: Types and Design Styles/B.7.1.7: VLSI (very large scale integration), 02 engineering and technology, 3. Good health, Network On Chip, crossbar switch), Security, 0202 electrical engineering, electronic engineering, information engineering, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.3: Interconnection architectures (e.g, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing

Přístupová URL adresa: https://hal.archives-ouvertes.fr/hal-01083270
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6994256
https://hal.inria.fr/hal-01253500
http://ieeexplore.ieee.org/document/6994256
https://ieeexplore.ieee.org/document/6994256
https://dblp.uni-trier.de/db/journals/esl/esl7.html#SepulvedaDSG15

Throughput and FIFO Sizing: an Application to Latency-Insensitive Design

Autoři: Boucaron, Julien Coadou, Anthony de Simone, Robert a další

Přispěvatelé: Boucaron, Julien Coadou, Anthony de Simone, Robert a další

Zdroj: https://inria.hal.science/inria-00381644 ; [Research Report] RR-6919, INRIA. 2009, pp.19.

Témata: FIFO sizing, Buffer sizing, Throughput, Latency-Insensitive Design, Marked Graphs, ACM: F.: Theory of Computation/F.1: COMPUTATION BY ABSTRACT DEVICES/F.1.1: Models of Computation, ACM: B.: Hardware/B.6: LOGIC DESIGN, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS, [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://inria.hal.science/inria-00381644
https://inria.hal.science/inria-00381644v1/document
https://inria.hal.science/inria-00381644v1/file/RR-6919.pdf

Analysis of Energy-Delay-Product for a 3D Vertical Nanowire FET Technology for Logic Applications

Autoři: O'Connor, Ian Stanojevic, Zlatan Baumgartner, Oskar a další

Přispěvatelé: O'Connor, Ian Stanojevic, Zlatan Baumgartner, Oskar a další

Zdroj: https://hal.science/hal-02732902 ; 2020.

Témata: ACM: B.: Hardware/B.6: LOGIC DESIGN, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics

Dostupnost: https://hal.science/hal-02732902
https://hal.science/hal-02732902v1/document
https://hal.science/hal-02732902v1/file/LEGO4TALK_EDP_Calculations.pdf

Applied Reconfigurable Computing. Architectures, Tools, and Applications ; Applied Reconfigurable Computing. Architectures, Tools, and Applications: 17th International Symposium, ARC 2021

Autoři: Chillet, Daniel Derrien, Steven Hannig, Frank a další

Přispěvatelé: Chillet, Daniel Derrien, Steven Hannig, Frank a další

Zdroj: ARC 2021 - 17th International Symposium on Applied Reconfigurable Computing. Architectures, Tools, and Applications ; https://inria.hal.science/hal-03315772 ; ARC 2021 - 17th International Symposium on Applied Reconfigurable Computing. Architectures, Tools, and Applications, 12700, Springer, pp.1-338, 2021, LNCS, 978-3-030-79025-7. ⟨10.1007/978-3-030-79025-7⟩

Témata: ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnost: https://inria.hal.science/hal-03315772
https://doi.org/10.1007/978-3-030-79025-7

EVHA: Explainable Vision System for Hardware Testing and Assurance—An Overview.

Autoři: HASAN, MAHFUZ AL MOSTAFIZ, MOHAMMAD TAHSIN AN LE, THOMAS a další

Zdroj: ACM Journal on Emerging Technologies in Computing Systems; Jul2023, Vol. 19 Issue 3, p1-25, 25p

Témata: SCANNING electron microscopy, INTEGRATED circuits, GENERATIVE adversarial networks, MANUFACTURING processes, HARDWARE

Hardware Trojan Detection using Transition Probability with Minimal Test Vectors.

Autoři: MONDAL, ANINDAN KARMAKAR, SHUBROJYOTI MAHALAT, MAHABUB HASAN a další

Zdroj: ACM Transactions on Embedded Computing Systems; Jan2023, Vol. 22 Issue 1, p1-21, 21p

Témata: PROBABILITY theory, INTEGRATED circuits, HARDWARE, SUCCESSIVE approximation analog-to-digital converters

Object-Oriented Programming of Integrated Circuits.

Autoři: Templeton, Gary F.

Zdroj: Communications of the ACM; Mar2003, Vol. 46 Issue 3, p105-108, 4p

Témata: INTEGRATED circuits, OBJECT-oriented databases, MICROELECTRONICS, MICROPROCESSORS, COMPUTER systems, OBJECT-oriented methods (Computer science), COMPUTER programming

Trusted Integrated Circuits: The Problem and Challenges.

Autoři: Lv, Yong-Qiang Zhou, Qiang Cai, Yi-Ci a další

Zdroj: Journal of Computer Science & Technology (10009000); Sep2014, Vol. 29 Issue 5, p918-928, 11p

Témata: INTEGRATED circuits, CYBERTERRORISM, INFORMATION warfare, HARDWARE Trojans (Computers), COMPUTER input-output equipment -- Security measures, HARDWARE manufacturing

Design and analysis of hardware Trojans in approximate circuits.

Autoři: Dou, Yuqin Wang, Chenghua Gu, Chongyan a další

Zdroj: Electronics Letters (Wiley-Blackwell); Mar2022, Vol. 58 Issue 5, p197-199, 3p

Témata: HARDWARE Trojans (Computers), INTEGRATED circuits, ELECTRON accelerators, ERROR, COMPUTATIONAL mathematics

A Golden-Free Unsupervised ML-Assisted Security Approach for Detection of IC Hardware Trojans.

Autoři: Ghimire, Ashutosh Alkurdi, Mohammed Rahman, Md Tauhidur a další

Zdroj: ACM Journal on Emerging Technologies in Computing Systems; Jul2025, Vol. 21 Issue 3, p1-22, 22p

Témata: HARDWARE Trojans (Computers), MACHINE learning, INTEGRATED circuits, SECURITY management, DETECTION algorithms, SEMICONDUCTOR manufacturing

Design of a 4th-Order Feed-Forward-Compensated Operational Amplifier for Multi-GHz Sampling Frequency Continuous-Time Bandpass Sigma-Delta Modulators

Autoři: Gebreyohannes, Fikre Tsigabu Louërat, Marie-Minerve Aboushady, Hassan a další

Přispěvatelé: Gebreyohannes, Fikre Tsigabu Louërat, Marie-Minerve Aboushady, Hassan a další

Zdroj: 2019 IEEE International Symposium on Circuits and Systems (ISCAS)
https://hal.sorbonne-universite.fr/hal-02145589
2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019, Sapporo, Japan. ⟨10.1109/ISCAS.2019.8702147⟩

Témata: Multi-stage amplifiers, Feed-forward compensation, sigma-delta modulators, bandpass, continuous-time, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.1: Types and Design Styles/B.7.1.7: VLSI (very large scale integration), [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [SPI.TRON]Engineering Sciences [physics]/Electronics

Geografické téma: Sapporo, Japan

Dostupnost: https://hal.sorbonne-universite.fr/hal-02145589
https://hal.sorbonne-universite.fr/hal-02145589v1/document
https://hal.sorbonne-universite.fr/hal-02145589v1/file/ISCAS_2019_Submitted_Version.pdf
https://doi.org/10.1109/ISCAS.2019.8702147

AdaTest: Reinforcement Learning and Adaptive Sampling for On-chip Hardware Trojan Detection.

Autoři: HUILI CHEN XINQIAO ZHANG KE HUANG a další

Zdroj: ACM Transactions on Embedded Computing Systems; Mar2023, Vol. 22 Issue 2, p1-23, 23p

Témata: REINFORCEMENT learning, REWARD (Psychology), ADAPTIVE testing, INTEGRATED circuits, SOFTWARE architecture, HARDWARE

Hardware Trojan vulnerability assessment in digital integrated circuits using learnable classifiers.

Autoři: Jahanirad, Hadi Fathi, Mohammad

Zdroj: AUT Journal of Electrical Engineering; 2024, Vol. 56 Issue 3, p419-438, 20p

Témata: ARTIFICIAL neural networks, DIGITAL integrated circuits, INTEGRATED circuit design, HARDWARE Trojans (Computers), DIGITAL electronics

Hardware Trojan Horse Detection through Improved Switching of Dormant Nets.

Autoři: DHAR, TAPOBRATA ROY, SURAJIT KUMAR GIRI, CHANDAN

Zdroj: ACM Journal on Emerging Technologies in Computing Systems; Jul2021, Vol. 17 Issue 3, p1-22, 22p

Témata: INTEGRATED circuits manufacturing, HARDWARE