Suchergebnisse - (("Field Programming gate array") OR ("Field Programming game array"))

High Speed and Performance analysis of Multiplier in Field Programming Gate Array

Autoren: Gowthami, M Jalall S, Kehkeshan Aby Varkey M, Tony et al.

Quelle: IOP Conference Series: Materials Science and Engineering ; volume 1084, issue 1, page 012062 ; ISSN 1757-8981 1757-899X

Verfügbarkeit: https://doi.org/10.1088/1757-899x/1084/1/012062
https://iopscience.iop.org/article/10.1088/1757-899X/1084/1/012062
https://iopscience.iop.org/article/10.1088/1757-899X/1084/1/012062/pdf

Development of optical signal regeneration technique using ultrascale field programming gate array

Autoren: Das, B. Abdullah, M.F.L.

Quelle: Journal of Fundamental and Applied Sciences; Vol 10, No 2 (2018)

Schlagwörter: 0211 other engineering and technologies, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, Bit Error Rate (BER), Differential Phase Shift Keying (DPSK) signal, Optical Signal Regeneration, Field Programming Gate Array

Dateibeschreibung: application/pdf

Zugangs-URL: https://www.ajol.info/index.php/jfas/article/view/172078

Design of CSD based bi-orthogonal wavelet filter bank for medical image retrieval

Autoren: Aswini Kumar Samantaray Pradeep Gorre Prabodh Kumar Sahoo

Quelle: e-Prime: Advances in Electrical Engineering, Electronics and Energy, Vol 5, Iss , Pp 100242- (2023)

Schlagwörter: Canonical signed digit, Bi-orthogonal wavelet, Field Programming gate array, Image retrieval, Electrical engineering. Electronics. Nuclear engineering, TK1-9971

Dateibeschreibung: electronic resource

Relation: http://www.sciencedirect.com/science/article/pii/S2772671123001377; https://doaj.org/toc/2772-6711

Zugangs-URL: https://doaj.org/article/968883eed26543c9809afa4d8b9c4b7d

FPGA-Based Smart Health Monitoring Systems for Wearable Devices

Autoren: Muthukumaran Vaithianathan

Quelle: International Journal of Intelligent Systems and Applications in Engineering; Vol. 12 No. 4 (2024); 4154-4161

Schlagwörter: Field Programming Gate Array (FPGA), Heart Rate Monitoring, Power Consumption, Sensor Integration, Wearable Technology

Dateibeschreibung: application/pdf

Zugangs-URL: https://www.ijisae.org/index.php/IJISAE/article/view/7011

An Efficient Low-Power Reconfigurable Model For CMOS-Based SRAM Using FPGA

Autoren: Sathyanarayana, Rekha Ramaswamy , Nataraj Kanathur Ramaswamy, Rekha Kanathur

Quelle: International Journal of Intelligent Systems and Applications in Engineering; Vol. 12 No. 1 (2024); 500-515

Schlagwörter: Configurable Logic Blocks (CLBs), Complex Programmable Logic Devices (CPLDs), Complementary metal oxide semiconductor (CMOS), static random-access memory (SRAM), logical elements (LEs), field programming gate array (FPGA)

Dateibeschreibung: application/pdf

Zugangs-URL: https://www.ijisae.org/index.php/IJISAE/article/view/3948

An efficient reconfigurable code rate cooperative low-density parity check codes for gigabits wide code encoder/decoder operations

Autoren: Divyashree Yamadur, Venkatesh orcid:0000-0001-5056- Komala, Mallikarjunaiah et al.

Schlagwörter: Bit error rate, Field programming gate array, Frame error rate, Low-density-parity-check, Signal to noise ratio

Relation: https://zenodo.org/records/10435268; oai:zenodo.org:10435268

Verfügbarkeit: https://doi.org/10.11591/ijece.v13i6.pp6369-6377
https://zenodo.org/records/10435268

Comparison of the Single Event Upset Characters of the First-In First-Out in the Virtex-5 Field Programming Gate Array

Autoren: Eun Sup Sim Sung-Sae Lee Seung-Hun Lee et al.

Quelle: New Physics: Sae Mulli. 61:114-118

Zugangs-URL: http://www.npsm-kps.org/journal/DOIx.php?id=10.3938/NPSM.61.114

Implementation of Carrier-Based Simple Boost Pulse Width Modulation (PWM) for Z-Source Inverter (ZSI) using Field Programming Gate Array (FPGA)

Autoren: Muhammad, M Rasin, Z Jidin, A

Quelle: IOP Conference Series: Materials Science and Engineering ; volume 226, page 012141 ; ISSN 1757-8981 1757-899X

Verfügbarkeit: https://doi.org/10.1088/1757-899x/226/1/012141
http://stacks.iop.org/1757-899X/226/i=1/a=012141/pdf
http://stacks.iop.org/1757-899X/226/i=1/a=012141?key=crossref.f384508e41babb6124b5dd0efa75bef3

Survey on object detection in VLSI architecture through deep learning.

Autoren: Francis, Neethu C. Mathana, J. M.

Quelle: AIP Conference Proceedings; 2024, Vol. 3044 Issue 1, p1-9, 9p

Schlagwörter: OBJECT recognition (Computer vision), COMPUTER vision, GATE array circuits, VERY large scale circuit integration, ALGORITHMS, DEEP learning

10 Clock-Periods Pipelined Implementation of AES-128 Encryption-Decryption Algorithm up to 28 Gbit/s Real Throughput by Xilinx Zynq UltraScale+ MPSoC ZCU102 Platform

Autoren: Paolo Visconti Stefano Capoccia Eugenio Venere et al.

Quelle: Electronics, Vol 9, Iss 1665, p 1665 (2020)

Schlagwörter: field programming gate array, encryption, advanced encryption standard, wireless connector, 5G communication, experimental testing, Electronics, TK7800-8360

Relation: https://www.mdpi.com/2079-9292/9/10/1665; https://doaj.org/toc/2079-9292; https://doaj.org/article/4b07c2af20b0461a911945d3c1e23d5a

Verfügbarkeit: https://doi.org/10.3390/electronics9101665
https://doaj.org/article/4b07c2af20b0461a911945d3c1e23d5a

Modeling and reliability analysis of three phase z-source AC-AC converter

Autoren: Prasad Hanuman Maity Tanmoy

Quelle: Archives of Electrical Engineering, Vol 66, Iss 4, Pp 731-743 (2017)

Schlagwörter: real-time digital simulation (RTDS), field programming gate array (FPGA), hardware-in-the-loop (HIL), z-source ac-ac converter, PID controller, Electrical engineering. Electronics. Nuclear engineering, TK1-9971

Dateibeschreibung: electronic resource

Relation: http://www.degruyter.com/view/j/aee.2017.66.issue-4/aee-2017-0055/aee-2017-0055.xml?format=INT; https://doaj.org/toc/2300-2506

Zugangs-URL: https://doaj.org/article/a7aa96c7cc7b46248edf972fe746c043

Real-Time Controller Based on FPGA and DSP for Solar Ground Layer Adaptive Optics Prototype System at 1-m NVST

Autoren: Lin Kong Lei Zhu Lanqiang Zhang et al.

Quelle: IEEE Photonics Journal, Vol 9, Iss 2, Pp 1-11 (2017)

Schlagwörter: Real-time controller, field programming gate array (FPGA), digital signal processor (DSP), parallel acceleration, ground layer adaptive optics., Applied optics. Photonics, TA1501-1820, Optics. Light, QC350-467

Dateibeschreibung: electronic resource

Relation: https://ieeexplore.ieee.org/document/7840009/; https://doaj.org/toc/1943-0655

Zugangs-URL: https://doaj.org/article/39774bd0656a4a7aab3886ef89f30e2b

FPGA based fast integrated real-time multi coincidence counter using a time-to-digital converter

Autoren: Arabul, Ekin Rarity, John Dahnoun, Naim et al.

Weitere Verfasser: Arabul, Ekin Rarity, John Dahnoun, Naim et al.

Quelle: Arabul, E, Rarity, J & Dahnoun, N 2018, FPGA based fast integrated real-time multi coincidence counter using a time-to-digital converter . in L Jozwiak, B Lutovac, D Jurisic & R Stojanovic (eds), 2018 7th Mediterranean Conference on Embedded Computing (MECO 2018) : Proceedings of a meeting held 10-14 June 2018, Budva, Montenegro . Institute of Electrical and Electronics Engineers (IEEE), pp. 412-415, 7th Mediterranean Conference on Embedded Computing, MECO 2018, Budva, Montenegro, 10/06/18 . https://doi.org/10.1109/MECO.2018.8406094

Schlagwörter: name=Photonics and Quantum, Coincidence Counting, 02 engineering and technology, name=QETLabs, 01 natural sciences, name=Bristol Quantum Information Institute, Avalanche Photo Diode, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Field Programming Gate Array, Coincidence Detection, Time-to-Digital Converter, Positron Emission Tomography

Dateibeschreibung: application/pdf

Zugangs-URL: https://research-information.bris.ac.uk/ws/files/154521937/Ekin_Arabul_FPGA_based_Fast_Integrated_Real_Time_Multi_Coincidence_Counter_Using_a_Time_to_Digital_Converter.pdf
https://research-information.bris.ac.uk/files/154521937/Ekin_Arabul_FPGA_based_Fast_Integrated_Real_Time_Multi_Coincidence_Counter_Using_a_Time_to_Digital_Converter.pdf
https://ieeexplore.ieee.org/document/8406094/
https://research-information.bris.ac.uk/en/publications/fpga-based-fast-integrated-real-time-multi-coincidence-counter-us
https://research-information.bris.ac.uk/en/publications/fpga-based-fast-integrated-realtime-multi-coincidence-counter-using-a-timetodigital-converter(e4476d42-bca3-4f6a-b900-620b18f1aa49).html
https://research-information.bristol.ac.uk/en/publications/fpga-based-fast-integrated-realtime-multi-coincidence-counter-using-a-timetodigital-converter(e4476d42-bca3-4f6a-b900-620b18f1aa49).html
https://hdl.handle.net/1983/e4476d42-bca3-4f6a-b900-620b18f1aa49
http://www.scopus.com/inward/record.url?scp=85050695979&partnerID=8YFLogxK

FPGA Eco Unit Commitment Based Gravitational Search Algorithm Integrating Plug-in Electric Vehicles

Autoren: Heba-Allah I. ElAzab R. A. Swief Hanady H. Issa et al.

Quelle: Energies, Vol 11, Iss 10, p 2547 (2018)

Schlagwörter: Combined Economic Emission Dispatch (CEED), Field Programming Gate Array (FPGA), Gravitational Search Algorithm (GSA), Plug-in Electric Vehicles (PEVs), quadratic programming, Technology

Relation: http://www.mdpi.com/1996-1073/11/10/2547; https://doaj.org/toc/1996-1073; https://doaj.org/article/617caabd749548f6bd7a4cfe0e7f9a64

Verfügbarkeit: https://doi.org/10.3390/en11102547
https://doaj.org/article/617caabd749548f6bd7a4cfe0e7f9a64

Hardware implementation for fast convolution with a PN code using field programming gate array

Autoren: Abdulqadir Alaqeeli Janusz Starzyk The Pennsylvania State University CiteSeerX Archives

Weitere Verfasser: Abdulqadir Alaqeeli Janusz Starzyk The Pennsylvania State University CiteSeerX Archives

Quelle: http://www.ohio.edu/people/starzykj/network/Research/Papers/Recent conferences/Conv_FPGA_PN_code_SSST2001.pdf.

Dateibeschreibung: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.418.5404; http://www.ohio.edu/people/starzykj/network/Research/Papers/Recent conferences/Conv_FPGA_PN_code_SSST2001.pdf

Verfügbarkeit: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.418.5404
http://www.ohio.edu/people/starzykj/network/Research/Papers/Recent conferences/Conv_FPGA_PN_code_SSST2001.pdf

Small scale robot vision system in FPGA using novel pattern recognition.

Autoren: Priya, V. Geetha Lakshmi, P. Syamlal, V. S. et al.

Quelle: AIP Conference Proceedings; 2023, Vol. 2946 Issue 1, p1-8, 8p

Schlagwörter: PATTERN recognition systems, ROBOT vision, APPLICATION-specific integrated circuits, MOBILE robots, GATE array circuits, VIDEO production & direction

Fractional order PID controller optimised by hybrid algorithm for instant torque control of IM motor.

Autoren: Prabhakaran, Anush Ponnusamy, Thirumoorthi Thenmozhi et al.

Quelle: International Journal of Electronics; Aug2025, Vol. 112 Issue 8, p1537-1559, 23p

Schlagwörter: INDUCTION motors, PID controllers, TORQUE, SPEED, ALGORITHMS, TORQUE control

Energy efficient design of 100gb/s optical dpsk transmitter design using ultrascale fpga

Autoren: Das, Bhagwa Abdullah, M. F.L. Shah, Nor Shahihda Mohd et al.

Quelle: Das, B, Abdullah, M F L, Shah, N S M, Chowdhry, B S & Hussain, D M A 2016, 'Energy efficient design of 100gb/s optical dpsk transmitter design using ultrascale fpga', Indian Journal of Science and Technology, vol. 9, no. 36, 102161. https://doi.org/10.17485/ijst/2016/v9i36/102161

Schlagwörter: Differential Phase Shift Keying (DPSK), Energy Efficient, Field Programming Gate Array, Laser Signal, Non-Return-to-Zero Modulation, Optical Transmitter

Relation: info:eu-repo/semantics/altIdentifier/pissn/0974-6846; info:eu-repo/semantics/altIdentifier/eissn/0974-5645

Verfügbarkeit: https://vbn.aau.dk/da/publications/36a3aa33-56aa-4e85-af15-4117af6d7820
https://doi.org/10.17485/ijst/2016/v9i36/102161
https://www.scopus.com/pages/publications/85006356984

Two Dimensional (2D) OCDMA Encoder/Decoder for Various Industrial Application.

Autoren: Aljunid, S. M. A. Anuar, M. A. Ismail, A. A. M. et al.

Quelle: International Journal of Nanoelectronics & Materials. 2021 Special Issue, Vol. 14, p175-182. 8p.

Schlagwörter: *TELECOMMUNICATION systems, *OPTICAL switches, *INDUSTRIAL applications, *DATA transmission systems, *CODE division multiple access, *OPTICAL fibers

A comparative study of deep learning efficiency in the classification of electrical faults of permanent magnet synchronous motor.

Autoren: Ziad, Hiba Al-Dujaili, Ayad Q. Humaidi, Amjad J.

Quelle: International Review of Applied Sciences & Engineering; 2025, Vol. 16 Issue 2, p292-302, 11p

Schlagwörter: PERMANENT magnet motors, RECURRENT neural networks, CONVOLUTIONAL neural networks, SIGNAL processing, NETWORK performance, DEEP learning, INDUCTION machinery