Výsledky vyhľadávania - (("Field Programming gate array") OR ("Field Programming game array"))*
-
1
Autori: a ďalší
Zdroj: IOP Conference Series: Materials Science and Engineering ; volume 1084, issue 1, page 012062 ; ISSN 1757-8981 1757-899X
-
2
Autori:
Zdroj: Journal of Fundamental and Applied Sciences; Vol 10, No 2 (2018)
Predmety: 0211 other engineering and technologies, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, Bit Error Rate (BER), Differential Phase Shift Keying (DPSK) signal, Optical Signal Regeneration, Field Programming Gate Array
Popis súboru: application/pdf
Prístupová URL adresa: https://www.ajol.info/index.php/jfas/article/view/172078
-
3
Autori:
Zdroj: e-Prime: Advances in Electrical Engineering, Electronics and Energy, Vol 5, Iss , Pp 100242- (2023)
Predmety: Canonical signed digit, Bi-orthogonal wavelet, Field Programming gate array, Image retrieval, Electrical engineering. Electronics. Nuclear engineering, TK1-9971
Popis súboru: electronic resource
Relation: http://www.sciencedirect.com/science/article/pii/S2772671123001377; https://doaj.org/toc/2772-6711
Prístupová URL adresa: https://doaj.org/article/968883eed26543c9809afa4d8b9c4b7d
-
4
Autori: Muthukumaran Vaithianathan
Zdroj: International Journal of Intelligent Systems and Applications in Engineering; Vol. 12 No. 4 (2024); 4154-4161
Popis súboru: application/pdf
Prístupová URL adresa: https://www.ijisae.org/index.php/IJISAE/article/view/7011
-
5
Autori:
Zdroj: International Journal of Intelligent Systems and Applications in Engineering; Vol. 12 No. 1 (2024); 500-515
Predmety: Configurable Logic Blocks (CLBs), Complex Programmable Logic Devices (CPLDs), Complementary metal oxide semiconductor (CMOS), static random-access memory (SRAM), logical elements (LEs), field programming gate array (FPGA)
Popis súboru: application/pdf
Prístupová URL adresa: https://www.ijisae.org/index.php/IJISAE/article/view/3948
-
6
Autori: a ďalší
Predmety: Bit error rate, Field programming gate array, Frame error rate, Low-density-parity-check, Signal to noise ratio
Relation: https://zenodo.org/records/10435268; oai:zenodo.org:10435268
-
7
Autori: a ďalší
Zdroj: New Physics: Sae Mulli. 61:114-118
Prístupová URL adresa: http://www.npsm-kps.org/journal/DOIx.php?id=10.3938/NPSM.61.114
-
8
Autori:
Zdroj: IOP Conference Series: Materials Science and Engineering ; volume 226, page 012141 ; ISSN 1757-8981 1757-899X
-
9
Autori:
Zdroj: AIP Conference Proceedings; 2024, Vol. 3044 Issue 1, p1-9, 9p
-
10
Autori: a ďalší
Zdroj: Electronics, Vol 9, Iss 1665, p 1665 (2020)
Predmety: field programming gate array, encryption, advanced encryption standard, wireless connector, 5G communication, experimental testing, Electronics, TK7800-8360
Relation: https://www.mdpi.com/2079-9292/9/10/1665; https://doaj.org/toc/2079-9292; https://doaj.org/article/4b07c2af20b0461a911945d3c1e23d5a
-
11
Autori:
Zdroj: Archives of Electrical Engineering, Vol 66, Iss 4, Pp 731-743 (2017)
Predmety: real-time digital simulation (RTDS), field programming gate array (FPGA), hardware-in-the-loop (HIL), z-source ac-ac converter, PID controller, Electrical engineering. Electronics. Nuclear engineering, TK1-9971
Popis súboru: electronic resource
Relation: http://www.degruyter.com/view/j/aee.2017.66.issue-4/aee-2017-0055/aee-2017-0055.xml?format=INT; https://doaj.org/toc/2300-2506
Prístupová URL adresa: https://doaj.org/article/a7aa96c7cc7b46248edf972fe746c043
-
12
Autori: a ďalší
Zdroj: IEEE Photonics Journal, Vol 9, Iss 2, Pp 1-11 (2017)
Predmety: Real-time controller, field programming gate array (FPGA), digital signal processor (DSP), parallel acceleration, ground layer adaptive optics., Applied optics. Photonics, TA1501-1820, Optics. Light, QC350-467
Popis súboru: electronic resource
Prístupová URL adresa: https://doaj.org/article/39774bd0656a4a7aab3886ef89f30e2b
-
13
Autori: a ďalší
Prispievatelia: a ďalší
Zdroj: Arabul, E, Rarity, J & Dahnoun, N 2018, FPGA based fast integrated real-time multi coincidence counter using a time-to-digital converter . in L Jozwiak, B Lutovac, D Jurisic & R Stojanovic (eds), 2018 7th Mediterranean Conference on Embedded Computing (MECO 2018) : Proceedings of a meeting held 10-14 June 2018, Budva, Montenegro . Institute of Electrical and Electronics Engineers (IEEE), pp. 412-415, 7th Mediterranean Conference on Embedded Computing, MECO 2018, Budva, Montenegro, 10/06/18 . https://doi.org/10.1109/MECO.2018.8406094
Predmety: name=Photonics and Quantum, Coincidence Counting, 02 engineering and technology, name=QETLabs, 01 natural sciences, name=Bristol Quantum Information Institute, Avalanche Photo Diode, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Field Programming Gate Array, Coincidence Detection, Time-to-Digital Converter, Positron Emission Tomography
Popis súboru: application/pdf
Prístupová URL adresa: https://research-information.bris.ac.uk/ws/files/154521937/Ekin_Arabul_FPGA_based_Fast_Integrated_Real_Time_Multi_Coincidence_Counter_Using_a_Time_to_Digital_Converter.pdf
https://research-information.bris.ac.uk/files/154521937/Ekin_Arabul_FPGA_based_Fast_Integrated_Real_Time_Multi_Coincidence_Counter_Using_a_Time_to_Digital_Converter.pdf
https://ieeexplore.ieee.org/document/8406094/
https://research-information.bris.ac.uk/en/publications/fpga-based-fast-integrated-real-time-multi-coincidence-counter-us
https://research-information.bris.ac.uk/en/publications/fpga-based-fast-integrated-realtime-multi-coincidence-counter-using-a-timetodigital-converter(e4476d42-bca3-4f6a-b900-620b18f1aa49).html
https://research-information.bristol.ac.uk/en/publications/fpga-based-fast-integrated-realtime-multi-coincidence-counter-using-a-timetodigital-converter(e4476d42-bca3-4f6a-b900-620b18f1aa49).html
https://hdl.handle.net/1983/e4476d42-bca3-4f6a-b900-620b18f1aa49
http://www.scopus.com/inward/record.url?scp=85050695979&partnerID=8YFLogxK -
14
Autori: a ďalší
Zdroj: Energies, Vol 11, Iss 10, p 2547 (2018)
Predmety: Combined Economic Emission Dispatch (CEED), Field Programming Gate Array (FPGA), Gravitational Search Algorithm (GSA), Plug-in Electric Vehicles (PEVs), quadratic programming, Technology
Relation: http://www.mdpi.com/1996-1073/11/10/2547; https://doaj.org/toc/1996-1073; https://doaj.org/article/617caabd749548f6bd7a4cfe0e7f9a64
-
15
Autori:
Prispievatelia:
Zdroj: http://www.ohio.edu/people/starzykj/network/Research/Papers/Recent conferences/Conv_FPGA_PN_code_SSST2001.pdf.
Popis súboru: application/pdf
Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.418.5404; http://www.ohio.edu/people/starzykj/network/Research/Papers/Recent conferences/Conv_FPGA_PN_code_SSST2001.pdf
Dostupnosť: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.418.5404
http://www.ohio.edu/people/starzykj/network/Research/Papers/Recent conferences/Conv_FPGA_PN_code_SSST2001.pdf -
16
Autori: a ďalší
Zdroj: AIP Conference Proceedings; 2023, Vol. 2946 Issue 1, p1-8, 8p
-
17
Autori: a ďalší
Zdroj: International Journal of Electronics; Aug2025, Vol. 112 Issue 8, p1537-1559, 23p
Predmety: INDUCTION motors, PID controllers, TORQUE, SPEED, ALGORITHMS, TORQUE control
-
18
Autori: a ďalší
Zdroj: Das, B, Abdullah, M F L, Shah, N S M, Chowdhry, B S & Hussain, D M A 2016, 'Energy efficient design of 100gb/s optical dpsk transmitter design using ultrascale fpga', Indian Journal of Science and Technology, vol. 9, no. 36, 102161. https://doi.org/10.17485/ijst/2016/v9i36/102161
Predmety: Differential Phase Shift Keying (DPSK), Energy Efficient, Field Programming Gate Array, Laser Signal, Non-Return-to-Zero Modulation, Optical Transmitter
Relation: info:eu-repo/semantics/altIdentifier/pissn/0974-6846; info:eu-repo/semantics/altIdentifier/eissn/0974-5645
-
19
Autori: a ďalší
Zdroj: International Journal of Nanoelectronics & Materials. 2021 Special Issue, Vol. 14, p175-182. 8p.
-
20
Autori:
Zdroj: International Review of Applied Sciences & Engineering; 2025, Vol. 16 Issue 2, p292-302, 11p
Nájsť tento článok vo Web of Science
Full Text Finder