Výsledky vyhledávání - "field-programmable gate array (FPGA) implementations"

Low Latency Demodulation for High-Frequency Atomic Force Microscopy Probes

Autoři: Lagrange, Denis Mauran, Nicolas Schwab, Lucien a další

Přispěvatelé: Lagrange, Denis Mauran, Nicolas Schwab, Lucien a další

Zdroj: IEEE Transactions on Control Systems Technology. 29:2264-2270

Témata: 0301 basic medicine, 0303 health sciences, atomic force microscopy, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, field-programmable gate array (FPGA) implementations, [SPI.TRON] Engineering Sciences [physics]/Electronics, [SPI.TRON]Engineering Sciences [physics]/Electronics, low latency, 03 medical and health sciences, amplitude and phase demodulation, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing

Popis souboru: application/pdf

Přístupová URL adresa: https://hal.laas.fr/hal-02974151/file/FINAL%20VERSION.pdf
https://dblp.uni-trier.de/db/journals/tcst/tcst29.html#LagrangeMSL21
https://ieeexplore.ieee.org/document/9229238
http://ieeexplore.ieee.org/document/9229238

FPGA Implementation(s) of a Scalable Encryption Algorithm

Autoři: Macé, François Standaert, François-Xavier Quisquater, Jean-Jacques a další

Přispěvatelé: Macé, François Standaert, François-Xavier Quisquater, Jean-Jacques a další

Zdroj: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 16, no. 2, p. 212-216 (2008)

Témata: constrained applications, block ciphers, modular design, 0202 electrical engineering, electronic engineering, information engineering, field-programmable gate array (FPGA) implementations, 02 engineering and technology

Přístupová URL adresa: http://perso.uclouvain.be/fstandae/PUBLIS/52.pdf
http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000004444553
https://dl.acm.org/doi/10.1109/TVLSI.2007.904139
https://dial.uclouvain.be/pr/boreal/object/boreal:36859
http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=4432656&arnumber=4444553&count=17&index=14
https://www.infona.pl/resource/bwmeta1.element.ieee-art-000004444553
https://ieeexplore.ieee.org/document/4444553/
https://hdl.handle.net/2078.1/36859

FPGA implementation(s) of a scalable encryption algorithm

Autoři: UCL - FSA/ELEC - Département d'électricité Macé, François Standaert, François-Xavier a další

Zdroj: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 16, no. 2, p. 212-216 (2008)

Témata: block ciphers, constrained applications, field-programmable gate array (FPGA) implementations, modular design, info:eu-repo/semantics/article

URL: http://hdl.handle.net/2078.1/36859