Search Results - "fast minimum loss space vector pulse‐width modulation algorithm"

Fast minimum loss space vector pulse‐width modulation algorithm for multilevel inverters

Authors: Nathaniel Benedict Hawes Aparna Saha David Allan Torrey et al.

Source: IET Power Electronics. 7:1590-1602

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 7. Clean energy

Access URL: https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/iet-pel.2013.0423
https://ietresearch.onlinelibrary.wiley.com/doi/pdf/10.1049/iet-pel.2013.0423

Fast minimum loss space vector pulse-width modulation algorithm for multilevel inverters.

Authors: Sozer, Yilmaz Torrey, David A. Saha, Aparna et al.

Source: IET Power Electronics (Wiley-Blackwell); Jul2014, Vol. 7 Issue 7, p1590-1602, 13p, 8 Diagrams, 4 Charts, 4 Graphs

Subject Terms: PULSE width modulation, ALGORITHMS, ELECTRIC inverters, ELECTRIC power, ELECTRIC currents, ELECTRIC power distribution grids

Component Count Reduced, Filter-Less H-Bridge Multilevel Inverter with Series and Parallel Connected Switches.

Authors: Vijayakumar, M Ramesh, S. M.

Source: Journal of Circuits, Systems & Computers; Mar2021, Vol. 30 Issue 3, pN.PAG-N.PAG, 39p

Subject Terms: PULSE width modulation transformers, PULSE width modulation, LINE drivers (Integrated circuits), IDEAL sources (Electric circuits), SINE waves, OPTICAL couplers

Reduction in components using modified topology for asymmetrical multilevel inverter.

Authors: Mohanty, Kanungo Barada Thakre, Kishor Chatterjee, Aditi et al.

Source: World Journal of Engineering; 2019, Vol. 16 Issue 1, p71-77, 7p

New Topology for Asymmetrical Multilevel Inverter: An Effort to Reduced Device Count.

Authors: Thakre, Kishor Mohanty, Kanungo Barada Kommukuri, Vinaya Sagar et al.

Source: Journal of Circuits, Systems & Computers; Apr2018, Vol. 27 Issue 4, p-1, 17p

Subject Terms: TOPOLOGY, HARMONIC distortion (Physics), FEATURE extraction, SIMULATION methods & models, MEMBRANE potential

A simple double mapping based SVPWM method for balancing dc-link capacitor voltages of five-level diode-clamped converters.

Authors: Saha, Aparna Elrayyah, Ali Sozer, Yilmaz

Source: 2016 IEEE Applied Power Electronics Conference & Exposition (APEC); 2016, p2806-2812, 7p

A Switching Frequency Optimized Space Vector Pulse Width Modulation (SVPWM) Scheme for Cascaded Multilevel Inverters.

Authors: Creech, Angus C. W. Borthwick, Alistair G. L. Ingram, David

Source: Energies (19961073); May2017, Vol. 10 Issue 5, p725, 18p, 17 Diagrams, 5 Charts, 7 Graphs

Subject Terms: CASCADE converters, HYDRAULIC turbines, COMPUTATIONAL fluid dynamics, TURBULENCE, ROTORS, CHANNELS (Hydraulic engineering)

Rapid and generalised space vector modulation algorithm for cascaded multilevel converter based on zero-order voltage constraint.

Authors: Cui Wang Yun Zhang Xiong-min Tang et al.

Source: IET Power Electronics (Wiley-Blackwell); 2016, Vol. 9 Issue 5, p989-996, 8p, 9 Black and White Photographs, 1 Chart, 4 Graphs

Subject Terms: COORDINATE transformations, CONSTRAINT algorithms, COMPUTER simulation, CONVERTERS (Electronics), SWITCHING power supplies

Space-vector pulse-width modulation for multiphase voltage source inverters considering reference order.

Authors: Keng-Yuan Chen

Source: IET Power Electronics (Wiley-Blackwell); 2016, Vol. 9 Issue 1, p81-94, 14p

Subject Terms: PULSE width modulation, IDEAL sources (Electric circuits), ELECTRIC inverters, ELECTRONIC modulators, COMPUTATIONAL complexity

Capacitor voltage balancing of a five-level diode-clamped converter using minimum loss SVPWM algorithm for wide range modulation indices.

Authors: Saha, Aparna Sozer, Yilmaz Elrayyah, Ali

Source: 2014 IEEE Energy Conversion Congress & Exposition (ECCE); 2014, p227-233, 7p

Novel multilevel inverter topologies for medium and high-voltage applications with lower values of blocked voltage by switches.

Authors: Alishah, Rasoul Shalchi Nazarpour, Daryoosh Hosseini, Seyed Hossein et al.

Source: IET Power Electronics (Wiley-Blackwell); 2014, Vol. 7 Issue 12, p3062-3071, 10p, 6 Diagrams, 5 Charts, 4 Graphs

Subject Terms: ELECTRIC inverters, HIGH voltages, ELECTRIC switchgear, INSULATED gate bipolar transistors, MULTILEVEL models, CASCADE control

Optimal configuration for cascaded voltage source multilevel inverter based on series connection sub-multilevel inverter.

Authors: Thakre, Kishor Barada Mohanty, Kanungo Sagar Kommukuri, Vinaya et al.

Source: Cogent Engineering; Dec2016, Vol. 3 Issue 1, pN.PAG-N.PAG, 1p

Subject Terms: ELECTRIC potential, ELECTRIC inverters, DIRECT currents, ELECTRIC switchgear, COMPUTER simulation