Suchergebnisse - "algorithm hardware implementation"

Global MPP Tracking Under Partial Shading Conditions Using LandS Algorithm: Hardware Implementation

Autoren: Mostapha Oulcaid El Mehdi Acim Nabil Hmina et al.

Quelle: Lecture Notes in Electrical Engineering ISBN: 9789819701254

Parallel Smith-Waterman Algorithm Hardware Implementation for Ancestors and Offspring Gene Tracer

Autoren: Asmaa G. Seliem Wael Abou El-Wafa Hesham F. A. Hamed et al.

Quelle: 2016 World Symposium on Computer Applications & Research (WSCAR). :116-121

Schlagwörter: 0301 basic medicine, 03 medical and health sciences

Zugangs-URL: http://ieeexplore.ieee.org/document/7791991/

Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation

Autoren: Larry Pileggi Franz Franchetti Christian Berger et al.

Quelle: Journal of Signal Processing Systems. 71:297-312

Schlagwörter: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Zugangs-URL: https://link.springer.com/article/10.1007%2Fs11265-012-0720-4
https://dblp.uni-trier.de/db/journals/vlsisp/vlsisp71.html#ZhuBTPF13
https://link.springer.com/content/pdf/10.1007%2Fs11265-012-0720-4.pdf
https://users.ece.cmu.edu/~franzf/papers/Local%20Interpolation-based%20Polar%20Format%20SAR%20-Algorithm
.pdf
https://dl.acm.org/doi/10.1007/s11265-012-0720-4

Vehicle image edge detection algorithm hardware implementation on FPGA

Autoren: WangXiaohong ZhangShanshan

Quelle: 2010 International Conference on Computer Application and System Modeling (ICCASM 2010). :V14-184

Schlagwörter: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Zugangs-URL: https://ieeexplore.ieee.org/document/5622351/

Minimum-clock-cycle Itoh-Tsujii algorithm hardware implementation for cryptography applications over GF (2 m ) fields

Autoren: Antonio Lloris Luis Parrilla Antonio García et al.

Quelle: Electronics Letters. 48:1126-1128

Schlagwörter: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Zugangs-URL: http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000006294555
https://www.infona.pl/resource/bwmeta1.element.ieee-art-000006294555
https://ui.adsabs.harvard.edu/abs/2012ElL....48.1126L/abstract
https://ieeexplore.ieee.org/document/6294555/
https://digital-library.theiet.org/content/journals/10.1049/el.2012.1427

AES Encryption Algorithm Hardware Implementation: Throughput and Area Comparison of 128, 192 and 256-bits Key

Autoren: Naoufal Raissouni Samir El Adib

Quelle: International Journal of Reconfigurable and Embedded Systems (IJRES). 1

Schlagwörter: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Zugangs-URL: http://iaesjournal.com/online/index.php/IJRES/article/view/551
http://www.iaescore.com/journals/index.php/IJRES/article/view/1189

AES Encryption Algorithm Hardware Implementation Architecture: Resource and Execution Time Optimization

Autoren: Samir El Adib Naoufal Raissouni

Quelle: International Journal of Information and Network Security (IJINS). 1

Schlagwörter: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Zugangs-URL: http://iaesjournal.com/online/index.php/IJINS/article/view/530

Hardware Implementation of a Method for Improving Object Discernibility In Poor Visibility Conditions Images ; Аппаратная реализация метода улучшения различимости объектов на изображениях, полученных в условиях недостаточной видимости

Autoren: Yuri Mickhayluck Denis Nacharov Юрий Петрович Михайлюк et al.

Quelle: The Herald of the Siberian State University of Telecommunications and Information Science; Том 19, № 1 (2025); 65-79 ; Вестник СибГУТИ; Том 19, № 1 (2025); 65-79 ; 1998-6920 ; 10.55648/1998-6920-2025-19-1

Schlagwörter: улучшение качества, algorithm hardware implementation, Verilog, visibility, contrast, linear contrast enhancement, fog, mist, FPGA, quality improvement, аппаратная реализация алгоритмов, видимость, контраст, линейное контрастирование, туман, дымка, ПЛИС

Dateibeschreibung: application/pdf

Relation: https://vestnik.sibsutis.ru/jour/article/view/803/786; https://vestnik.sibsutis.ru/jour/article/downloadSuppFile/803/20; https://vestnik.sibsutis.ru/jour/article/downloadSuppFile/803/21; Михайлюк Ю. П., Начаров Д. В. Метод улучшения различимости объектов на цифровых изображениях, полученных в условиях недостаточной видимости // Журнал радиоэлектроники [электронный журнал]. 2015. No6.; He K., Sun J., Tang X. Single Image Haze Removal Using Dark Channel Prior // Proc. of the 2009 IEEE Conference on Computer Vision and Pattern Recognition, 2009. P. 1956–1963.; Tarel J. -P., Hautiere N., Caraffa L., Cord A., Halmaoui H., Gruyer D. Vision Enhancement in Homogeneous and Heterogeneous Fog // IEEE Intelligent Transportation Systems Magazine. 2012. V. 4, Is. 2, P. 6–20.; Duminil A., Tarel J. -P., Brémond R. Single Image Atmospheric Veil Removal Using New Priors // Proc. of the 2021 IEEE International Conference on Image Processing (ICIP). 2021. P. 1719–1723.; Zhang J., Li F., Kang M., Luo X., Zhao J., Xiao Ch., Du H., Wang H. A Method of Image Dehazing Based on Atmospheric Veil Prediction by ResNet // Proc. of the 2nd Workshop on User-centric Narrative Summarization of Long Videos. 2023. P. 17–24.; Varalakshmi J., Jose D., Kumar P. N. FPGA Implementation of Haze Removal Technique Based on Dark Channel Prior // Computational Vision and Bio-Inspired Computing (ICCVBIC 2021), 2021. P. 624–630.; Cyclone V Device Overview : technical description [Электронный ресурс]. URL: https://www.altera.com/en_US/pdfs/literature/hb/cyclone-v/cv_51001.pdf (дата обращения: 20.04.2023).; ADV7123 technical description [Электронный ресурс]. URL: http://www.analog.com/media/en/technical-documentation/data-sheets/ADV7123.pdf (дата обращения: 20.04.2023).; Altera Phase-Locked Loop IP Core User Guide : technical description [Электронный ресурс] URL:https://www.altera.com/en_US/pdfs/literature/ug/altera_pll.pdf (дата обращения: 20.04.2023); Kumar A. K., Jeevaratnam N., Patnaik S. On-Chip Memory for Image Processing Applications Based on FPGA // Proc. of the International conference on Signal Processing, Communication, Power and Embedded System, 2016. P.1598–1602.; Licciardo G. D., Cappetta C., Di Benedetto L. FPGA Optimization of Convolution-based 2D Filtering Processor for Image Processing // Proc. of the 8th Computer Science and Electronic Engineering Conference, 2016. P.180–185; https://vestnik.sibsutis.ru/jour/article/view/803

Verfügbarkeit: https://vestnik.sibsutis.ru/jour/article/view/803
https://doi.org/10.55648/1998-6920-2025-19-1-65-79

A speed FPGA hardware accelerator based FSBMA-VBSME used in H.264/AVC

Autoren: Yahi, Amira Toumi, Salah Bourennane, El-Bay et al.

Weitere Verfasser: Yahi, Amira Toumi, Salah Bourennane, El-Bay et al.

Quelle: Evolving Systems. 7:233-241

Schlagwörter: Video compression H.264/AVC Full search block matching algorithm Hardware implementation Parallel processors, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, [SPI.TRON] Engineering Sciences [physics]/Electronics, [INFO.INFO-ES] Computer Science [cs]/Embedded Systems

Zugangs-URL: https://link.springer.com/article/10.1007/s12530-015-9140-6/fulltext.html
https://dblp.uni-trier.de/db/journals/evs/evs7.html#YahiTBM16
https://hal.archives-ouvertes.fr/hal-01279862v1
https://link.springer.com/article/10.1007/s12530-015-9140-6
https://hal.inria.fr/hal-01279862v1

Parallel Smith-Waterman Algorithm Hardware Implementation for Ancestors and Offspring Gene Tracer.

Autoren: Seliem, Asmaa G. El-Wafa, Wael Abou Galal, A.I.A. et al.

Quelle: 2016 World Symposium on Computer Applications & Research (WSCAR); 2016, p116-121, 6p

Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation.

Autoren: Zhu, Qiuling Berger, Christian Turner, Eric et al.

Quelle: Journal of Signal Processing Systems for Signal, Image & Video Technology; Jun2013, Vol. 71 Issue 3, p297-312, 16p

Vehicle image edge detection algorithm hardware implementation on FPGA.

Autoren: Zhang Shanshan Wang Xiaohong

Quelle: 2010 International Conference on Computer Application & System Modeling (ICCASM); 2010, pV14-V188, 346p

Minimum-clock-cycle Itoh-Tsujii algorithm hardware implementation for cryptography applications over GF(2m) fields.

Autoren: Parrilla, L. Lloris, A. Castillo, E. et al.

Quelle: Electronics Letters (Institution of Engineering & Technology); 8/30/2012, Vol. 48 Issue 18, p1126-1128, 3p, 1 Chart, 3 Graphs

Schlagwörter: ALGORITHMS, CRYPTOGRAPHY, FINITE fields, EXPONENTIATION, MULTIPLICATION

Implementation of Real-Time Space Target Detection and Tracking Algorithm for Space-Based Surveillance.

Autoren: Su, Yueqi Chen, Xin Liu, Gaorui et al.

Quelle: Remote Sensing; Jun2023, Vol. 15 Issue 12, p3156, 34p

Schlagwörter: ARTIFICIAL satellite tracking, TRACKING algorithms, DIGITAL signal processing, IMAGE processing, PROCESS capability, IMAGING systems, GATE array circuits

Hardware Design and Implementation of a Lightweight Saber Algorithm Based on DRC Method.

Autoren: Zheng, Weifang Zhang, Huihong Zhang, Yuejun et al.

Quelle: Electronics (2079-9292); Jun2023, Vol. 12 Issue 11, p2525, 15p

Schlagwörter: STATIC random access memory, QUANTUM computers, ALGORITHMS, CLOCKS & watches, HARDWARE, CRYPTOSYSTEMS

A modeling method of algorithm-hardware based on SysML.

Autoren: Yue, Liu Chun, Zhao Lin, Zhang

Quelle: International Journal of Modeling, Simulation & Scientific Computing; Jun2022, Vol. 13 Issue 3, p1-24, 24p

Schlagwörter: RANDOM numbers, SYSTEMS engineering, ENGINEERING systems, INTEGRATED circuits, SIMULATION methods & models

Design and implementation of proposed pipelined adaptive recovery CAMP algorithm for LFMCW radar.

Autoren: Salem, Sameh G.

Quelle: Signal, Image & Video Processing; Mar2021, Vol. 15 Issue 2, p271-278, 8p

Hybrid software-hardware image encryption techniques for network security using multiple chaotic maps.

Autoren: Al Azzo, Fadwa Suhail, Aamer T. Ayoub, Harith G. et al.

Quelle: International Journal of Innovative Research & Scientific Studies; 2025, Vol. 8 Issue 5, p2140-2150, 11p

Schlagwörter: DATA transmission systems, FIELD programmable gate arrays, IMAGE encryption, DATA security, COMPUTER network security

Firma/Körperschaft: NATIONAL Institute of Standards & Technology (U.S.)

Efficient FPGA implementation of polar codes-based information reconciliation for quantum key distribution.

Autoren: Liao, Lianye Wu, Xinyi Chen, Ye et al.

Quelle: Scientific Reports; 10/16/2025, Vol. 15 Issue 1, p1-12, 12p

Schlagwörter: FIELD programmable gate arrays, QUANTUM cryptography, DECODING algorithms, HARDWARE, MECHANICAL efficiency, ECONOMIC efficiency, CHANNEL coding

People: SHANNON, Claude Elwood, 1916-2001

OFDM Encryption Transmission System Based on PLIS (pso-logistic-ipts-slm)

Autoren: Yiting Liu

Quelle: Theoretical and Natural Science. 101:24-33