Search Results - "Types and Design Styles—Algorithms implemented in hardware"
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Authors: et al.
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Subject Terms: Categories and Subject Descriptors, B.6.1 [Logic Design, Design Styles—Parallel Circuits, B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware, Gate arrays General Terms, Algorithms, Design, Performance Additional Key Words and Phrases, Reconfigurable computing, FPGA, super-resolution, motion deblurring
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.385.9566; http://cas.ee.ic.ac.uk/people/gac1/pubs/MariaTRETS09.pdf
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Subject Terms: Categories and Subject Descriptors, B.6.1 [Logic Design, Design Styles—Parallel circuits, B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware, gate arrays General Terms, Algorithms, Design, Performance Additional Key Words and Phrases, Reconfigurable computing, FPGAs, particle systems, special- purpose architectures ACM Reference Format
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.487.6675; http://www.iml.ece.mcgill.ca/~wjgross/papers/Beeckler_Gross_TRETS_2008.pdf
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Subject Terms: Categories and Subject Descriptors, B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware, C.2.2 [Computer-Communication Networks, Network Protocols—Routing protocols, G.1.0 [Numerical Analysis, General—Numerical algorithms, J.7 [Computers in Other Systems]—Military General Terms, Algorithms, Design, Measurement, Performance Additional Key Words and Phrases, Sensor networks, middleware services, time synchronization, message routing, data fusion, acoustic source localization
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.60.9203; http://home.mit.bme.hu/~simon/publications/ACM_SN_Countersniper_2005.pdf
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Authors: et al.
Contributors: et al.
Source: http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/islped04/pdffiles/p357.pdf.
Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles – algorithms implemented in hardware. General Terms Algorithms, Design, Performance. Keywords Radio-frequency identification
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Authors: et al.
Contributors: et al.
Subject Terms: B.7.1 [Integrated Circuits, Types and Design Styles – Algorithms implemented in hardware, C.2.2 [Computer-Communication Networks, Network Protocols – Routing protocols, G.1.0 [Mathematics of Computing, Numerical Analysis – Numerical algorithms, J.7. [Computer Applications, Computers in Other Systems – Military General Terms Algorithms, Design, Measurement, Performance Keywords Sensor Networks, Middleware Services, Time Synchronization, Message Routing, Data Fusion, Acoustic Source Localization
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.324.683; http://www.cs.colorado.edu/~rhan/CSCI_7143_Fall_2007/Papers/countersniper04.pdf
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Subject Terms: Category and Subject Descriptors B.7.1 [Integrated Circuit, Types and Design Styles – Algorithms implemented in hardware General Terms Algorithm, Design, Security Keywords SHA-1, Digital Signature, Secure Hashing Algorithm, Data Security, IPSec, VLSI
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Authors: et al.
Contributors: et al.
Subject Terms: Categories and Subject Descriptors, B.5.2 [Register-Transfer-Level Implementation, Design Aids—automatic synthesis, optimization, B.7.1 [Integrated Circuits, Types and Design Styles— algorithms implemented in hardware General Terms, Algorithms, Design, Performance Additional Key Words and Phrases, Signal processing, saturation arithmetic, synthesis
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.385.5275; http://cas.ee.ic.ac.uk/people/gac1/pubs/GeorgeTODAES03.pdf
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Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware General Terms Design, Performance Keywords Communications, Pipelining, Bus reduction
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Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware General Terms Design, Performance Keywords Communications, Pipelining, Bus reduction
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.126.3112; http://www.eecs.umich.edu/acal/pubs/0083605001018051239.pdf
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Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware General Terms Design, Performance Keywords Communications, Pipelining, Bus reduction
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.11.9187; http://www.sigda.org/Archives/ProceedingArchives/Dac/Dac2002/papers/2002/dac02/htmfiles/sun_sgi/././pdffiles/19_1.pdf
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Source: http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/islped04/pdffiles/p301.pdf.
Subject Terms: Categories and Subject Descriptors B.2 [Arithmetic and Logic Structures, General, B.6 [Logic Design, Design Styles—Combinational logic, B.7 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware General Terms Algorithms, Design Keywords Asynchronous logic, low power, multiplier, Booth’s algorithm
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Subject Terms: Categories and Subject Descriptors, B.5.2 [Register-Transfer-Level Implementation, Design Aids—Automatic synthesis optimization, B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware General Terms, Algorithms, Design, Performance Additional Key Words and Phrases, Signal processing, word-length, bitwidth, synthesis
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.385.6458; http://cas.ee.ic.ac.uk/people/gac1/pubs/GeorgeTODAES06.pdf
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Authors:
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Subject Terms: Categories and Subject Descriptors, B.5.2 [Register-Transfer-Level Implementation, Design Aids — Automatic synthesis, optimization, B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware General Terms, Algorithms, Design, Performance, Power Consumption Additional Key Words and Phrases, Signal processing, word-length, bitwidth, synthesis, power
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.385.4556; http://cas.ee.ic.ac.uk/people/gac1/pubs/JonTODAES09.pdf
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Contributors: The Pennsylvania State University CiteSeerX Archives
Subject Terms: Categories and Subject Descriptors, B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware, C.2.2 [Computer-Communication Networks, Network Protocols—Routing protocols, G.1.0 [Numerical Analysis, General—Numerical algorithms, J.7 [Computers in Other Systems]—Military General Terms, Algorithms, Design, Measurement, Performance Additional Key Words and Phrases, Sensor networks, middleware services, time synchronization, message routing, data fusion, acoustic source localization
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.329.6621; http://home.mit.bme.hu/~kmolnar/download/ledeczi_tosn05.pdf
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Authors: et al.
Contributors: et al.
Source: http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/glsvlsi04/pdffiles/p304.pdf.
Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles – algorithms implemented in hardware, memory technologies. General Terms Algorithms, Design Keywords Magneto–resistive
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Source: http://research.cs.tamu.edu/codesign/Publication-list/DAC 2005.pdf.
Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware General Terms Algorithms, Design Keywords TCAM, Logic Minimization, On-Chip
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Source: http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/glsvlsi04/pdffiles/p444.pdf.
Subject Terms: Categories and Subject Descriptors B.2.4 [Arithmetic and Logic Structures, High-Speed Arithmetic, B.5.1 [Register-Transfer-Level Implemen- tation, Design, B.7.1 [Integrated Circuits, Types and Design Styles—algorithms implemented in hardware, VLSI General Terms Algorithms, Performance, Design Keywords Arithmetic, VLSI
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Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware General Terms Algorithms, Design Keywords TCAM, Logic Minimization, On-Chip
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19
Authors: et al.
Contributors: et al.
Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware, C.2.1 [Computer- Communication Networks, Network Architecture and Design—Wireless communication General Terms
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Source: http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/glsvlsi04/pdffiles/p458.pdf.
Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and design styles – algorithms implemented in hardware, gate arrays. General Terms, Design, Experimentation. Keywords, Type-2 fuzzy logic, interval type-2 fuzzy systems, fuzzy hardware, distributed arithmetic, FPGA
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