Search Results - "Types and Design Styles— Algorithms implemented in hardware General Terms"
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Authors: et al.
Contributors: et al.
Source: http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/islped04/pdffiles/p357.pdf.
Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles – algorithms implemented in hardware. General Terms Algorithms, Design, Performance. Keywords Radio-frequency identification
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Subject Terms: Category and Subject Descriptors B.7.1 [Integrated Circuit, Types and Design Styles – Algorithms implemented in hardware General Terms Algorithm, Design, Security Keywords SHA-1, Digital Signature, Secure Hashing Algorithm, Data Security, IPSec, VLSI
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Authors: et al.
Contributors: et al.
Subject Terms: Categories and Subject Descriptors, B.5.2 [Register-Transfer-Level Implementation, Design Aids—automatic synthesis, optimization, B.7.1 [Integrated Circuits, Types and Design Styles— algorithms implemented in hardware General Terms, Algorithms, Design, Performance Additional Key Words and Phrases, Signal processing, saturation arithmetic, synthesis
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.385.5275; http://cas.ee.ic.ac.uk/people/gac1/pubs/GeorgeTODAES03.pdf
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Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware General Terms Design, Performance Keywords Communications, Pipelining, Bus reduction
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Source: http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/islped04/pdffiles/p301.pdf.
Subject Terms: Categories and Subject Descriptors B.2 [Arithmetic and Logic Structures, General, B.6 [Logic Design, Design Styles—Combinational logic, B.7 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware General Terms Algorithms, Design Keywords Asynchronous logic, low power, multiplier, Booth’s algorithm
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Subject Terms: Categories and Subject Descriptors, B.5.2 [Register-Transfer-Level Implementation, Design Aids—Automatic synthesis optimization, B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware General Terms, Algorithms, Design, Performance Additional Key Words and Phrases, Signal processing, word-length, bitwidth, synthesis
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.385.6458; http://cas.ee.ic.ac.uk/people/gac1/pubs/GeorgeTODAES06.pdf
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Subject Terms: Categories and Subject Descriptors, B.5.2 [Register-Transfer-Level Implementation, Design Aids — Automatic synthesis, optimization, B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware General Terms, Algorithms, Design, Performance, Power Consumption Additional Key Words and Phrases, Signal processing, word-length, bitwidth, synthesis, power
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.385.4556; http://cas.ee.ic.ac.uk/people/gac1/pubs/JonTODAES09.pdf
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Source: http://research.cs.tamu.edu/codesign/Publication-list/DAC 2005.pdf.
Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware General Terms Algorithms, Design Keywords TCAM, Logic Minimization, On-Chip
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9
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Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware General Terms Algorithms, Design Keywords TCAM, Logic Minimization, On-Chip
File Description: application/pdf
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10
Authors: et al.
Contributors: et al.
Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware General Terms Algorithms, Design, Performance
File Description: application/pdf
Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.228.5206; http://ballade.cs.ucla.edu/%7Econg/papers/fpga12.pdf
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Contributors: The Pennsylvania State University CiteSeerX Archives
Subject Terms: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware General Terms Algorithms, Performance, Design Keywords Lithography simulation, Co-processor acceleration, FPGA
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Source: 2015 International Conference on Compilers, Architecture & Synthesis for Embedded Systems (CASES); 2015, p109-116, 8p
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Source: ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics & Design; 2006, p406-411, 6p
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Authors: et al.
Source: Proceedings of the 2004 International Symposium Low Power Electronics & Design; 8/9/2004, p357-362, 6p
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Source: Proceedings of the 2004 International Symposium Low Power Electronics & Design; 8/9/2004, p301-306, 6p
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Source: Proceedings of the 2004 International Symposium Low Power Electronics & Design; 8/9/2004, p296-300, 5p
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Source: ACM Transactions on Embedded Computing Systems; Apr2015, Vol. 14 Issue 3, p45:1-45:32, 32p
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Authors: et al.
Source: ACM Transactions on Embedded Computing Systems; Dec2013, Vol. 13 Issue 3, p42:1-42:17, 17p
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Authors: et al.
Source: ACM Transactions on Embedded Computing Systems; Nov2013, Vol. 13 Issue Supp 1, p1-25, 25p
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Source: ACM Transactions on Embedded Computing Systems; Mar2013, Vol. 12 Issue Supp 1, p63:1-63:26, 26p
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