Výsledky vyhledávání - "Types and Design Style—Gate arrays"

HARP: Hard-wired Routing Pattern FPGAS

Autoři: Satish Sivaswamy Gang Wang Cristinel Ababei a další

Přispěvatelé: Satish Sivaswamy Gang Wang Cristinel Ababei a další

Zdroj: http://www.ece.umn.edu/users/kia/Papers/2005/fpga05_harp.pdf.

Témata: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Style—Gate arrays, B.7.2 [Integrated Circuits, Design Aids—Routing General Terms Design, Performance, Experimentation

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.74.3583; http://www.ece.umn.edu/users/kia/Papers/2005/fpga05_harp.pdf

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.74.3583
http://www.ece.umn.edu/users/kia/Papers/2005/fpga05_harp.pdf

HARP: Hard-wired Routing Pattern FPGAs

Autoři: Satish Sivaswamy Gang Wang Cristinel Ababei a další

Přispěvatelé: Satish Sivaswamy Gang Wang Cristinel Ababei a další

Zdroj: http://www.ics.uci.edu/~eli/publications/conference/p21-sivaswamy.pdf.

Témata: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Style—Gate arrays, B.7.2 [Integrated Circuits, Design Aids—Routing General Terms Design, Performance, Experimentation

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.61.561

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.61.561
http://www.ics.uci.edu/~eli/publications/conference/p21-sivaswamy.pdf

Fast Timing-driven Partitioning-based Placement for Island Style FPGAs

Autoři: Pongstorn Maidee Cristinel Ababei Kia Bazargan a další

Přispěvatelé: Pongstorn Maidee Cristinel Ababei Kia Bazargan a další

Zdroj: http://www.ece.umn.edu/users/kia/Papers/2003/DAC03_fpga_plc-maidee.pdf.

Témata: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Style—Gate arrays, B.7.2 [Integrated Circuits, Design Aids—Placement and routing. General Terms Performance, Experimentation Keywords FPGAs, FPGA placement, timing-driven placement, partitioning based

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.76.401

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.76.401
http://www.ece.umn.edu/users/kia/Papers/2003/DAC03_fpga_plc-maidee.pdf

35.1 Fast Timing-driven Partitioning-based Placement for Island Style FPGAs

Autoři: Pongstorn Maidee Cristinel Ababei Kia Bazargan a další

Přispěvatelé: Pongstorn Maidee Cristinel Ababei Kia Bazargan a další

Zdroj: http://www.sigda.org/Archives/ProceedingArchives/Dac/Dac2003/papers/2003/dac03/pdffiles/35_1.pdf.

Témata: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Style—Gate arrays, B.7.2 [Integrated Circuits, Design Aids—Placement and routing. General Terms Performance, Experimentation Keywords FPGAs, FPGA placement, timing-driven placement, partitioning based

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.97.2808; http://www.sigda.org/Archives/ProceedingArchives/Dac/Dac2003/papers/2003/dac03/pdffiles/35_1.pdf

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.97.2808
http://www.sigda.org/Archives/ProceedingArchives/Dac/Dac2003/papers/2003/dac03/pdffiles/35_1.pdf