Výsledky vyhľadávania - "Synthesis and Optimization of DSP Algorithms"

Synthesis and Optimization of DSP Algorithms

Synthesis and optimization of DSP algorithms

Autori: Cheung, Peter Y. K. Luk, Wayne. Constantinides, George A., 1975

Témy: Signal processing -- Digital techniques., Digital communications -- Equipment and supplies -- Design -- Data processing., Text

URL: http://digital.library.tu.ac.th/tu_dc/frontend/Info/item/dc:16298

Synthesis and Optimization of DSP Algorithms

Autori: George Constantinides Peter Y.K. Cheung Wayne Luk

Typ zdroja: eBook.

Predmet: Signal processing--Digital techniques, Digital communications--Equipment and supplies--Design--Data processing

Kategórie: TECHNOLOGY & ENGINEERING / Telecommunications, COMPUTERS / Design, Graphics & Media / CAD-CAM, COMPUTERS / Computer Architecture, COMPUTERS / Computer Science, COMPUTERS / Programming / General, TECHNOLOGY & ENGINEERING / Electronics / Circuits / General

Background

Zdroj: Synthesis and Optimization of DSP Algorithms ; page 5-13 ; ISBN 1402079303

Dostupnosť: http://dx.doi.org/10.1007/1-4020-7931-1_2
http://link.springer.com/content/pdf/10.1007/1-4020-7931-1_2.pdf

Peak Value Estimation

Zdroj: Synthesis and Optimization of DSP Algorithms ; page 15-26 ; ISBN 1402079303

Dostupnosť: http://dx.doi.org/10.1007/1-4020-7931-1_3
http://link.springer.com/content/pdf/10.1007/1-4020-7931-1_3.pdf

Saturation Arithmetic

Zdroj: Synthesis and Optimization of DSP Algorithms ; page 79-111 ; ISBN 1402079303

Dostupnosť: http://dx.doi.org/10.1007/1-4020-7931-1_5
http://link.springer.com/content/pdf/10.1007/1-4020-7931-1_5.pdf

Scheduling and Resource Binding

Zdroj: Synthesis and Optimization of DSP Algorithms ; page 113-148 ; ISBN 1402079303

Dostupnosť: http://dx.doi.org/10.1007/1-4020-7931-1_6
http://link.springer.com/content/pdf/10.1007/1-4020-7931-1_6.pdf

Conclusion

Zdroj: Synthesis and Optimization of DSP Algorithms ; page 149-150 ; ISBN 1402079303

Dostupnosť: http://dx.doi.org/10.1007/1-4020-7931-1_7
http://link.springer.com/content/pdf/10.1007/1-4020-7931-1_7.pdf

Introduction

Zdroj: Synthesis and Optimization of DSP Algorithms ; page 1-3 ; ISBN 1402079303

Dostupnosť: http://dx.doi.org/10.1007/1-4020-7931-1_1
http://link.springer.com/content/pdf/10.1007/1-4020-7931-1_1.pdf

Word-Length Optimization

Zdroj: Synthesis and Optimization of DSP Algorithms ; page 27-78 ; ISBN 1402079303

Dostupnosť: http://dx.doi.org/10.1007/1-4020-7931-1_4
http://link.springer.com/content/pdf/10.1007/1-4020-7931-1_4.pdf

Towards Hardware IIR Filters Computing Just Right: Direct Form I Case Study.

Autori: Volkova, Anastasia Istoan, Matei de Dinechin, Florent a ďalší

Zdroj: IEEE Transactions on Computers; 4/1/2019, Vol. 68 Issue 4, p597-608, 12p

Predmety: IMAGE compression, INFINITE impulse response filters

Optimized pure hardware FPGA-based implementation of active disturbance rejection control.

Autori: Stankovic, Momir Naumovic, Milica Manojlovic, Stojadin a ďalší

Zdroj: Electrical Engineering; Mar2018, Vol. 100 Issue 1, p111-121, 11p

Predmety: FIELD programmable gate arrays, COMPUTER hardware description languages, PROGRAMMABLE logic devices, GATE array circuits, VERILOG (Computer hardware description language)

Hardware reduction of DSP kernel data path using carry save arithmetic operation in fused add multiply add unit.

Autori: Navaneethan, S. Parvathavarthini, B.

Zdroj: 2015 Online International Conference on Green Engineering & Technologies (IC-GET); 2015, p1-6, 6p

Flexible DSP Accelerator Architecture Exploiting Carry-Save Arithmetic.

Autori: Tsoumanis, Kostas Xydis, Sotirios Zervakis, Georgios a ďalší

Zdroj: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Jan2016, Vol. 24 Issue 1, p368-372, 5p

Predmety: DIGITAL signal processing, CARRY-lookahead adders, ARITHMETIC, INTEGRATED circuits, DESIGN templates

Power optimized high level synthesis of Multiply-and-Accumulate (MAC) based digital filter architectures under SNR constraints.

Autori: Manga, N. Alivelu Latha, M. Madhavi

Zdroj: International Conference on Information Communication & Embedded Systems (ICICES2014); 2014, p1-7, 7p

Energy efficient MIMO processing: A case study of opportunistic run-time approximations.

Autori: Novo, David Farahpour, Nazanin Ienne, Paolo a ďalší

Zdroj: 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE); 01/01/2014, p1-6, 6p

Novel algorithms for word-length optimization.

Autori: Nguyen, H.-N. Menard, D. Sentieys, O.

Zdroj: 2011 19th European Signal Processing Conference; 2011, p1944-1948, 5p

New L2-dynamic-range-scaling constraints for lowparametric sensitivity realizations.

Autori: Hilaire, Thibault

Zdroj: 2009 17th European Signal Processing Conference; 2009, p988-992, 5p

Symbolic Noise Analysis Approach to Computational Hardware Optimization.

Autori: Ahmadi, Arash Zwolinski, Mark

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; 2008, p391-396, 6p, 1 Diagram, 6 Charts, 2 Graphs

Predmety: COMPUTER input-output equipment, ALGORITHMS, MATHEMATICAL optimization, ARTIFICIAL intelligence, SYSTEMS development

Technology Review.

Autori: Woods, Roger McAllister, John Lightbody, Gaye a ďalší

Zdroj: FPGA-Based Implementation of Signal Processing Systems; 2008, p57-76, 20p