Suchergebnisse - "Subgraph enumeration algorithm"

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  1. 1

    Parallel custom instruction identification for extensible processors

    Autoren: Xiao, Chenglong Wang, Shanshan Liu, Wanjun et al.

    Weitere Verfasser: Xiao, Chenglong Wang, Shanshan Liu, Wanjun et al.

    Quelle: Journal of Systems Architecture. 76:149-159

    Schlagwörter: [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], Parallel algorithms, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Custom instruction, Subgraph enumeration algorithm, 02 engineering and technology, Extensible processors, Subgraph selection algorithm, 01 natural sciences

    Zugangs-URL: https://inria.hal.science/hal-01587020v1
    https://doi.org/10.1016/j.sysarc.2016.11.011
    https://dblp.uni-trier.de/db/journals/jsa/jsa76.html#XiaoWLC17
    https://hal.inria.fr/hal-01587020
    https://www.sciencedirect.com/science/article/pii/S1383762116302193
    http://www.sciencedirect.com/science/article/pii/S1383762116302193

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  2. 2

    Improving high-level synthesis effectiveness through custom operator identification

    Autoren: Xiao, Chenglong Casseau, Emmanuel

    Weitere Verfasser: Xiao, Chenglong Casseau, Emmanuel

    Quelle: 2014 IEEE International Symposium on Circuits and Systems (ISCAS). :161-164

    Schlagwörter: 2. Zero hunger, subgraph enumeration algorithm, [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], custom operator, high-level synthesis, 0211 other engineering and technologies, 0202 electrical engineering, electronic engineering, information engineering, DFG, 02 engineering and technology, subgraph selection algorithm

    Zugangs-URL: https://inria.hal.science/hal-00931036v1
    https://hal.inria.fr/hal-00931036
    https://dblp.uni-trier.de/db/conf/iscas/iscas2014.html#XiaoC14
    https://ieeexplore.ieee.org/document/6865090/

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  3. 3

    Disjoint pattern enumeration for custom instructions identification

    Autoren: Yu, P. Mitra, T. COMPUTER SCIENCE

    Weitere Verfasser: Yu, P. Mitra, T. COMPUTER SCIENCE

    Quelle: Scopus

    Schlagwörter: ASIPs, Custom instruction, Customizable processors, Instruction-set extensions, Subgraph enumeration algorithm

    Relation: http://scholarbank.nus.edu.sg/handle/10635/41933; 000252360200043

    Verfügbarkeit: http://scholarbank.nus.edu.sg/handle/10635/41933

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  4. 4

    Scalable custom instructions identification for instruction-set extensible processors

    Autoren: Yu, P. Mitra, T. COMPUTER SCIENCE

    Weitere Verfasser: Yu, P. Mitra, T. COMPUTER SCIENCE

    Quelle: Scopus

    Schlagwörter: ASIPs, Customizable processors, Instruction-set extensions, Subgraph enumeration algorithm

    Relation: http://scholarbank.nus.edu.sg/handle/10635/40800; NOT_IN_WOS

    Verfügbarkeit: http://scholarbank.nus.edu.sg/handle/10635/40800

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  5. 5

    Custom Operator Identification for High-level Synthesis ; Identification d'opérateurs spécifiques pour la synthèse de haut niveau

    Autoren: Xiao, Chenglong Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources (CAIRN) Inria Rennes – Bretagne Atlantique et al.

    Weitere Verfasser: Xiao, Chenglong Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources (CAIRN) Inria Rennes – Bretagne Atlantique et al.

    Quelle: https://theses.hal.science/tel-00759040 ; Electronics. Université Rennes 1, 2012. English. ⟨NNT : 2012REN1E005⟩.

    Schlagwörter: custom operator, subgraph enumeration algorithm, subgraph selection algorithm, code transformation, high-level synthesis, opérateurs spécifiques, algorithmes d'énumération de sous-graphes, algorithmes de sélection de sous-graphes, transformation de code, synthèse de haut niveau, [SPI.TRON]Engineering Sciences [physics]/Electronics

    Relation: NNT: 2012REN1E005

    Verfügbarkeit: https://theses.hal.science/tel-00759040
    https://theses.hal.science/tel-00759040v1/document
    https://theses.hal.science/tel-00759040v1/file/Thesis_C_Xiao.pdf

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  6. 6

    Custom Operator Identification for High-level Synthesis

    Autoren: Xiao, Chenglong Casseau, Emmanuel

    Weitere Verfasser: Xiao, Chenglong Casseau, Emmanuel

    Schlagwörter: algorithmes de sélection de sous-graphes, subgraph enumeration algorithm, transformation de code, custom operator, algorithmes d'énumération de sous-graphes, synthèse de haut niveau, high-level synthesis, opérateurs spécifiques, subgraph selection algorithm, code transformation, [SPI.TRON] Engineering Sciences [physics]/Electronics

    Dateibeschreibung: application/pdf

    Zugangs-URL: https://theses.hal.science/tel-00759040v1

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  7. 7

    Design methodologies for instruction-set extensible processors

    Autoren: PAN YU COMPUTER SCIENCE TULIKA MITRA

    Weitere Verfasser: PAN YU COMPUTER SCIENCE TULIKA MITRA

    Schlagwörter: ASIPs, instruction-set extensions, subgraph enumeration algorithm, worst case execution time, adaptive architectures, performance optimization

    Relation: http://scholarbank.nus.edu.sg/handle/10635/15915; NOT_IN_WOS

    Verfügbarkeit: http://scholarbank.nus.edu.sg/handle/10635/15915

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