Search Results - "Programming languages—Optimisation Keywords Address generation"

Systematic Speed-Power Memory Data-Layout Exploration for Cache Controlled Embedded Multimedia Applications

Authors: M. Miranda C. Ghez C. Kulkarni et al.

Contributors: M. Miranda C. Ghez C. Kulkarni et al.

Source: http://www.capsl.udel.edu/COMPILER/ISSS01/isss01/papers/2001/isss01/pdffiles/p107.pdf.

Subject Terms: Categories and Subject Descriptors B.3.2 [Hardware, Memory structures—Cache memories, D.3.4 [Software, Programming languages—Optimisation Keywords Address generation, direct mapped cache, embedded systems

File Description: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.16.3075; http://www.capsl.udel.edu/COMPILER/ISSS01/isss01/papers/2001/isss01/pdffiles/p107.pdf

Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.16.3075
http://www.capsl.udel.edu/COMPILER/ISSS01/isss01/papers/2001/isss01/pdffiles/p107.pdf

Systematic speed-power memory data-layout exploration for cache controlled embedded multimedia applications.

Authors: Miranda, M. Ghez, C. Kulkarni, C. et al.

Source: International Symposium on System Synthesis (IEEE Cat. No.01EX526); 2001, p107-112, 6p