Suchergebnisse - "Programmable array logic."

Reasoning About Arrays.

Autoren: Reynolds, John C.¹

Quelle: Communications of the ACM. May79, Vol. 22 Issue 5, p290-299. 10p.

Schlagwörter: *ALGORITHMS, *PROGRAMMING languages, PROGRAMMABLE array logic, REASONING, COMPUTER logic, BINARY number system, PARTITIONS (Mathematics)

Digital and programmable economy applications: A smart cities congestion case by fuzzy sets

Autoren: Herraiz Faixó, Ferran Arroyo Cañada, Francisco Javier López-Jurado González, María Pilar et al.

Quelle: Dipòsit Digital de la UB
Universidad de Barcelona
Articles publicats en revistes (Empresa)
instname

Schlagwörter: Fuzzy sets, Conjunts borrosos, Congestió del trànsit, Economics, 9. Industry and infrastructure, Programmable array logic, Digital storytelling, 02 engineering and technology, Economia, Cadena de blocs (Bases de dades), 12. Responsible consumption, Ciutats intel·ligents, Blockchains (Databases), 13. Climate action, 8. Economic growth, 11. Sustainability, 0202 electrical engineering, electronic engineering, information engineering, Narrativa digital, Xarxa lògica programable, Traffic congestion, Smart cities

Dateibeschreibung: application/pdf

Zugangs-URL: http://hdl.handle.net/2445/183945
https://hdl.handle.net/2445/183945
https://content.iospress.com/articles/journal-of-intelligent-and-fuzzy-systems/ifs179632
https://dblp.uni-trier.de/db/journals/jifs/jifs38.html#Herraiz-FaixoAL20

Efficient openCL-based particle-in-cell simulation of auroral plasma phenomena within a commodity spatially reconfigurable computing environment : a dissertation

Autoren: Almomany, Abedalmuhdi M.

Schlagworte: Gate array circuits., Programmable array logic., Programmable logic devices., Space plasmas., Plasma (Ionized gases) Mathematical models., Circuits prédiffusés., Logique à réseau programmable., Dispositifs logiques programmables., Plasmas cosmiques., Plasma (Gaz ionisés) Modèles mathématiques., Gate array circuits, Plasma (Ionized gases) Mathematical models, Programmable array logic, Programmable logic devices, Space plasmas

Index Begriffe: dissertations., Academic theses, Academic theses., Thèses et écrits académiques.

URL: https://louis.uah.edu/uah-dissertations/128

Near-range point spread function coarray analysis for array imaging.

Autoren: He, Lin Kassam, Saleem

Quelle: IEEE Transactions on Aerospace & Electronic Systems. Jan2015, Vol. 51 Issue 1, p397-404. 8p.

Schlagwörter: *MATHEMATICAL models, PROGRAMMABLE array logic, WAVELENGTHS, FOURIER transforms, ELECTRONIC systems, REFLECTANCE

Wideband Fully-Programmable Dual-Mode CMOS Analogue Front-End for Electrical Impedance Spectroscopy.

Autoren: Valente, Virgilio Demosthenous, Andreas

Quelle: Sensors (14248220). Aug2016, Vol. 16 Issue 8, p1159. 20p.

Schlagwörter: *BROADBAND communication systems, *PROGRAMMABLE array logic, *CMOS image sensors, *ELECTRICAL impedance tomography, *ELECTROCHEMICAL analysis, *BIOSENSORS

Autonomous stereo vision system for depth computation of moving object

Autoren: Oviedo, Alejandro Emerio Alfonso (Author) Ryerson University (Degree granting institution)

Weitere Verfasser: Oviedo, Alejandro Emerio Alfonso (Author) Ryerson University (Degree granting institution)

Schlagwörter: Artificial satellites -- Control systems, Programmable array logic, Field programmable gate arrays, Computer algorithms

Zugangs-URL: https://rshare.library.ryerson.ca/articles/thesis/Autonomous_stereo_vision_system_for_depth_computation_of_moving_object/14661516/files/28144122.pdf
https://rshare.library.ryerson.ca/articles/thesis/Autonomous_stereo_vision_system_for_depth_computation_of_moving_object/14661516

Architecture and implementation of a high frame-rate stereo vision system

Autoren: Islam, Jamin (Author) Ryerson University (Degree granting institution) Maclean, W. James (Degree supervisor) et al.

Weitere Verfasser: Islam, Jamin (Author) Ryerson University (Degree granting institution) Maclean, W. James (Degree supervisor) et al.

Schlagwörter: Artificial satellites -- Control systems, Programmable array logic, Field programmable gate arrays, Computer algorithms

Zugangs-URL: https://rshare.library.ryerson.ca/articles/thesis/Architecture_and_implementation_of_a_high_frame-rate_stereo_vision_system/14648928/files/28129143.pdf
https://figshare.com/articles/thesis/Architecture_and_implementation_of_a_high_frame-rate_stereo_vision_system/14648928/files/28129143.pdf
https://rshare.library.ryerson.ca/articles/thesis/Architecture_and_implementation_of_a_high_frame-rate_stereo_vision_system/14648928

SPFD-Based Wire Removal in Standard-Cell and Network-of-PLA Circuits.

Quelle: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Jul2004, Vol. 23 Issue 7, p1020-1030. 11p.

Schlagwörter: *PROGRAMMABLE controllers, PROGRAMMABLE array logic, STANDARD cells, ELECTRONIC circuits, PROGRAMMABLE logic devices, MICROPROCESSORS, ELECTRIC batteries

Performance-Driven Mapping for CPLD Architectures.

Autoren: Chen, Deming Cong, Jason Ercegovac, Milos et al.

Quelle: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Oct2003, Vol. 22 Issue 10, p1424-1431. 8p. 10 Diagrams, 4 Charts, 2 Graphs.

Schlagwörter: PROGRAMMABLE logic devices, PROGRAMMABLE array logic

Inversion schemes for sublithographic programmable logic arrays.

Autoren: Gojman, B. Manem, H. Rose, G. S. et al.

Quelle: IET Computers & Digital Techniques (Institution of Engineering & Technology). Nov2009, Vol. 3 Issue 6, p625-642. 18p. 9 Diagrams, 7 Charts, 2 Graphs.

Schlagwörter: PROGRAMMABLE logic devices, PROGRAMMABLE array logic, ELECTRONIC equipment, VERY large scale circuit integration, DIGITAL electronics

Optimizing Aggregate Array Computations in Loops.

Autoren: Liu, Yanhong A. Stoller, Scott D. Ning Li et al.

Quelle: ACM Transactions on Programming Languages & Systems. Jan2005, Vol. 27 Issue 1, p91-125. 35p.

Schlagwörter: *ALGORITHMS, *COMPUTER programming, *MATHEMATICAL analysis, PROGRAMMABLE array logic, PROGRAM transformation, LOOPS (Group theory)

From Flop to Megaflops: Java for Technical Computing.

Autoren: Moreira, Jose E. Midkiff, Samuel P.

Quelle: ACM Transactions on Programming Languages & Systems. Mar2000, Vol. 22 Issue 2, p265. 31p. 13 Diagrams, 2 Charts, 5 Graphs.

Schlagwörter: *MATHEMATICAL optimization, PROGRAMMABLE array logic

A HIGH-SPEED, PROGRAMMABLE, CSD COEFFICIENT FIR FILTER.

Autoren: Zhangwen Tang Jie Zhang Hao Min

Quelle: IEEE Transactions on Consumer Electronics. Nov2002, Vol. 48 Issue 4, p834. 4p. 5 Diagrams, 2 Charts, 1 Graph.

Schlagwörter: *COMPUTER programming, PROGRAMMABLE array logic, FILTERS (Mathematics)

A Novel Nonvolatile Memory Cell Suitable for Both Flash and Byte-Writable Applications.

Autoren: Caywood, John M. Chih-Jen Huang Chang, Y.J.

Quelle: IEEE Transactions on Electron Devices. May2002, Vol. 49 Issue 5, p802. 6p. 3 Black and White Photographs, 2 Diagrams, 3 Charts, 9 Graphs.

Schlagwörter: PROGRAMMABLE array logic, ARRAY processors, READ-only memory

Costing Nested Array Codes.

Autoren: Lechtchinsky, Roman Chakravarty, Manuel M. T. Keller, Gabriele

Quelle: Parallel Processing Letters. Jun2002, Vol. 12 Issue 2, p249. 18p.

Schlagwörter: *DATA structures, PROGRAMMABLE array logic, FUNCTIONAL programming (Computer science)

General design principles of totally self-checking code-disjoint inverter-free PLAs.

Autoren: Piestrak, S.J.¹

Quelle: IEE Proceedings -- Circuits, Devices & Systems. Feb2004, Vol. 151 Issue 1, p37-44. 8p.

Schlagwörter: PROGRAMMABLE array logic, PROGRAMMABLE logic devices, ELECTRIC circuits, LOGIC devices, DIGITAL electronics, ELECTRONIC systems

FPGA Based Front-End Electronics for a High Resolution PET Scanner.

Autoren: Young, John W. Moyers, J.C.

Quelle: IEEE Transactions on Nuclear Science. Aug2000 Part 2 of 3, Vol. 47 Issue 4, p1676. 5p. 1 Black and White Photograph, 7 Diagrams, 2 Graphs.

Schlagwörter: PROGRAMMABLE array logic, TOMOGRAPHY, ELECTRONICS, POSITRON emission tomography, DETECTORS, EQUIPMENT & supplies

PICO PROCESSORS.

Autoren: Chapman, Ken

Quelle: Electronics Systems & Software. Jun/Jul2003, Vol. 1 Issue 3, p28. 4p.

Schlagwörter: *LOGIC, FIELD programmable gate arrays, PROGRAMMABLE array logic, NETWORK processors, PROGRAMMABLE logic devices

Codes correcting phased burst erasures.

Autoren: Keren, Osnat Litsyn, Simon

Quelle: IEEE Transactions on Information Theory. Jan98, Vol. 44 Issue 1, p416. 5p. 2 Charts.

Schlagwörter: PROGRAMMABLE array logic, CODING theory, CIPHERS

Optimal folding of PLAs from a switching theory view point.

Autoren: Calvo, J. Acha, J.I.

Quelle: International Journal of Electronics. May95, Vol. 78 Issue 5, p887. 16p.

Schlagwörter: PROGRAMMABLE logic devices, PROGRAMMABLE array logic