Výsledky vyhledávání - "Performance and Reliability—Performance Analysis and Design Aids General Terms Algorithms"

Dynamic Binary Translation (DBT) and Dynamic Binary Optimization

Autoři: Demos Pavlou Enric Gibert Fern O Latorre Antonio Gonzalez a další

Přispěvatelé: Demos Pavlou Enric Gibert Fern O Latorre Antonio Gonzalez a další

Zdroj: http://www.cl.cam.ac.uk/research/srg/netos/vee_2012/papers/p159.pdf.

Témata: Categories and Subject Descriptors B.8.2 [Hardware, Performance and Reliability—Performance Analysis and Design Aids General Terms Algorithms, Design, Performance Keywords Co-designed processors, hardware acceleration, dynamic binary optimization, start-up overhead

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.403.2146; http://www.cl.cam.ac.uk/research/srg/netos/vee_2012/papers/p159.pdf

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.403.2146
http://www.cl.cam.ac.uk/research/srg/netos/vee_2012/papers/p159.pdf

A Comparison of CPUs, GPUs, FPGAs, and Massively Parallel Processor Arrays for Random Number Generation

Autoři: David B. Thomas Lee Howes Wayne Luk a další

Přispěvatelé: David B. Thomas Lee Howes Wayne Luk a další

Zdroj: http://www.doc.ic.ac.uk/~dt10/research/thomas-09-comparison-of-architectures-for-rng.pdf.

Témata: B.8.2 [Hardware, Performance and Reliability—Performance Analysis and Design Aids General Terms Algorithms, Design, Performance Keywords Monte-Carlo, Random Numbers, FPGA, GPU, MPPA

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.149.6066

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.149.6066
http://www.doc.ic.ac.uk/~dt10/research/thomas-09-comparison-of-architectures-for-rng.pdf

Statistical Path Tracing in Timing Graphs.

Autoři: Rao, Vasant Sinha, Debjit Srimal, Nitin a další

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2016, p671-676, 6p

Témata: DIGITAL electronics, SIMULATION methods & models, TIMING circuits, PATH analysis (Statistics), DETERMINISTIC processes

Practical Statistical Static Timing Analysis with Current Source Models.

Autoři: Sinha, Debjit Zolotov, Vladimir Raghunathan, Sheshashayee K. a další

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2016, p665-670, 6p

Témata: STATICS, STATISTICS, IDEAL sources (Electric circuits), TIMING circuits, GATE array circuits

Early stage real-time SoC power estimation using RTL instrumentation.

Autoři: Jianlei Yang Liwei Ma Kang Zhao a další

Zdroj: 20th Asia & South Pacific Design Automation Conference; 2015, p779-784, 6p

Reinforcement learning based power management for hybrid electric vehicles.

Autoři: Lin, Xue Wang, Yanzhi Bogdan, Paul a další

Zdroj: 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD); 2014, p33-38, 6p

Workload- and Instruction-Aware Timing Analysis - The missing Link between Technology and System-level Resilience.

Autoři: Kleeberger, Veit B. Maier, Petra R. Schlichtmann, Ulf

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; 2014, p275-280, 6p

Témata: EMBEDDED computer systems, LOGIC circuits, ALGORITHMS, DIRECTED acyclic graphs, COMPUTER input-output equipment, ELECTRICAL load

Speeding up Computation of the max/min of a set of Gaussians for Statistical Timing Analysis and Optimization.

Autoři: Kuruvilla, Vimitha Sinha, Debjit Piaget, Jeff a další

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2013, p1-7, 7p

Témata: CLUSTER analysis (Statistics), RANDOM variables, TIMING circuits, MATHEMATICAL variables, GAUSSIAN elimination

The role of Cascade, a cycle-based simulation infrastructure, in designing the Anton special-purpose supercomputers.

Autoři: Grossman, J. P. Towles, Brian Bank, Joseph A. a další

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2013, p1-9, 9p

Témata: SUPERCOMPUTERS, SIMULATION software, DEBUGGING, MOLECULAR dynamics, VERILOG (Computer hardware description language)

Reversible Statistical max/min Operation: Concept and Applications to Timing.

Autoři: Sinha, Debjit Visweswariah, Chandu Jinjun Xiong a další

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2012, p1067-1073, 7p

Témata: SHAPE memory effect, PROGRAM transformation, RANDOM variables, GAUSSIAN distribution, GAUSSIAN processes, INTEGRATED circuits

Functional Timing Analysis Made Fast and General.

Autoři: Yi-Ting Chung Jiang, Jie-Hong Roland

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2012, p1055-1060, 6p

Témata: SATISFIABILITY (Computer science), CRITICAL path analysis, CHARACTERISTIC functions, INDUSTRIAL design coordination, STRUCTURAL equation modeling, SYSTEMS design, COMPUTER network architectures

Near-Optimal, Dynamic Module Reconfiguration in a Photovoltaic System to Combat Partial Shading Effects.

Autoři: Xue Lin Yanzhi Wang Siyu Yue a další

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2012, p516-521, 6p

Témata: PHOTOVOLTAIC cells, ALGORITHMS, DYNAMIC programming, RENEWABLE natural resources, MATHEMATICAL programming, NONLINEAR programming

BLAST: Efficient Computation of Nonlinear Delay Sensitivities in Electronic and Biological Networks using Barycentric Lagrange enabled Transient Adjoint Analysis.

Autoři: Meir, Arie Roychowdhury, Jaijeet

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2012, p301-310, 10p, 5 Diagrams, 3 Charts, 5 Graphs

Témata: NONLINEAR programming, LAGRANGE spectrum, ELECTRIC transients, WAVE analysis, ADJOINT differential equations, STRUCTURAL optimization, INTERPOLATION algorithms

Functional timing analysis made fast and general.

Autoři: Chung, Yi-Ting Jiang, Jie-Hong Roland

Zdroj: DAC Design Automation Conference 2012; 1/ 1/2012, p1055-1060, 6p

Near-optimal, dynamic module reconfiguration in a photovoltaic system to combat partial shading effects.

Autoři: Lin, Xue Wang, Yanzhi Yue, Siyu a další

Zdroj: DAC Design Automation Conference 2012; 1/ 1/2012, p516-521, 6p

Fast Algorithms for IR Voltage Drop Analysis Exploiting Locality.

Autoři: Köse, Selçuk Friedman, Eby G.

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2011, p996-1001, 6p, 4 Diagrams, 4 Charts, 4 Graphs

Témata: EUCLIDEAN algorithm, MICROPROCESSORS, LINEAR systems, ELECTRIC networks, INTEGRATED circuits, FLIP chip technology, ELECTRIC impedance

A Statistical Simulation Method for Reliability Analysis of SRAM Core-Cells.

Autoři: Fonseca, R. A. Dilillo, L. Bosio, A. a další

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2010, p853-856, 4p, 2 Diagrams, 2 Graphs

Témata: COMPUTER storage devices, RELIABILITY in engineering, SIMULATION methods & models, GAUSSIAN distribution, MONTE Carlo method

A Universal State-of-Charge Algorithm for Batteries.

Autoři: Bingjun Xiao Yiyu Shi Lei He

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2010, p687-692, 6p, 1 Diagram, 6 Graphs

Témata: MATHEMATICAL models, ELECTRIC batteries, ELECTRIC potential, ENERGY measurement, ELECTRIC charge, DIRECT current circuits

On the Costs and Benefits of Stochasticity in Stream Processing.

Autoři: Nadakuditi, Raj R. Markov, Igor L.

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jun2010, p320-325, 6p, 2 Diagrams, 1 Chart, 7 Graphs

Témata: INTEGRATED circuits, MOORE'S law, STOCHASTIC analysis, SPECTRAL theory, RANDOM matrices, COMPUTER simulation

Throughput Optimal Task Allocation under Thermal Constraints for Multi-core Processors.

Autoři: Hanumaiah, Vinay Rao, Ravishankar Vrudhula, Sarma a další

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; Jul2009, p776-781, 6p, 1 Diagram, 6 Graphs

Témata: HIGH performance processors, TEMPERATURE, MICROPROCESSORS, ALGORITHMS, MATHEMATICAL optimization