Search Results - "Parallel Computer"

Efficient data redistribution for malleable applications

Authors: Iker Martín Álvarez José I. Aliaga Maribel Castillo et al.

Source: UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
SC-W '23: Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis

Subject Terms: Supercomputadors, Parallel computer programs, Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors, Data redistribution, Emulations, MPI, Malleability

File Description: application/pdf

Automatically Accelerating Non-Numerical Programs by Architecture-Compiler Co-Design.

Authors: Campanoni, Simone Brownell, Kevin Kanev, Svilen et al.

Source: Communications of the ACM. Dec2017, Vol. 60 Issue 12, p88-97. 10p. 4 Diagrams, 1 Chart, 3 Graphs.

Subject Terms: *COMPUTER architecture, PARALLEL computer software, PARALLELIZING compilers, MICROPROCESSOR design & construction, MULTICORE processors

Configurable synthetic application for studying malleability in HPC

Authors: Martín Álvarez, Iker Aliaga, José I. Castillo, Maribel et al.

Source: UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)

Subject Terms: Simulations, Supercomputadors, Parallel computer programs, Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors, Simulació per ordinador, Malleability, MPI, Iterative Methods

File Description: application/pdf

Access URL: https://hdl.handle.net/2117/402051
https://doi.org/10.1109/pdp59025.2023.00027

Program Verification: Vision and Reality.

Authors: Vardi, Moshe Y.¹ vardi@cs.rice.edu

Source: Communications of the ACM. Jul2021, Vol. 64 Issue 7, p5-5. 1p.

Subject Terms: *COMPUTER software, *COMPUTER programming, *COST effectiveness, PARALLEL computer program verification, MACHINE learning

Spending Moore's Dividend.

Authors: LARUS, JAMES¹ larus@microsoft.com

Source: Communications of the ACM. May2009, Vol. 52 Issue 5, p62-69. 8p. 1 Color Photograph, 1 Diagram, 3 Charts, 4 Graphs.

Subject Terms: *COMPUTER software, *INTEGRATED circuits, PARALLEL computer software, PARALLEL programs (Computer programs), MOORE'S law, SEMICONDUCTORS

Software Transactional Memory: Why is it only a Research Toy?

Authors: CA&#x...CAVAL, CĂLIN BLUNDELL, COLIN MICHAEL, MAGED et al.

Source: Communications of the ACM. Nov2008, Vol. 51 Issue 11, p40-46. 7p. 1 Diagram, 6 Graphs.

Subject Terms: *COMPUTER programming, *COMPUTER science, *ELECTRONIC data processing, PARALLEL programs (Computer programs), PARALLEL computer software, DATABASE management software

Resiliency in numerical algorithm design for extreme scale simulations

Authors: Agullo, Emmanuel Altenbernd, Mirco Anzt, Hartwig et al.

Contributors: Agullo, Emmanuel Altenbernd, Mirco Anzt, Hartwig et al.

Source: UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
The international journal of high performance computing applications 36(2), 251-285 (2022). doi:10.1177/10943420211055188

Subject Terms: G.4, FOS: Computer and information sciences, Numerical algorithms, Large scale systems, ERROR-DETECTION, G.1, COMMUNICATION, 02 engineering and technology, 7. Clean energy, 01 natural sciences, Simulació per ordinador, [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], parallel computer architecture, 0202 electrical engineering, electronic engineering, information engineering, SCIENTIFIC APPLICATIONS, 0101 mathematics, Informàtica::Arquitectura de computadors::Arquitectures paral·leles [Àrees temàtiques de la UPC], resilience, ddc:510, D.4.5, D.4.4, Parallel computer architecture, Resilience, FAULT-TOLERANCE, ITERATIVE METHODS, SCHEME, Fault tolerance, [MATH.MATH-NA] Mathematics [math]/Numerical Analysis [math.NA], PERFORMANCE, RECOVERY, Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles, Computer Science - Distributed, Parallel, and Cluster Computing, Fault tolerance (Engineering), ASYNCHRONOUS OPTIMIZED SCHWARZ, 102023 Supercomputing, fault tolerance, Distributed, Parallel, and Cluster Computing (cs.DC), INTEGRATION, Mathematics

File Description: application/pdf

Access URL: http://arxiv.org/pdf/2010.13342
http://arxiv.org/abs/2010.13342
https://juser.fz-juelich.de/record/910504

TALP: A Lightweight Tool to Unveil Parallel Efficiency of Large-scale Executions

Authors: Lopez, Victor Ramirez Miranda, Guillem Garcia Gasulla, Marta

Source: UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Proceedings of the 2021 on Performance EngineeRing, Modelling, Analysis, and VisualizatiOn STrategy

Subject Terms: Supercomputadors, Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles, Parallel computer programs, Performance and optimization, 0202 electrical engineering, electronic engineering, information engineering, High performance computing, Distributed computing systems, Heterogeneous, 02 engineering and technology, Supercomputers, Performance Monitoring, Informàtica::Arquitectura de computadors::Arquitectures paral·leles [Àrees temàtiques de la UPC], Àrees temàtiques de la UPC::Informàtica::Programació, Informàtica::Programació [Àrees temàtiques de la UPC]

File Description: application/pdf

Access URL: https://upcommons.upc.edu/bitstream/2117/349221/1/3452412.3462753.pdf
https://upcommons.upc.edu/bitstream/2117/349221/1/3452412.3462753.pdf
https://dl.acm.org/doi/pdf/10.1145/3452412.3462753
https://upcommons.upc.edu/handle/2117/349221

Optimal computer crash performance precaution

Authors: Laksman, Efraim Lennerstad, Håkan Lundberg, Lars

Source: Discrete Mathematics & Theoretical Computer Science. 14(1):55-68

Subject Terms: Computer crash, Load balancing, Optimization, Parallel computer, Process allocation, Scheduling

File Description: electronic

Access URL: https://urn.kb.se/resolve?urn=urn:nbn:se:bth-7056
https://bth.diva-portal.org/smash/get/diva2:834635/FULLTEXT01.pdf

A High Static Performance Hierarchical Three-Dimensional Shifted Completely Connected Network

Authors: Mohammed N. M. Ali M. M. Hafizur Rahman Adamu Abubakar Ibrahim et al.

Source: IEEE Access, Vol 10, Pp 43812-43836 (2022)

Subject Terms: Shifted completely connected network (SCCN), massively parallel computer (MPC) systems, network-on-chip (NOC), 0202 electrical engineering, electronic engineering, information engineering, static network performance, Electrical engineering. Electronics. Nuclear engineering, 02 engineering and technology, hierarchical interconnection networks (HINs), interconnection networks, TK1-9971

Access URL: https://doaj.org/article/afb13442e97d4a3fb2e5e8760cb33682

The Static Performance Effect of Hybrid- Hierarchical Interconnection by Shifted Completely Connected Network

Authors: Eklas Hossain Mohammed N. M. Ali Adamu Abubakar Ibrahim et al.

Source: IEEE Access, Vol 9, Pp 99249-99265 (2021)

Subject Terms: Shifted completely connected network (SCCN), massively parallel computer (MPC) systems, 0202 electrical engineering, electronic engineering, information engineering, Electrical engineering. Electronics. Nuclear engineering, 02 engineering and technology, Network-on-Chip, hierarchical interconnection networks (HINs), interconnection networks, static network performance parameters, TK1-9971

Access URL: https://ieeexplore.ieee.org/ielx7/6287639/6514899/09475459.pdf
https://doaj.org/article/9aec328e13404d8f83c44b2a76e2be95
https://dblp.uni-trier.de/db/journals/access/access9.html#AliRIIH21
http://irep.iium.edu.my/90871/
https://ieeexplore.ieee.org/document/9475459?source=authoralert

Efficiently Removing Sparsity for High-Throughput Stream Processing

Authors: Papaphilippou, Philippos

Subject Terms: Stream compaction, Parallel Programming, Aggregation, High- throughput computation, Analytics, Interconnects, Prefix scan, Computer Science, Parallel Systems, Computer Engineering, FPGA, Parallel Computer Architecture, Computer Architecture

File Description: application/pdf

Access URL: https://hdl.handle.net/2262/104146
http://people.tcd.ie/papaphip

Efficiently Removing Sparsity for High-Throughput Stream Processing ; The International Conference on Field-Programmable Technology (FPT) 2023

Authors: Papaphilippou, Philippos

Subject Terms: Prefix scan, Interconnects, FPGA, Stream compaction, Aggregation, High- throughput computation, Analytics, Computer Architecture, Computer Engineering, Computer Science, Parallel Computer Architecture, Parallel Programming, Parallel Systems

File Description: application/pdf

Relation: Y; http://hdl.handle.net/2262/104146; http://people.tcd.ie/papaphip; 260091

Availability: http://hdl.handle.net/2262/104146
http://people.tcd.ie/papaphip

Analysing Multiple QoS Attributes in Parallel Design Patterns-Based Applications.

Authors: Brogi, Antonio Danelutto, Marco De Sensi, Daniele et al.

Source: International Journal of Parallel Programming. Feb2018, Vol. 46 Issue 1, p81-100. 20p.

Subject Terms: *PARALLEL programming, *QUALITY of service, PARALLEL computer software, RECURSIVE functions, ELECTRIC power consumption

A Simple, Elegant Approach to Non-Numeric Parallelization.

Authors: Larus, James¹ james.larus@epfl.ch

Source: Communications of the ACM. Dec2017, Vol. 60 Issue 12, p87-87. 1p.

Subject Terms: PARALLEL computers, PARALLEL computer software

Efficient, scalable, and fair read-modify-writes

Authors: Rajaram, Bharghava Nagarajan, Vijayanand Fensch, Christian

Contributors: Rajaram, Bharghava Nagarajan, Vijayanand Fensch, Christian

Subject Terms: 004, parallel computer architecture, atomic instructions, efficient synchronization

Access URL: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.666070

NOCA — A Notification-Oriented Computer Architecture: Prototype and Simulator

Authors: Robson R. Linhares Leonardo F. Pordeus Jean M. Simao et al.

Source: IEEE Access, Vol 8, Pp 37287-37304 (2020)

Subject Terms: Computer architecture, notification-oriented paradigm, parallel computer architecture, computing paradigm, Electrical engineering. Electronics. Nuclear engineering, TK1-9971

File Description: electronic resource

Relation: https://ieeexplore.ieee.org/document/9004603/; https://doaj.org/toc/2169-3536

Access URL: https://doaj.org/article/7454021890d0479f97249602ee97d45c

Parallel genetic approach for routing optimization in large ad hoc networks

Authors: Hala Khankhour Otman Abdoun Jâafar Abouchabaka

Subject Terms: Ad hoc, Artificial intelligence, Genetic algorithm, Np-complete, Parallel computer

Relation: https://zenodo.org/records/5773657; oai:zenodo.org:5773657

Availability: https://doi.org/10.11591/ijece.v12i1.pp748-755
https://zenodo.org/records/5773657

Data centric and adaptive source changing transactional memory with exit functionality

Authors: Herath, Herath Mudiyanselage Isuru Prasenajith Lujan Moreno, Mikel Lujan

Contributors: Herath, Herath Mudiyanselage Isuru Prasenajith Lujan Moreno, Mikel Lujan

Subject Terms: 004, Parallel Computer Architecture, Hardware Transactional Memory

Access URL: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.564352

Parallel algorithm for householder transformation with applications to Ill-conditioned problems

Authors: Mi Lu (10011950)

Subject Terms: Analysis of Algorithms and Complexity, Computer System Architecture, Parallel algorithms, nCUBE, PRAM, cache trashing, data compression, Mesh-Connected Computer, polynomial product, Parallel Computer Implementation

Relation: https://figshare.com/articles/journal_contribution/Parallel_algorithm_for_householder_transformation_with_applications_to_Ill-conditioned_problems/13626770

Availability: https://doi.org/10.6084/m9.figshare.13626770.v1